Add OpenSSL copyright to .pl files

[openssl.git] / crypto / md5 / asm / md5-sparcv9.pl

diff --git a/crypto/md5/asm/md5-sparcv9.pl b/crypto/md5/asm/md5-sparcv9.pl
index 062a0738c439536c9d601434d8b35d7769a77edb..09e6d7139a8b678d351ae3909b170460985e6172 100644 (file)
--- a/crypto/md5/asm/md5-sparcv9.pl
+++ b/crypto/md5/asm/md5-sparcv9.pl
@@ -1,4 +1,11 @@
-#!/usr/bin/env perl
+#! /usr/bin/env perl
+# Copyright 2012-2016 The OpenSSL Project Authors. All Rights Reserved.
+#
+# Licensed under the OpenSSL license (the "License").  You may not use
+# this file except in compliance with the License.  You can obtain a copy
+# in the file LICENSE in the source distribution or at
+# https://www.openssl.org/source/license.html
+
 
 # ====================================================================
 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
@@ -12,17 +19,12 @@
 # MD5 for SPARCv9, 6.9 cycles per byte on UltraSPARC, >40% faster than
 # code generated by Sun C 5.2.
 
-# SPARC T4 MD5 hardware achieves 3.24 cycles per byte, which is 2.1x
+# SPARC T4 MD5 hardware achieves 3.20 cycles per byte, which is 2.1x
 # faster than software. Multi-process benchmark saturates at 12x
 # single-process result on 8-core processor, or ~11GBps per 2.85GHz
 # socket.
 
-$bits=32;
-for (@ARGV)    { $bits=64 if (/\-m64/ || /\-xarch\=v9/); }
-if ($bits==64) { $bias=2047; $frame=192; }
-else           { $bias=0;    $frame=112; }
-
-$output=shift;
+$output=pop;
 open STDOUT,">$output";
 
 use integer;
@@ -198,13 +200,14 @@ $code.=<<___;
 ___
 }
 
-$code.=<<___ if ($bits==64);
-.register      %g2,#scratch
-.register      %g3,#scratch
-___
 $code.=<<___;
 #include "sparc_arch.h"
 
+#ifdef __arch64__
+.register      %g2,#scratch
+.register      %g3,#scratch
+#endif
+
 .section       ".text",#alloc,#execinstr
 
 #ifdef __PIC__
@@ -221,15 +224,15 @@ md5_block_asm_data_order:
        be      .Lsoftware
        nop
 
-       rd      %asi, %g5
-       wr      %g0, 0x88, %asi         ! ASI_PRIMARY_LITTLE
- 
-       lda     [%o0 + 0x00] %asi, %f0  ! load context
-       lda     [%o0 + 0x04] %asi, %f1
+       mov     4, %g1
        andcc   %o1, 0x7, %g0
-       lda     [%o0 + 0x08] %asi, %f2
+       lda     [%o0 + %g0]0x88, %f0            ! load context
+       lda     [%o0 + %g1]0x88, %f1
+       add     %o0, 8, %o0
+       lda     [%o0 + %g0]0x88, %f2
+       lda     [%o0 + %g1]0x88, %f3
        bne,pn  %icc, .Lhwunaligned
-        lda    [%o0 + 0x0c] %asi, %f3
+       sub     %o0, 8, %o0
 
 .Lhw_loop:
        ldd     [%o1 + 0x00], %f8
@@ -246,16 +249,17 @@ md5_block_asm_data_order:
 
        .word   0x81b02800              ! MD5
 
-       bne,pt  `$bits==64?"%xcc":"%icc"`, .Lhw_loop
+       bne,pt  SIZE_T_CC, .Lhw_loop
        nop
 
 .Lhwfinish:
-       sta     %f0, [%o0 + 0x00] %asi  ! store context
-       sta     %f1, [%o0 + 0x04] %asi
-       sta     %f2, [%o0 + 0x08] %asi
-       sta     %f3, [%o0 + 0x0c] %asi
+       sta     %f0, [%o0 + %g0]0x88    ! store context
+       sta     %f1, [%o0 + %g1]0x88
+       add     %o0, 8, %o0
+       sta     %f2, [%o0 + %g0]0x88
+       sta     %f3, [%o0 + %g1]0x88
        retl
-        wr     %g5, 0x0, %asi          ! restore %asi
+       nop
 
 .align 8
 .Lhwunaligned:
@@ -286,7 +290,7 @@ md5_block_asm_data_order:
 
        .word   0x81b02800              ! MD5
 
-       bne,pt  `$bits==64?"%xcc":"%icc"`, .Lhwunaligned_loop
+       bne,pt  SIZE_T_CC, .Lhwunaligned_loop
        for     %f26, %f26, %f10        ! %f10=%f26
 
        ba      .Lhwfinish
@@ -294,7 +298,7 @@ md5_block_asm_data_order:
 
 .align 16
 .Lsoftware:
-       save    %sp,-$frame,%sp
+       save    %sp,-STACK_FRAME,%sp
 
        rd      %asi,$saved_asi
        wr      %g0,0x88,%asi           ! ASI_PRIMARY_LITTLE
@@ -354,7 +358,7 @@ $code.=<<___;
        add     $t2,$C,$C
        add     $CD,$D,$D
        srl     $B,0,$B                 ! clruw $B
-       bne     `$bits==64?"%xcc":"%icc"`,.Loop
+       bne     SIZE_T_CC,.Loop
        srl     $D,0,$D                 ! clruw $D
 
        st      $A,[$ctx+0]             ! write out ctx
@@ -374,7 +378,7 @@ ___
 
 # Purpose of these subroutines is to explicitly encode VIS instructions,
 # so that one can compile the module without having to specify VIS
-# extentions on compiler command line, e.g. -xarch=v9 vs. -xarch=v9a.
+# extensions on compiler command line, e.g. -xarch=v9 vs. -xarch=v9a.
 # Idea is to reserve for option to produce "universal" binary and let
 # programmer detect if current CPU is VIS capable at run-time.
 sub unvis {