1 /* ====================================================================
2 * Copyright (c) 2005 The OpenSSL Project. Rights for redistribution
3 * and usage in source and binary forms are granted according to the
13 const void *FIPS_text_start(void);
14 const void *FIPS_text_end(void);
18 #if !defined(POINTER_TO_FUNCTION_IS_POINTER_TO_1ST_INSTRUCTION)
19 # if (defined(__sun) && (defined(__sparc) || defined(__sparcv9))) || \
20 (defined(__sgi) && (defined(__mips) || defined(mips))) || \
21 (defined(__osf__) && defined(__alpha)) || \
22 (defined(__linux) && (defined(__arm) || defined(__arm__))) || \
23 (defined(__i386) || defined(__i386__)) || \
24 (defined(__x86_64) || defined(__x86_64__)) || \
25 (defined(vax) || defined(__vax__))
26 # define POINTER_TO_FUNCTION_IS_POINTER_TO_1ST_INSTRUCTION
30 #if !defined(FIPS_REF_POINT_IS_CROSS_COMPILER_AWARE)
31 # if (defined(__ANDROID__) && (defined(__arm__) || defined(__arm))) || \
32 (defined(__vxworks) && (defined(__ppc__) || defined(__ppc))) || \
33 (defined(__linux) && defined(__PPC__) && !defined(__PPC64__))
34 # define FIPS_REF_POINT_IS_CROSS_COMPILER_AWARE
38 #if defined(__xlC__) && __xlC__>=0x600 && (defined(_POWER) || defined(_ARCH_PPC))
39 static void *instruction_pointer_xlc(void);
40 # pragma mc_func instruction_pointer_xlc {\
41 "7c0802a6" /* mflr r0 */ \
42 "48000005" /* bl $+4 */ \
43 "7c6802a6" /* mflr r3 */ \
44 "7c0803a6" /* mtlr r0 */ }
45 # pragma reg_killed_by instruction_pointer_xlc gr0 gr3
46 # define INSTRUCTION_POINTER_IMPLEMENTED(ret) (ret=instruction_pointer_xlc());
50 # define FIPS_ref_point FIPS_text_start
51 # ifdef FIPS_REF_POINT_IS_CROSS_COMPILER_AWARE
52 # define instruction_pointer FIPS_text_startX
54 /* Some compilers put string literals into a separate segment. As we
55 * are mostly interested to hash AES tables in .rodata, we declare
56 * reference points accordingly. In case you wonder, the values are
57 * big-endian encoded variable names, just to prevent these arrays
58 * from being merged by linker. */
59 # if defined(_MSC_VER) && defined(_WIN64)
60 # pragma section("fipsro$a",read)
61 __declspec(allocate("fipsro$a"))
63 const unsigned int FIPS_rodata_start[]=
64 { 0x46495053, 0x5f726f64, 0x6174615f, 0x73746172 };
66 # define FIPS_ref_point FIPS_text_end
67 # ifdef FIPS_REF_POINT_IS_CROSS_COMPILER_AWARE
68 # define instruction_pointer FIPS_text_endX
70 # if defined(_MSC_VER) && defined(_WIN64)
71 # pragma section("fipsro$c",read)
72 __declspec(allocate("fipsro$c"))
74 const unsigned int FIPS_rodata_end[]=
75 { 0x46495053, 0x5f726f64, 0x6174615f, 0x656e645b };
79 * I declare reference function as static in order to avoid certain
80 * pitfalls in -dynamic linker behaviour...
82 static void *instruction_pointer(void)
84 /* These are ABI-neutral CPU-specific snippets. ABI-neutrality means
85 * that they are designed to work under any OS running on particular
86 * CPU, which is why you don't find any #ifdef THIS_OR_THAT_OS in
88 #if defined(INSTRUCTION_POINTER_IMPLEMENTED)
89 INSTRUCTION_POINTER_IMPLEMENTED(ret);
90 #elif defined(__GNUC__) && __GNUC__>=2
91 # if defined(__alpha) || defined(__alpha__)
92 # define INSTRUCTION_POINTER_IMPLEMENTED
93 __asm __volatile ( "br %0,1f\n1:" : "=r"(ret) );
94 # elif defined(__i386) || defined(__i386__)
95 # define INSTRUCTION_POINTER_IMPLEMENTED
96 __asm __volatile ( "call 1f\n1: popl %0" : "=r"(ret) );
97 ret = (void *)((size_t)ret&~3UL); /* align for better performance */
98 # elif defined(__ia64) || defined(__ia64__)
99 # define INSTRUCTION_POINTER_IMPLEMENTED
100 __asm __volatile ( "mov %0=ip" : "=r"(ret) );
101 # elif defined(__hppa) || defined(__hppa__) || defined(__pa_risc)
102 # define INSTRUCTION_POINTER_IMPLEMENTED
103 __asm __volatile ( "blr %%r0,%0\n\tnop" : "=r"(ret) );
104 ret = (void *)((size_t)ret&~3UL); /* mask privilege level */
105 # elif defined(__mips) || defined(__mips__)
106 # define INSTRUCTION_POINTER_IMPLEMENTED
108 __asm __volatile ( "move %1,$31\n\t" /* save ra */
111 "move $31,%1" /* restore ra */
112 : "=r"(ret),"=r"(scratch) );
113 # elif defined(__ppc__) || defined(__ppc) || \
114 defined(__powerpc) || defined(__powerpc__) || \
115 defined(__POWERPC__) || defined(_POWER) || defined(__PPC__) || \
116 defined(__PPC64__) || defined(__ppc64__) || defined(__powerpc64__)
117 # define INSTRUCTION_POINTER_IMPLEMENTED
119 __asm __volatile ( "mfspr %1,8\n\t" /* save lr */
121 "mfspr %0,8\n\t" /* mflr ret */
122 "mtspr 8,%1" /* restore lr */
123 : "=r"(ret),"=r"(scratch) );
124 # elif defined(__s390__) || defined(__s390x__)
125 # define INSTRUCTION_POINTER_IMPLEMENTED
126 __asm __volatile ( "bras %0,1f\n1:" : "=r"(ret) );
127 ret = (void *)((size_t)ret&~3UL);
128 # elif defined(__sparc) || defined(__sparc__) || defined(__sparcv9)
129 # define INSTRUCTION_POINTER_IMPLEMENTED
131 __asm __volatile ( "mov %%o7,%1\n\t"
135 : "=r"(ret),"=r"(scratch) );
136 # elif defined(__x86_64) || defined(__x86_64__)
137 # define INSTRUCTION_POINTER_IMPLEMENTED
138 __asm __volatile ( "leaq 0(%%rip),%0" : "=r"(ret) );
139 ret = (void *)((size_t)ret&~3UL); /* align for better performance */
140 # elif defined(__arm) || defined(__arm__)
141 # define INSTRUCTION_POINTER_IMPLEMENTED
142 __asm __volatile ( "sub %0,pc,#8" : "=r"(ret) );
144 #elif defined(__DECC) && defined(__alpha)
145 # define INSTRUCTION_POINTER_IMPLEMENTED
146 ret = (void *)(size_t)asm("br %v0,1f\n1:");
147 #elif defined(_MSC_VER) && defined(_M_IX86)
148 # define INSTRUCTION_POINTER_IMPLEMENTED
155 ret = (void *)((size_t)scratch&~3UL);
161 * This function returns pointer to an instruction in the vicinity of
162 * its entry point, but not outside this object module. This guarantees
163 * that sequestered code is covered...
165 const void *FIPS_ref_point()
167 #if defined(FIPS_REF_POINT_IS_CROSS_COMPILER_AWARE)
168 return (void *)instruction_pointer;
169 #elif defined(INSTRUCTION_POINTER_IMPLEMENTED)
170 return instruction_pointer();
171 /* Below we essentially cover vendor compilers which do not support
172 * inline assembler... */
174 struct { void *ip,*gp,*env; } *p = (void *)instruction_pointer;
176 #elif defined(_HPUX_SOURCE)
177 # if defined(__hppa) || defined(__hppa__)
178 struct { void *i[4]; } *p = (void *)FIPS_ref_point;
180 if (sizeof(p) == 8) /* 64-bit */
182 else if ((size_t)p & 2)
183 { p = (void *)((size_t)p&~3UL);
188 # elif defined(__ia64) || defined(__ia64__)
189 struct { unsigned long long ip,gp; } *p=(void *)instruction_pointer;
190 return (void *)(size_t)p->ip;
192 #elif (defined(__VMS) || defined(VMS)) && !(defined(vax) || defined(__vax__))
193 /* applies to both alpha and ia64 */
194 struct { unsigned __int64 opaque,ip; } *p=(void *)instruction_pointer;
195 return (void *)(size_t)p->ip;
196 #elif defined(__VOS__)
197 /* applies to both pa-risc and ia32 */
198 struct { void *dp,*ip,*gp; } *p = (void *)instruction_pointer;
200 #elif defined(_WIN32)
201 # if defined(_WIN64) && defined(_M_IA64)
202 struct { void *ip,*gp; } *p = (void *)FIPS_ref_point;
205 return (void *)FIPS_ref_point;
208 * In case you wonder why there is no #ifdef __linux. All Linux targets
209 * are GCC-based and therefore are covered by instruction_pointer above
210 * [well, some are covered by by the one below]...
212 #elif defined(POINTER_TO_FUNCTION_IS_POINTER_TO_1ST_INSTRUCTION)
213 return (void *)instruction_pointer;