7 #if defined(__linux) || defined(_AIX)
8 # include <sys/utsname.h>
10 #if defined(_AIX53) /* defined even on post-5.3 */
11 # include <sys/systemcfg.h>
12 # if !defined(__power_set)
13 # define __power_set(a) (_system_configuration.implementation & (a))
16 #include <openssl/crypto.h>
17 #include <openssl/bn.h>
21 unsigned int OPENSSL_ppccap_P = 0;
23 static sigset_t all_masked;
25 #ifdef OPENSSL_BN_ASM_MONT
26 int bn_mul_mont(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
27 const BN_ULONG *np, const BN_ULONG *n0, int num)
29 int bn_mul_mont_fpu64(BN_ULONG *rp, const BN_ULONG *ap,
30 const BN_ULONG *bp, const BN_ULONG *np,
31 const BN_ULONG *n0, int num);
32 int bn_mul_mont_int(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
33 const BN_ULONG *np, const BN_ULONG *n0, int num);
35 if (sizeof(size_t) == 4) {
36 # if 1 || (defined(__APPLE__) && defined(__MACH__))
37 if (num >= 8 && (num & 3) == 0 && (OPENSSL_ppccap_P & PPC_FPU64))
38 return bn_mul_mont_fpu64(rp, ap, bp, np, n0, num);
41 * boundary of 32 was experimentally determined on Linux 2.6.22,
42 * might have to be adjusted on AIX...
44 if (num >= 32 && (num & 3) == 0 && (OPENSSL_ppccap_P & PPC_FPU64)) {
48 sigprocmask(SIG_SETMASK, &all_masked, &oset);
49 ret = bn_mul_mont_fpu64(rp, ap, bp, np, n0, num);
50 sigprocmask(SIG_SETMASK, &oset, NULL);
55 } else if ((OPENSSL_ppccap_P & PPC_FPU64))
57 * this is a "must" on POWER6, but run-time detection is not
60 return bn_mul_mont_fpu64(rp, ap, bp, np, n0, num);
62 return bn_mul_mont_int(rp, ap, bp, np, n0, num);
66 void sha256_block_p8(void *ctx, const void *inp, size_t len);
67 void sha256_block_ppc(void *ctx, const void *inp, size_t len);
68 void sha256_block_data_order(void *ctx, const void *inp, size_t len)
70 OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha256_block_p8(ctx, inp, len) :
71 sha256_block_ppc(ctx, inp, len);
74 void sha512_block_p8(void *ctx, const void *inp, size_t len);
75 void sha512_block_ppc(void *ctx, const void *inp, size_t len);
76 void sha512_block_data_order(void *ctx, const void *inp, size_t len)
78 OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha512_block_p8(ctx, inp, len) :
79 sha512_block_ppc(ctx, inp, len);
82 #ifndef OPENSSL_NO_CHACHA
83 void ChaCha20_ctr32_int(unsigned char *out, const unsigned char *inp,
84 size_t len, const unsigned int key[8],
85 const unsigned int counter[4]);
86 void ChaCha20_ctr32_vmx(unsigned char *out, const unsigned char *inp,
87 size_t len, const unsigned int key[8],
88 const unsigned int counter[4]);
89 void ChaCha20_ctr32(unsigned char *out, const unsigned char *inp,
90 size_t len, const unsigned int key[8],
91 const unsigned int counter[4])
93 OPENSSL_ppccap_P & PPC_ALTIVEC
94 ? ChaCha20_ctr32_vmx(out, inp, len, key, counter)
95 : ChaCha20_ctr32_int(out, inp, len, key, counter);
99 #ifndef OPENSSL_NO_POLY1305
100 void poly1305_init_int(void *ctx, const unsigned char key[16]);
101 void poly1305_blocks(void *ctx, const unsigned char *inp, size_t len,
102 unsigned int padbit);
103 void poly1305_emit(void *ctx, unsigned char mac[16],
104 const unsigned int nonce[4]);
105 void poly1305_init_fpu(void *ctx, const unsigned char key[16]);
106 void poly1305_blocks_fpu(void *ctx, const unsigned char *inp, size_t len,
107 unsigned int padbit);
108 void poly1305_emit_fpu(void *ctx, unsigned char mac[16],
109 const unsigned int nonce[4]);
110 int poly1305_init(void *ctx, const unsigned char key[16], void *func[2])
112 if (sizeof(size_t) == 4 && (OPENSSL_ppccap_P & PPC_FPU)) {
113 poly1305_init_fpu(ctx,key);
114 func[0] = poly1305_blocks_fpu;
115 func[1] = poly1305_emit_fpu;
117 poly1305_init_int(ctx,key);
118 func[0] = poly1305_blocks;
119 func[1] = poly1305_emit;
125 static sigjmp_buf ill_jmp;
126 static void ill_handler(int sig)
128 siglongjmp(ill_jmp, sig);
131 void OPENSSL_fpu_probe(void);
132 void OPENSSL_ppc64_probe(void);
133 void OPENSSL_altivec_probe(void);
134 void OPENSSL_crypto207_probe(void);
135 void OPENSSL_madd300_probe(void);
138 * Use a weak reference to getauxval() so we can use it if it is available
139 * but don't break the build if it is not. Note that this is *link-time*
140 * feature detection, not *run-time*. In other words if we link with
141 * symbol present, it's expected to be present even at run-time.
143 #if defined(__GNUC__) && __GNUC__>=2 && defined(__ELF__)
144 extern unsigned long getauxval(unsigned long type) __attribute__ ((weak));
146 static unsigned long (*getauxval) (unsigned long) = NULL;
149 /* I wish <sys/auxv.h> was universally available */
150 #define HWCAP 16 /* AT_HWCAP */
151 #define HWCAP_PPC64 (1U << 30)
152 #define HWCAP_ALTIVEC (1U << 28)
153 #define HWCAP_FPU (1U << 27)
154 #define HWCAP_POWER6_EXT (1U << 9)
155 #define HWCAP_VSX (1U << 7)
157 #define HWCAP2 26 /* AT_HWCAP2 */
158 #define HWCAP_VEC_CRYPTO (1U << 25)
159 #define HWCAP_ARCH_3_00 (1U << 23)
161 # if defined(__GNUC__) && __GNUC__>=2
162 __attribute__ ((constructor))
164 void OPENSSL_cpuid_setup(void)
167 struct sigaction ill_oact, ill_act;
169 static int trigger = 0;
175 if ((e = getenv("OPENSSL_ppccap"))) {
176 OPENSSL_ppccap_P = strtoul(e, NULL, 0);
180 OPENSSL_ppccap_P = 0;
183 OPENSSL_ppccap_P |= PPC_FPU;
185 if (sizeof(size_t) == 4) {
187 # if defined(_SC_AIX_KERNEL_BITMODE)
188 if (sysconf(_SC_AIX_KERNEL_BITMODE) != 64)
191 if (uname(&uts) != 0 || atoi(uts.version) < 6)
195 # if defined(__power_set)
197 * Value used in __power_set is a single-bit 1<<n one denoting
198 * specific processor class. Incidentally 0xffffffff<<n can be
199 * used to denote specific processor and its successors.
201 if (sizeof(size_t) == 4) {
202 /* In 32-bit case PPC_FPU64 is always fastest [if option] */
203 if (__power_set(0xffffffffU<<13)) /* POWER5 and later */
204 OPENSSL_ppccap_P |= PPC_FPU64;
206 /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
207 if (__power_set(0x1U<<14)) /* POWER6 */
208 OPENSSL_ppccap_P |= PPC_FPU64;
211 if (__power_set(0xffffffffU<<14)) /* POWER6 and later */
212 OPENSSL_ppccap_P |= PPC_ALTIVEC;
214 if (__power_set(0xffffffffU<<16)) /* POWER8 and later */
215 OPENSSL_ppccap_P |= PPC_CRYPTO207;
217 if (__power_set(0xffffffffU<<17)) /* POWER9 and later */
218 OPENSSL_ppccap_P |= PPC_MADD300;
224 if (getauxval != NULL) {
225 unsigned long hwcap = getauxval(HWCAP);
227 if (hwcap & HWCAP_FPU) {
228 OPENSSL_ppccap_P |= PPC_FPU;
230 if (sizeof(size_t) == 4) {
231 /* In 32-bit case PPC_FPU64 is always fastest [if option] */
232 if (hwcap & HWCAP_PPC64)
233 OPENSSL_ppccap_P |= PPC_FPU64;
235 /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
236 if (hwcap & HWCAP_POWER6_EXT)
237 OPENSSL_ppccap_P |= PPC_FPU64;
241 if (hwcap & HWCAP_ALTIVEC) {
242 OPENSSL_ppccap_P |= PPC_ALTIVEC;
244 if ((hwcap & HWCAP_VSX) && (getauxval(HWCAP2) & HWCAP_VEC_CRYPTO))
245 OPENSSL_ppccap_P |= PPC_CRYPTO207;
248 if (hwcap & HWCAP_ARCH_3_00) {
249 OPENSSL_ppccap_P |= PPC_MADD300;
255 sigfillset(&all_masked);
256 sigdelset(&all_masked, SIGILL);
257 sigdelset(&all_masked, SIGTRAP);
259 sigdelset(&all_masked, SIGEMT);
261 sigdelset(&all_masked, SIGFPE);
262 sigdelset(&all_masked, SIGBUS);
263 sigdelset(&all_masked, SIGSEGV);
265 memset(&ill_act, 0, sizeof(ill_act));
266 ill_act.sa_handler = ill_handler;
267 ill_act.sa_mask = all_masked;
269 sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset);
270 sigaction(SIGILL, &ill_act, &ill_oact);
272 if (sigsetjmp(ill_jmp,1) == 0) {
274 OPENSSL_ppccap_P |= PPC_FPU;
276 if (sizeof(size_t) == 4) {
279 if (uname(&uts) == 0 && strcmp(uts.machine, "ppc64") == 0)
281 if (sigsetjmp(ill_jmp, 1) == 0) {
282 OPENSSL_ppc64_probe();
283 OPENSSL_ppccap_P |= PPC_FPU64;
287 * Wanted code detecting POWER6 CPU and setting PPC_FPU64
292 if (sigsetjmp(ill_jmp, 1) == 0) {
293 OPENSSL_altivec_probe();
294 OPENSSL_ppccap_P |= PPC_ALTIVEC;
295 if (sigsetjmp(ill_jmp, 1) == 0) {
296 OPENSSL_crypto207_probe();
297 OPENSSL_ppccap_P |= PPC_CRYPTO207;
301 if (sigsetjmp(ill_jmp, 1) == 0) {
302 OPENSSL_madd300_probe();
303 OPENSSL_ppccap_P |= PPC_MADD300;
306 sigaction(SIGILL, &ill_oact, NULL);
307 sigprocmask(SIG_SETMASK, &oset, NULL);