Move CPU detection to armcap.c
authorsdlyyxy <sdlyyxy@icloud.com>
Fri, 14 Jul 2023 09:10:43 +0000 (17:10 +0800)
committerPauli <pauli@openssl.org>
Fri, 21 Jul 2023 00:19:19 +0000 (10:19 +1000)
Reviewed-by: Tom Cosgrove <tom.cosgrove@arm.com>
Reviewed-by: Paul Dale <pauli@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21398)

crypto/arm_arch.h
crypto/armcap.c
providers/implementations/digests/sha3_prov.c

index b1bb65c7dc3d2cc20b5e5baeed18fbba27b43da9..e27838f5d6c06cc78e3dfb1abac9b58c932e52da 100644 (file)
@@ -85,6 +85,7 @@ extern unsigned int OPENSSL_armv8_rsa_neonized;
 # define ARMV8_UNROLL8_EOR3      (1<<12)
 # define ARMV8_SVE       (1<<13)
 # define ARMV8_SVE2      (1<<14)
+# define ARMV8_WORTH_USING_SHA3  (1<<15)
 
 /*
  * MIDR_EL1 system register
index 03bc659bdbd26ca3952675298111afa89feadf3f..8443f8fcbd4a21882103ad95f0bb21e64816db02 100644 (file)
@@ -300,6 +300,7 @@ void OPENSSL_cpuid_setup(void)
                ((strncmp(uarch, "Apple M1", 8) == 0) ||
                 (strncmp(uarch, "Apple M2", 8) == 0))) {
                 OPENSSL_armcap_P |= ARMV8_UNROLL8_EOR3;
+                OPENSSL_armcap_P |= ARMV8_WORTH_USING_SHA3;
             }
         }
     }
@@ -419,6 +420,20 @@ void OPENSSL_cpuid_setup(void)
          MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_V2)) &&
         (OPENSSL_armcap_P & ARMV8_SHA3))
         OPENSSL_armcap_P |= ARMV8_UNROLL8_EOR3;
+    if ((MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_FIRESTORM)     ||
+         MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_ICESTORM)      ||
+         MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_FIRESTORM_PRO) ||
+         MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_ICESTORM_PRO)  ||
+         MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_FIRESTORM_MAX) ||
+         MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_ICESTORM_MAX)  ||
+         MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_AVALANCHE)     ||
+         MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_BLIZZARD)      ||
+         MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_AVALANCHE_PRO) ||
+         MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_BLIZZARD_PRO)  ||
+         MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_AVALANCHE_MAX) ||
+         MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_BLIZZARD_MAX)) &&
+        (OPENSSL_armcap_P & ARMV8_SHA3))
+        OPENSSL_armcap_P |= ARMV8_WORTH_USING_SHA3;
 # endif
 }
 #endif /* _WIN32, __ARM_MAX_ARCH__ >= 7 */
index 1348d0e06acccc380ff973c3da4b75708bd53668..a03df0b7fc608974e44d23d48905ac97952f935d 100644 (file)
@@ -271,43 +271,22 @@ static PROV_SHA3_METHOD sha3_ARMSHA3_md =
     armsha3_sha3_absorb,
     generic_sha3_final
 };
-/* Detection on Apple operating systems */
-# if defined(__APPLE__)
-#  define ARM_SHA3_CAPABLE (OPENSSL_armcap_P & ARMV8_SHA3)
-#  define SHA3_SET_MD(uname, typ)                                              \
+/* Users can switch back to the generic code by clearing either of the bits */
+# define ARM_SHA3_CAPABLE                                                      \
+    ((OPENSSL_armcap_P & ARMV8_SHA3) &&                                        \
+     (OPENSSL_armcap_P & ARMV8_WORTH_USING_SHA3))
+# define SHA3_SET_MD(uname, typ)                                               \
     if (ARM_SHA3_CAPABLE) {                                                    \
         ctx->meth = sha3_ARMSHA3_md;                                           \
     } else {                                                                   \
         ctx->meth = sha3_generic_md;                                           \
     }
-#  define KMAC_SET_MD(bitlen)                                                  \
+# define KMAC_SET_MD(bitlen)                                                   \
     if (ARM_SHA3_CAPABLE) {                                                    \
         ctx->meth = sha3_ARMSHA3_md;                                           \
     } else {                                                                   \
         ctx->meth = sha3_generic_md;                                           \
     }
-/* Detection on other operating systems */
-# else
-#  define ARM_HAS_FASTER_SHA3                                                                  \
-    (MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_FIRESTORM)     ||\
-     MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_FIRESTORM_PRO) ||\
-     MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_FIRESTORM_MAX) ||\
-     MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_AVALANCHE)     ||\
-     MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_AVALANCHE_PRO) ||\
-     MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_AVALANCHE_MAX))
-#  define SHA3_SET_MD(uname, typ)                                              \
-    if (ARM_HAS_FASTER_SHA3) {                                                 \
-        ctx->meth = sha3_ARMSHA3_md;                                           \
-    } else {                                                                   \
-        ctx->meth = sha3_generic_md;                                           \
-    }
-#  define KMAC_SET_MD(bitlen)                                                  \
-    if (ARM_HAS_FASTER_SHA3) {                                                 \
-        ctx->meth = sha3_ARMSHA3_md;                                           \
-    } else {                                                                   \
-        ctx->meth = sha3_generic_md;                                           \
-    }
-# endif /* APPLE */
 #else
 # define SHA3_SET_MD(uname, typ) ctx->meth = sha3_generic_md;
 # define KMAC_SET_MD(bitlen) ctx->meth = sha3_generic_md;