2 * Copyright 2019-2023 The OpenSSL Project Authors. All Rights Reserved.
4 * Licensed under the Apache License 2.0 (the "License"). You may not use
5 * this file except in compliance with the License. You can obtain a copy
6 * in the file LICENSE in the source distribution or at
7 * https://www.openssl.org/source/license.html
10 #ifndef OSSL_AES_PLATFORM_H
11 # define OSSL_AES_PLATFORM_H
14 # include <openssl/aes.h>
17 int vpaes_set_encrypt_key(const unsigned char *userKey, int bits,
19 int vpaes_set_decrypt_key(const unsigned char *userKey, int bits,
21 void vpaes_encrypt(const unsigned char *in, unsigned char *out,
23 void vpaes_decrypt(const unsigned char *in, unsigned char *out,
25 void vpaes_cbc_encrypt(const unsigned char *in,
28 const AES_KEY *key, unsigned char *ivec, int enc);
29 # endif /* VPAES_ASM */
32 void ossl_bsaes_cbc_encrypt(const unsigned char *in, unsigned char *out,
33 size_t length, const AES_KEY *key,
34 unsigned char ivec[16], int enc);
35 void ossl_bsaes_ctr32_encrypt_blocks(const unsigned char *in,
36 unsigned char *out, size_t len,
38 const unsigned char ivec[16]);
39 void ossl_bsaes_xts_encrypt(const unsigned char *inp, unsigned char *out,
40 size_t len, const AES_KEY *key1,
41 const AES_KEY *key2, const unsigned char iv[16]);
42 void ossl_bsaes_xts_decrypt(const unsigned char *inp, unsigned char *out,
43 size_t len, const AES_KEY *key1,
44 const AES_KEY *key2, const unsigned char iv[16]);
45 # endif /* BSAES_ASM */
48 void AES_ctr32_encrypt(const unsigned char *in, unsigned char *out,
49 size_t blocks, const AES_KEY *key,
50 const unsigned char ivec[AES_BLOCK_SIZE]);
51 # endif /* AES_CTR_ASM */
54 void AES_xts_encrypt(const unsigned char *inp, unsigned char *out, size_t len,
55 const AES_KEY *key1, const AES_KEY *key2,
56 const unsigned char iv[16]);
57 void AES_xts_decrypt(const unsigned char *inp, unsigned char *out, size_t len,
58 const AES_KEY *key1, const AES_KEY *key2,
59 const unsigned char iv[16]);
60 # endif /* AES_XTS_ASM */
62 # if defined(OPENSSL_CPUID_OBJ)
63 # if (defined(__powerpc__) || defined(__ppc__) || defined(_ARCH_PPC))
64 # include "crypto/ppc_arch.h"
66 # define VPAES_CAPABLE (OPENSSL_ppccap_P & PPC_ALTIVEC)
68 # define HWAES_CAPABLE (OPENSSL_ppccap_P & PPC_CRYPTO207)
69 # define HWAES_set_encrypt_key aes_p8_set_encrypt_key
70 # define HWAES_set_decrypt_key aes_p8_set_decrypt_key
71 # define HWAES_encrypt aes_p8_encrypt
72 # define HWAES_decrypt aes_p8_decrypt
73 # define HWAES_cbc_encrypt aes_p8_cbc_encrypt
74 # define HWAES_ctr32_encrypt_blocks aes_p8_ctr32_encrypt_blocks
75 # define HWAES_xts_encrypt aes_p8_xts_encrypt
76 # define HWAES_xts_decrypt aes_p8_xts_decrypt
77 # if !defined(OPENSSL_SYS_AIX) && !defined(OPENSSL_SYS_MACOSX)
78 # define PPC_AES_GCM_CAPABLE (OPENSSL_ppccap_P & PPC_MADD300)
79 # define AES_GCM_ENC_BYTES 128
80 # define AES_GCM_DEC_BYTES 128
81 size_t ppc_aes_gcm_encrypt(const unsigned char *in, unsigned char *out,
82 size_t len, const void *key, unsigned char ivec[16],
84 size_t ppc_aes_gcm_decrypt(const unsigned char *in, unsigned char *out,
85 size_t len, const void *key, unsigned char ivec[16],
87 # define AES_GCM_ASM_PPC(gctx) ((gctx)->ctr==aes_p8_ctr32_encrypt_blocks && \
88 (gctx)->gcm.funcs.ghash==gcm_ghash_p8)
89 void gcm_ghash_p8(u64 Xi[2],const u128 Htable[16],const u8 *inp, size_t len);
90 # endif /* OPENSSL_SYS_AIX || OPENSSL_SYS_MACOSX */
93 # if (defined(__arm__) || defined(__arm) || defined(__aarch64__) || defined(_M_ARM64))
94 # include "arm_arch.h"
95 # if __ARM_MAX_ARCH__>=7
96 # if defined(BSAES_ASM)
97 # define BSAES_CAPABLE (OPENSSL_armcap_P & ARMV7_NEON)
99 # if defined(VPAES_ASM)
100 # define VPAES_CAPABLE (OPENSSL_armcap_P & ARMV7_NEON)
102 # define HWAES_CAPABLE (OPENSSL_armcap_P & ARMV8_AES)
103 # define HWAES_set_encrypt_key aes_v8_set_encrypt_key
104 # define HWAES_set_decrypt_key aes_v8_set_decrypt_key
105 # define HWAES_encrypt aes_v8_encrypt
106 # define HWAES_decrypt aes_v8_decrypt
107 # define HWAES_cbc_encrypt aes_v8_cbc_encrypt
108 # define HWAES_ecb_encrypt aes_v8_ecb_encrypt
109 # if __ARM_MAX_ARCH__>=8 && (defined(__aarch64__) || defined(_M_ARM64))
110 # define HWAES_xts_encrypt aes_v8_xts_encrypt
111 # define HWAES_xts_decrypt aes_v8_xts_decrypt
113 # define HWAES_ctr32_encrypt_blocks aes_v8_ctr32_encrypt_blocks
114 # define AES_PMULL_CAPABLE ((OPENSSL_armcap_P & ARMV8_PMULL) && (OPENSSL_armcap_P & ARMV8_AES))
115 # define AES_GCM_ENC_BYTES 512
116 # define AES_GCM_DEC_BYTES 512
117 # if __ARM_MAX_ARCH__>=8 && (defined(__aarch64__) || defined(_M_ARM64))
118 # define AES_gcm_encrypt armv8_aes_gcm_encrypt
119 # define AES_gcm_decrypt armv8_aes_gcm_decrypt
120 # define AES_GCM_ASM(gctx) ((gctx)->ctr==aes_v8_ctr32_encrypt_blocks && \
121 (gctx)->gcm.funcs.ghash==gcm_ghash_v8)
122 /* The [unroll8_eor3_]aes_gcm_(enc|dec)_(128|192|256)_kernel() functions
123 * take input length in BITS and return number of BYTES processed */
124 size_t aes_gcm_enc_128_kernel(const uint8_t *plaintext, uint64_t plaintext_length, uint8_t *ciphertext,
125 uint64_t *Xi, unsigned char ivec[16], const void *key);
126 size_t aes_gcm_enc_192_kernel(const uint8_t *plaintext, uint64_t plaintext_length, uint8_t *ciphertext,
127 uint64_t *Xi, unsigned char ivec[16], const void *key);
128 size_t aes_gcm_enc_256_kernel(const uint8_t *plaintext, uint64_t plaintext_length, uint8_t *ciphertext,
129 uint64_t *Xi, unsigned char ivec[16], const void *key);
130 size_t aes_gcm_dec_128_kernel(const uint8_t *ciphertext, uint64_t plaintext_length, uint8_t *plaintext,
131 uint64_t *Xi, unsigned char ivec[16], const void *key);
132 size_t aes_gcm_dec_192_kernel(const uint8_t *ciphertext, uint64_t plaintext_length, uint8_t *plaintext,
133 uint64_t *Xi, unsigned char ivec[16], const void *key);
134 size_t aes_gcm_dec_256_kernel(const uint8_t *ciphertext, uint64_t plaintext_length, uint8_t *plaintext,
135 uint64_t *Xi, unsigned char ivec[16], const void *key);
136 size_t unroll8_eor3_aes_gcm_enc_128_kernel(const uint8_t *plaintext, uint64_t plaintext_length, uint8_t *ciphertext,
137 uint64_t *Xi, unsigned char ivec[16], const void *key);
138 size_t unroll8_eor3_aes_gcm_enc_192_kernel(const uint8_t *plaintext, uint64_t plaintext_length, uint8_t *ciphertext,
139 uint64_t *Xi, unsigned char ivec[16], const void *key);
140 size_t unroll8_eor3_aes_gcm_enc_256_kernel(const uint8_t *plaintext, uint64_t plaintext_length, uint8_t *ciphertext,
141 uint64_t *Xi, unsigned char ivec[16], const void *key);
142 size_t unroll8_eor3_aes_gcm_dec_128_kernel(const uint8_t *ciphertext, uint64_t plaintext_length, uint8_t *plaintext,
143 uint64_t *Xi, unsigned char ivec[16], const void *key);
144 size_t unroll8_eor3_aes_gcm_dec_192_kernel(const uint8_t *ciphertext, uint64_t plaintext_length, uint8_t *plaintext,
145 uint64_t *Xi, unsigned char ivec[16], const void *key);
146 size_t unroll8_eor3_aes_gcm_dec_256_kernel(const uint8_t *ciphertext, uint64_t plaintext_length, uint8_t *plaintext,
147 uint64_t *Xi, unsigned char ivec[16], const void *key);
148 size_t armv8_aes_gcm_encrypt(const unsigned char *in, unsigned char *out, size_t len, const void *key,
149 unsigned char ivec[16], u64 *Xi);
150 size_t armv8_aes_gcm_decrypt(const unsigned char *in, unsigned char *out, size_t len, const void *key,
151 unsigned char ivec[16], u64 *Xi);
152 void gcm_ghash_v8(u64 Xi[2],const u128 Htable[16],const u8 *inp, size_t len);
156 # endif /* OPENSSL_CPUID_OBJ */
158 # if defined(AES_ASM) && ( \
159 defined(__x86_64) || defined(__x86_64__) || \
160 defined(_M_AMD64) || defined(_M_X64) )
161 # define AES_CBC_HMAC_SHA_CAPABLE 1
162 # define AESNI_CBC_HMAC_SHA_CAPABLE (OPENSSL_ia32cap_P[1]&(1<<(57-32)))
165 # if defined(__loongarch__) || defined(__loongarch64)
166 # include "loongarch_arch.h"
167 # if defined(VPAES_ASM)
168 # define VPAES_CAPABLE (OPENSSL_loongarch_hwcap_P & LOONGARCH_HWCAP_LSX)
172 # if defined(AES_ASM) && !defined(I386_ONLY) && ( \
173 ((defined(__i386) || defined(__i386__) || \
174 defined(_M_IX86)) && defined(OPENSSL_IA32_SSE2))|| \
175 defined(__x86_64) || defined(__x86_64__) || \
176 defined(_M_AMD64) || defined(_M_X64) )
180 # define AESNI_CAPABLE (OPENSSL_ia32cap_P[1]&(1<<(57-32)))
182 # define VPAES_CAPABLE (OPENSSL_ia32cap_P[1]&(1<<(41-32)))
185 # define BSAES_CAPABLE (OPENSSL_ia32cap_P[1]&(1<<(41-32)))
188 # define AES_GCM_ENC_BYTES 32
189 # define AES_GCM_DEC_BYTES 16
191 int aesni_set_encrypt_key(const unsigned char *userKey, int bits,
193 int aesni_set_decrypt_key(const unsigned char *userKey, int bits,
196 void aesni_encrypt(const unsigned char *in, unsigned char *out,
198 void aesni_decrypt(const unsigned char *in, unsigned char *out,
201 void aesni_ecb_encrypt(const unsigned char *in,
203 size_t length, const AES_KEY *key, int enc);
204 void aesni_cbc_encrypt(const unsigned char *in,
207 const AES_KEY *key, unsigned char *ivec, int enc);
208 # ifndef OPENSSL_NO_OCB
209 void aesni_ocb_encrypt(const unsigned char *in, unsigned char *out,
210 size_t blocks, const void *key,
211 size_t start_block_num,
212 unsigned char offset_i[16],
213 const unsigned char L_[][16],
214 unsigned char checksum[16]);
215 void aesni_ocb_decrypt(const unsigned char *in, unsigned char *out,
216 size_t blocks, const void *key,
217 size_t start_block_num,
218 unsigned char offset_i[16],
219 const unsigned char L_[][16],
220 unsigned char checksum[16]);
221 # endif /* OPENSSL_NO_OCB */
223 void aesni_ctr32_encrypt_blocks(const unsigned char *in,
226 const void *key, const unsigned char *ivec);
228 void aesni_xts_encrypt(const unsigned char *in,
231 const AES_KEY *key1, const AES_KEY *key2,
232 const unsigned char iv[16]);
234 void aesni_xts_decrypt(const unsigned char *in,
237 const AES_KEY *key1, const AES_KEY *key2,
238 const unsigned char iv[16]);
240 void aesni_ccm64_encrypt_blocks(const unsigned char *in,
244 const unsigned char ivec[16],
245 unsigned char cmac[16]);
247 void aesni_ccm64_decrypt_blocks(const unsigned char *in,
251 const unsigned char ivec[16],
252 unsigned char cmac[16]);
254 # if defined(__x86_64) || defined(__x86_64__) || defined(_M_AMD64) || defined(_M_X64)
255 size_t aesni_gcm_encrypt(const unsigned char *in, unsigned char *out, size_t len,
256 const void *key, unsigned char ivec[16], u64 *Xi);
257 size_t aesni_gcm_decrypt(const unsigned char *in, unsigned char *out, size_t len,
258 const void *key, unsigned char ivec[16], u64 *Xi);
259 void gcm_ghash_avx(u64 Xi[2], const u128 Htable[16], const u8 *in, size_t len);
261 # define AES_gcm_encrypt aesni_gcm_encrypt
262 # define AES_gcm_decrypt aesni_gcm_decrypt
263 # define AES_GCM_ASM(ctx) (ctx->ctr == aesni_ctr32_encrypt_blocks && \
264 ctx->gcm.funcs.ghash == gcm_ghash_avx)
268 # elif defined(AES_ASM) && (defined(__sparc) || defined(__sparc__))
270 /* Fujitsu SPARC64 X support */
271 # include "crypto/sparc_arch.h"
273 # define SPARC_AES_CAPABLE (OPENSSL_sparcv9cap_P[1] & CFR_AES)
274 # define HWAES_CAPABLE (OPENSSL_sparcv9cap_P[0] & SPARCV9_FJAESX)
275 # define HWAES_set_encrypt_key aes_fx_set_encrypt_key
276 # define HWAES_set_decrypt_key aes_fx_set_decrypt_key
277 # define HWAES_encrypt aes_fx_encrypt
278 # define HWAES_decrypt aes_fx_decrypt
279 # define HWAES_cbc_encrypt aes_fx_cbc_encrypt
280 # define HWAES_ctr32_encrypt_blocks aes_fx_ctr32_encrypt_blocks
282 void aes_t4_set_encrypt_key(const unsigned char *key, int bits, AES_KEY *ks);
283 void aes_t4_set_decrypt_key(const unsigned char *key, int bits, AES_KEY *ks);
284 void aes_t4_encrypt(const unsigned char *in, unsigned char *out,
286 void aes_t4_decrypt(const unsigned char *in, unsigned char *out,
289 * Key-length specific subroutines were chosen for following reason.
290 * Each SPARC T4 core can execute up to 8 threads which share core's
291 * resources. Loading as much key material to registers allows to
292 * minimize references to shared memory interface, as well as amount
293 * of instructions in inner loops [much needed on T4]. But then having
294 * non-key-length specific routines would require conditional branches
295 * either in inner loops or on subroutines' entries. Former is hardly
296 * acceptable, while latter means code size increase to size occupied
297 * by multiple key-length specific subroutines, so why fight?
299 void aes128_t4_cbc_encrypt(const unsigned char *in, unsigned char *out,
300 size_t len, const AES_KEY *key,
301 unsigned char *ivec, int /*unused*/);
302 void aes128_t4_cbc_decrypt(const unsigned char *in, unsigned char *out,
303 size_t len, const AES_KEY *key,
304 unsigned char *ivec, int /*unused*/);
305 void aes192_t4_cbc_encrypt(const unsigned char *in, unsigned char *out,
306 size_t len, const AES_KEY *key,
307 unsigned char *ivec, int /*unused*/);
308 void aes192_t4_cbc_decrypt(const unsigned char *in, unsigned char *out,
309 size_t len, const AES_KEY *key,
310 unsigned char *ivec, int /*unused*/);
311 void aes256_t4_cbc_encrypt(const unsigned char *in, unsigned char *out,
312 size_t len, const AES_KEY *key,
313 unsigned char *ivec, int /*unused*/);
314 void aes256_t4_cbc_decrypt(const unsigned char *in, unsigned char *out,
315 size_t len, const AES_KEY *key,
316 unsigned char *ivec, int /*unused*/);
317 void aes128_t4_ctr32_encrypt(const unsigned char *in, unsigned char *out,
318 size_t blocks, const AES_KEY *key,
319 unsigned char *ivec);
320 void aes192_t4_ctr32_encrypt(const unsigned char *in, unsigned char *out,
321 size_t blocks, const AES_KEY *key,
322 unsigned char *ivec);
323 void aes256_t4_ctr32_encrypt(const unsigned char *in, unsigned char *out,
324 size_t blocks, const AES_KEY *key,
325 unsigned char *ivec);
326 void aes128_t4_xts_encrypt(const unsigned char *in, unsigned char *out,
327 size_t blocks, const AES_KEY *key1,
328 const AES_KEY *key2, const unsigned char *ivec);
329 void aes128_t4_xts_decrypt(const unsigned char *in, unsigned char *out,
330 size_t blocks, const AES_KEY *key1,
331 const AES_KEY *key2, const unsigned char *ivec);
332 void aes256_t4_xts_encrypt(const unsigned char *in, unsigned char *out,
333 size_t blocks, const AES_KEY *key1,
334 const AES_KEY *key2, const unsigned char *ivec);
335 void aes256_t4_xts_decrypt(const unsigned char *in, unsigned char *out,
336 size_t blocks, const AES_KEY *key1,
337 const AES_KEY *key2, const unsigned char *ivec);
339 # elif defined(OPENSSL_CPUID_OBJ) && defined(__s390__)
340 /* IBM S390X support */
341 # include "s390x_arch.h"
344 /* Convert key size to function code: [16,24,32] -> [18,19,20]. */
345 # define S390X_AES_FC(keylen) (S390X_AES_128 + ((((keylen) << 3) - 128) >> 6))
347 /* Most modes of operation need km for partial block processing. */
348 # define S390X_aes_128_CAPABLE (OPENSSL_s390xcap_P.km[0] & \
349 S390X_CAPBIT(S390X_AES_128))
350 # define S390X_aes_192_CAPABLE (OPENSSL_s390xcap_P.km[0] & \
351 S390X_CAPBIT(S390X_AES_192))
352 # define S390X_aes_256_CAPABLE (OPENSSL_s390xcap_P.km[0] & \
353 S390X_CAPBIT(S390X_AES_256))
355 # define S390X_aes_128_cbc_CAPABLE 1 /* checked by callee */
356 # define S390X_aes_192_cbc_CAPABLE 1
357 # define S390X_aes_256_cbc_CAPABLE 1
359 # define S390X_aes_128_ecb_CAPABLE S390X_aes_128_CAPABLE
360 # define S390X_aes_192_ecb_CAPABLE S390X_aes_192_CAPABLE
361 # define S390X_aes_256_ecb_CAPABLE S390X_aes_256_CAPABLE
363 # define S390X_aes_128_ofb_CAPABLE (S390X_aes_128_CAPABLE && \
364 (OPENSSL_s390xcap_P.kmo[0] & \
365 S390X_CAPBIT(S390X_AES_128)))
366 # define S390X_aes_192_ofb_CAPABLE (S390X_aes_192_CAPABLE && \
367 (OPENSSL_s390xcap_P.kmo[0] & \
368 S390X_CAPBIT(S390X_AES_192)))
369 # define S390X_aes_256_ofb_CAPABLE (S390X_aes_256_CAPABLE && \
370 (OPENSSL_s390xcap_P.kmo[0] & \
371 S390X_CAPBIT(S390X_AES_256)))
373 # define S390X_aes_128_cfb_CAPABLE (S390X_aes_128_CAPABLE && \
374 (OPENSSL_s390xcap_P.kmf[0] & \
375 S390X_CAPBIT(S390X_AES_128)))
376 # define S390X_aes_192_cfb_CAPABLE (S390X_aes_192_CAPABLE && \
377 (OPENSSL_s390xcap_P.kmf[0] & \
378 S390X_CAPBIT(S390X_AES_192)))
379 # define S390X_aes_256_cfb_CAPABLE (S390X_aes_256_CAPABLE && \
380 (OPENSSL_s390xcap_P.kmf[0] & \
381 S390X_CAPBIT(S390X_AES_256)))
382 # define S390X_aes_128_cfb8_CAPABLE (OPENSSL_s390xcap_P.kmf[0] & \
383 S390X_CAPBIT(S390X_AES_128))
384 # define S390X_aes_192_cfb8_CAPABLE (OPENSSL_s390xcap_P.kmf[0] & \
385 S390X_CAPBIT(S390X_AES_192))
386 # define S390X_aes_256_cfb8_CAPABLE (OPENSSL_s390xcap_P.kmf[0] & \
387 S390X_CAPBIT(S390X_AES_256))
388 # define S390X_aes_128_cfb1_CAPABLE 0
389 # define S390X_aes_192_cfb1_CAPABLE 0
390 # define S390X_aes_256_cfb1_CAPABLE 0
392 # define S390X_aes_128_ctr_CAPABLE 1 /* checked by callee */
393 # define S390X_aes_192_ctr_CAPABLE 1
394 # define S390X_aes_256_ctr_CAPABLE 1
396 # define S390X_aes_128_xts_CAPABLE 1 /* checked by callee */
397 # define S390X_aes_256_xts_CAPABLE 1
399 # define S390X_aes_128_gcm_CAPABLE (S390X_aes_128_CAPABLE && \
400 (OPENSSL_s390xcap_P.kma[0] & \
401 S390X_CAPBIT(S390X_AES_128)))
402 # define S390X_aes_192_gcm_CAPABLE (S390X_aes_192_CAPABLE && \
403 (OPENSSL_s390xcap_P.kma[0] & \
404 S390X_CAPBIT(S390X_AES_192)))
405 # define S390X_aes_256_gcm_CAPABLE (S390X_aes_256_CAPABLE && \
406 (OPENSSL_s390xcap_P.kma[0] & \
407 S390X_CAPBIT(S390X_AES_256)))
409 # define S390X_aes_128_ccm_CAPABLE (S390X_aes_128_CAPABLE && \
410 (OPENSSL_s390xcap_P.kmac[0] & \
411 S390X_CAPBIT(S390X_AES_128)))
412 # define S390X_aes_192_ccm_CAPABLE (S390X_aes_192_CAPABLE && \
413 (OPENSSL_s390xcap_P.kmac[0] & \
414 S390X_CAPBIT(S390X_AES_192)))
415 # define S390X_aes_256_ccm_CAPABLE (S390X_aes_256_CAPABLE && \
416 (OPENSSL_s390xcap_P.kmac[0] & \
417 S390X_CAPBIT(S390X_AES_256)))
418 # define S390X_CCM_AAD_FLAG 0x40
420 # ifndef OPENSSL_NO_OCB
421 # define S390X_aes_128_ocb_CAPABLE 0
422 # define S390X_aes_192_ocb_CAPABLE 0
423 # define S390X_aes_256_ocb_CAPABLE 0
424 # endif /* OPENSSL_NO_OCB */
426 # ifndef OPENSSL_NO_SIV
427 # define S390X_aes_128_siv_CAPABLE 0
428 # define S390X_aes_192_siv_CAPABLE 0
429 # define S390X_aes_256_siv_CAPABLE 0
430 # endif /* OPENSSL_NO_SIV */
432 /* Convert key size to function code: [16,24,32] -> [18,19,20]. */
433 # define S390X_AES_FC(keylen) (S390X_AES_128 + ((((keylen) << 3) - 128) >> 6))
434 # elif defined(OPENSSL_CPUID_OBJ) && defined(__riscv) && __riscv_xlen == 64
435 /* RISC-V 64 support */
436 # include "riscv_arch.h"
438 /* Zkne and Zknd extensions (scalar crypto AES). */
439 int rv64i_zkne_set_encrypt_key(const unsigned char *userKey, const int bits,
441 int rv64i_zknd_set_decrypt_key(const unsigned char *userKey, const int bits,
443 void rv64i_zkne_encrypt(const unsigned char *in, unsigned char *out,
445 void rv64i_zknd_decrypt(const unsigned char *in, unsigned char *out,
447 /* Zvkned extension (vector crypto AES). */
448 int rv64i_zvkned_set_encrypt_key(const unsigned char *userKey, const int bits,
450 int rv64i_zvkned_set_decrypt_key(const unsigned char *userKey, const int bits,
452 void rv64i_zvkned_encrypt(const unsigned char *in, unsigned char *out,
454 void rv64i_zvkned_decrypt(const unsigned char *in, unsigned char *out,
457 void rv64i_zvkned_cbc_encrypt(const unsigned char *in, unsigned char *out,
458 size_t length, const AES_KEY *key,
459 unsigned char *ivec, const int enc);
461 void rv64i_zvkned_cbc_decrypt(const unsigned char *in, unsigned char *out,
462 size_t length, const AES_KEY *key,
463 unsigned char *ivec, const int enc);
465 void rv64i_zvkned_ecb_encrypt(const unsigned char *in, unsigned char *out,
466 size_t length, const AES_KEY *key,
469 void rv64i_zvkned_ecb_decrypt(const unsigned char *in, unsigned char *out,
470 size_t length, const AES_KEY *key,
473 void rv64i_zvkb_zvkned_ctr32_encrypt_blocks(const unsigned char *in,
474 unsigned char *out, size_t blocks,
476 const unsigned char ivec[16]);
478 # elif defined(OPENSSL_CPUID_OBJ) && defined(__riscv) && __riscv_xlen == 32
479 /* RISC-V 32 support */
480 # include "riscv_arch.h"
482 int rv32i_zkne_set_encrypt_key(const unsigned char *userKey, const int bits,
484 /* set_decrypt_key needs both zknd and zkne */
485 int rv32i_zknd_zkne_set_decrypt_key(const unsigned char *userKey, const int bits,
487 int rv32i_zbkb_zkne_set_encrypt_key(const unsigned char *userKey, const int bits,
489 int rv32i_zbkb_zknd_zkne_set_decrypt_key(const unsigned char *userKey, const int bits,
491 void rv32i_zkne_encrypt(const unsigned char *in, unsigned char *out,
493 void rv32i_zknd_decrypt(const unsigned char *in, unsigned char *out,
497 # if defined(HWAES_CAPABLE)
498 int HWAES_set_encrypt_key(const unsigned char *userKey, const int bits,
500 int HWAES_set_decrypt_key(const unsigned char *userKey, const int bits,
502 void HWAES_encrypt(const unsigned char *in, unsigned char *out,
504 void HWAES_decrypt(const unsigned char *in, unsigned char *out,
506 void HWAES_cbc_encrypt(const unsigned char *in, unsigned char *out,
507 size_t length, const AES_KEY *key,
508 unsigned char *ivec, const int enc);
509 void HWAES_ecb_encrypt(const unsigned char *in, unsigned char *out,
510 size_t length, const AES_KEY *key,
512 void HWAES_ctr32_encrypt_blocks(const unsigned char *in, unsigned char *out,
513 size_t len, const void *key,
514 const unsigned char ivec[16]);
515 void HWAES_xts_encrypt(const unsigned char *inp, unsigned char *out,
516 size_t len, const AES_KEY *key1,
517 const AES_KEY *key2, const unsigned char iv[16]);
518 void HWAES_xts_decrypt(const unsigned char *inp, unsigned char *out,
519 size_t len, const AES_KEY *key1,
520 const AES_KEY *key2, const unsigned char iv[16]);
521 # ifndef OPENSSL_NO_OCB
522 # ifdef HWAES_ocb_encrypt
523 void HWAES_ocb_encrypt(const unsigned char *in, unsigned char *out,
524 size_t blocks, const void *key,
525 size_t start_block_num,
526 unsigned char offset_i[16],
527 const unsigned char L_[][16],
528 unsigned char checksum[16]);
530 # define HWAES_ocb_encrypt ((ocb128_f)NULL)
532 # ifdef HWAES_ocb_decrypt
533 void HWAES_ocb_decrypt(const unsigned char *in, unsigned char *out,
534 size_t blocks, const void *key,
535 size_t start_block_num,
536 unsigned char offset_i[16],
537 const unsigned char L_[][16],
538 unsigned char checksum[16]);
540 # define HWAES_ocb_decrypt ((ocb128_f)NULL)
542 # endif /* OPENSSL_NO_OCB */
544 # endif /* HWAES_CAPABLE */
546 #endif /* OSSL_AES_PLATFORM_H */