2 * Copyright 2011-2022 The OpenSSL Project Authors. All Rights Reserved.
4 * Licensed under the Apache License 2.0 (the "License"). You may not use
5 * this file except in compliance with the License. You can obtain a copy
6 * in the file LICENSE in the source distribution or at
7 * https://www.openssl.org/source/license.html
15 #include <openssl/crypto.h>
17 #include <sys/sysctl.h>
19 #include "internal/cryptlib.h"
27 unsigned int OPENSSL_armcap_P = 0;
28 unsigned int OPENSSL_arm_midr = 0;
29 unsigned int OPENSSL_armv8_rsa_neonized = 0;
32 void OPENSSL_cpuid_setup(void)
34 OPENSSL_armcap_P |= ARMV7_NEON;
35 OPENSSL_armv8_rsa_neonized = 1;
36 if (IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE)) {
37 // These are all covered by one call in Windows
38 OPENSSL_armcap_P |= ARMV8_AES;
39 OPENSSL_armcap_P |= ARMV8_PMULL;
40 OPENSSL_armcap_P |= ARMV8_SHA1;
41 OPENSSL_armcap_P |= ARMV8_SHA256;
45 uint32_t OPENSSL_rdtsc(void)
49 #elif __ARM_MAX_ARCH__<7
50 void OPENSSL_cpuid_setup(void)
54 uint32_t OPENSSL_rdtsc(void)
59 static sigset_t all_masked;
61 static sigjmp_buf ill_jmp;
62 static void ill_handler(int sig)
64 siglongjmp(ill_jmp, sig);
68 * Following subroutines could have been inlined, but it's not all
69 * ARM compilers support inline assembler...
71 void _armv7_neon_probe(void);
72 void _armv8_aes_probe(void);
73 void _armv8_sha1_probe(void);
74 void _armv8_sha256_probe(void);
75 void _armv8_pmull_probe(void);
77 void _armv8_sm3_probe(void);
78 void _armv8_sm4_probe(void);
79 void _armv8_eor3_probe(void);
80 void _armv8_sha512_probe(void);
81 unsigned int _armv8_cpuid_probe(void);
82 void _armv8_sve_probe(void);
83 void _armv8_sve2_probe(void);
84 void _armv8_rng_probe(void);
86 size_t OPENSSL_rndr_asm(unsigned char *buf, size_t len);
87 size_t OPENSSL_rndrrs_asm(unsigned char *buf, size_t len);
89 size_t OPENSSL_rndr_bytes(unsigned char *buf, size_t len);
90 size_t OPENSSL_rndrrs_bytes(unsigned char *buf, size_t len);
92 static size_t OPENSSL_rndr_wrapper(size_t (*func)(unsigned char *, size_t), unsigned char *buf, size_t len)
94 size_t buffer_size = 0;
97 for (i = 0; i < 8; i++) {
98 buffer_size = func(buf, len);
99 if (buffer_size == len)
101 usleep(5000); /* 5000 microseconds (5 milliseconds) */
106 size_t OPENSSL_rndr_bytes(unsigned char *buf, size_t len)
108 return OPENSSL_rndr_wrapper(OPENSSL_rndr_asm, buf, len);
111 size_t OPENSSL_rndrrs_bytes(unsigned char *buf, size_t len)
113 return OPENSSL_rndr_wrapper(OPENSSL_rndrrs_asm, buf, len);
116 uint32_t _armv7_tick(void);
118 uint32_t OPENSSL_rdtsc(void)
120 if (OPENSSL_armcap_P & ARMV7_TICK)
121 return _armv7_tick();
126 # if defined(__GNUC__) && __GNUC__>=2
127 void OPENSSL_cpuid_setup(void) __attribute__ ((constructor));
130 # if defined(__GLIBC__) && defined(__GLIBC_PREREQ)
131 # if __GLIBC_PREREQ(2, 16)
132 # include <sys/auxv.h>
133 # define OSSL_IMPLEMENT_GETAUXVAL
135 # elif defined(__ANDROID_API__)
136 /* see https://developer.android.google.cn/ndk/guides/cpu-features */
137 # if __ANDROID_API__ >= 18
138 # include <sys/auxv.h>
139 # define OSSL_IMPLEMENT_GETAUXVAL
142 # if defined(__FreeBSD__)
143 # include <sys/param.h>
144 # if __FreeBSD_version >= 1200000
145 # include <sys/auxv.h>
146 # define OSSL_IMPLEMENT_GETAUXVAL
148 static unsigned long getauxval(unsigned long key)
150 unsigned long val = 0ul;
152 if (elf_aux_info((int)key, &val, sizeof(val)) != 0)
161 * Android: according to https://developer.android.com/ndk/guides/cpu-features,
162 * getauxval is supported starting with API level 18
164 # if defined(__ANDROID__) && defined(__ANDROID_API__) && __ANDROID_API__ >= 18
165 # include <sys/auxv.h>
166 # define OSSL_IMPLEMENT_GETAUXVAL
170 * ARM puts the feature bits for Crypto Extensions in AT_HWCAP2, whereas
171 * AArch64 used AT_HWCAP.
177 # define AT_HWCAP2 26
179 # if defined(__arm__) || defined (__arm)
180 # define HWCAP AT_HWCAP
181 # define HWCAP_NEON (1 << 12)
183 # define HWCAP_CE AT_HWCAP2
184 # define HWCAP_CE_AES (1 << 0)
185 # define HWCAP_CE_PMULL (1 << 1)
186 # define HWCAP_CE_SHA1 (1 << 2)
187 # define HWCAP_CE_SHA256 (1 << 3)
188 # elif defined(__aarch64__)
189 # define HWCAP AT_HWCAP
190 # define HWCAP_NEON (1 << 1)
192 # define HWCAP_CE HWCAP
193 # define HWCAP_CE_AES (1 << 3)
194 # define HWCAP_CE_PMULL (1 << 4)
195 # define HWCAP_CE_SHA1 (1 << 5)
196 # define HWCAP_CE_SHA256 (1 << 6)
197 # define HWCAP_CPUID (1 << 11)
198 # define HWCAP_SHA3 (1 << 17)
199 # define HWCAP_CE_SM3 (1 << 18)
200 # define HWCAP_CE_SM4 (1 << 19)
201 # define HWCAP_CE_SHA512 (1 << 21)
202 # define HWCAP_SVE (1 << 22)
205 # define HWCAP2_SVE2 (1 << 1)
206 # define HWCAP2_RNG (1 << 16)
209 void OPENSSL_cpuid_setup(void)
212 struct sigaction ill_oact, ill_act;
214 static int trigger = 0;
220 OPENSSL_armcap_P = 0;
222 if ((e = getenv("OPENSSL_armcap"))) {
223 OPENSSL_armcap_P = (unsigned int)strtoul(e, NULL, 0);
227 # if defined(__APPLE__)
228 # if !defined(__aarch64__)
230 * Capability probing by catching SIGILL appears to be problematic
231 * on iOS. But since Apple universe is "monocultural", it's actually
232 * possible to simply set pre-defined processor capability mask.
235 OPENSSL_armcap_P = ARMV7_NEON;
239 * One could do same even for __aarch64__ iOS builds. It's not done
240 * exclusively for reasons of keeping code unified across platforms.
241 * Unified code works because it never triggers SIGILL on Apple
246 unsigned int feature;
247 size_t len = sizeof(feature);
250 if (sysctlbyname("hw.optional.armv8_2_sha512", &feature, &len, NULL, 0) == 0 && feature == 1)
251 OPENSSL_armcap_P |= ARMV8_SHA512;
253 if (sysctlbyname("hw.optional.armv8_2_sha3", &feature, &len, NULL, 0) == 0 && feature == 1) {
254 OPENSSL_armcap_P |= ARMV8_SHA3;
256 if ((sysctlbyname("machdep.cpu.brand_string", uarch, &len, NULL, 0) == 0) &&
257 ((strncmp(uarch, "Apple M1", 8) == 0) ||
258 (strncmp(uarch, "Apple M2", 8) == 0)))
259 OPENSSL_armcap_P |= ARMV8_UNROLL8_EOR3;
265 # ifdef OSSL_IMPLEMENT_GETAUXVAL
266 if (getauxval(HWCAP) & HWCAP_NEON) {
267 unsigned long hwcap = getauxval(HWCAP_CE);
269 OPENSSL_armcap_P |= ARMV7_NEON;
271 if (hwcap & HWCAP_CE_AES)
272 OPENSSL_armcap_P |= ARMV8_AES;
274 if (hwcap & HWCAP_CE_PMULL)
275 OPENSSL_armcap_P |= ARMV8_PMULL;
277 if (hwcap & HWCAP_CE_SHA1)
278 OPENSSL_armcap_P |= ARMV8_SHA1;
280 if (hwcap & HWCAP_CE_SHA256)
281 OPENSSL_armcap_P |= ARMV8_SHA256;
284 if (hwcap & HWCAP_CE_SM4)
285 OPENSSL_armcap_P |= ARMV8_SM4;
287 if (hwcap & HWCAP_CE_SHA512)
288 OPENSSL_armcap_P |= ARMV8_SHA512;
290 if (hwcap & HWCAP_CPUID)
291 OPENSSL_armcap_P |= ARMV8_CPUID;
293 if (hwcap & HWCAP_CE_SM3)
294 OPENSSL_armcap_P |= ARMV8_SM3;
295 if (hwcap & HWCAP_SHA3)
296 OPENSSL_armcap_P |= ARMV8_SHA3;
300 if (getauxval(HWCAP) & HWCAP_SVE)
301 OPENSSL_armcap_P |= ARMV8_SVE;
303 if (getauxval(HWCAP2) & HWCAP2_SVE2)
304 OPENSSL_armcap_P |= ARMV8_SVE2;
306 if (getauxval(HWCAP2) & HWCAP2_RNG)
307 OPENSSL_armcap_P |= ARMV8_RNG;
311 sigfillset(&all_masked);
312 sigdelset(&all_masked, SIGILL);
313 sigdelset(&all_masked, SIGTRAP);
314 sigdelset(&all_masked, SIGFPE);
315 sigdelset(&all_masked, SIGBUS);
316 sigdelset(&all_masked, SIGSEGV);
318 memset(&ill_act, 0, sizeof(ill_act));
319 ill_act.sa_handler = ill_handler;
320 ill_act.sa_mask = all_masked;
322 sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset);
323 sigaction(SIGILL, &ill_act, &ill_oact);
325 /* If we used getauxval, we already have all the values */
326 # ifndef OSSL_IMPLEMENT_GETAUXVAL
327 if (sigsetjmp(ill_jmp, 1) == 0) {
329 OPENSSL_armcap_P |= ARMV7_NEON;
330 if (sigsetjmp(ill_jmp, 1) == 0) {
331 _armv8_pmull_probe();
332 OPENSSL_armcap_P |= ARMV8_PMULL | ARMV8_AES;
333 } else if (sigsetjmp(ill_jmp, 1) == 0) {
335 OPENSSL_armcap_P |= ARMV8_AES;
337 if (sigsetjmp(ill_jmp, 1) == 0) {
339 OPENSSL_armcap_P |= ARMV8_SHA1;
341 if (sigsetjmp(ill_jmp, 1) == 0) {
342 _armv8_sha256_probe();
343 OPENSSL_armcap_P |= ARMV8_SHA256;
345 # if defined(__aarch64__) && !defined(__APPLE__)
346 if (sigsetjmp(ill_jmp, 1) == 0) {
348 OPENSSL_armcap_P |= ARMV8_SM4;
351 if (sigsetjmp(ill_jmp, 1) == 0) {
352 _armv8_sha512_probe();
353 OPENSSL_armcap_P |= ARMV8_SHA512;
356 if (sigsetjmp(ill_jmp, 1) == 0) {
358 OPENSSL_armcap_P |= ARMV8_SM3;
360 if (sigsetjmp(ill_jmp, 1) == 0) {
362 OPENSSL_armcap_P |= ARMV8_SHA3;
367 if (sigsetjmp(ill_jmp, 1) == 0) {
369 OPENSSL_armcap_P |= ARMV8_SVE;
372 if (sigsetjmp(ill_jmp, 1) == 0) {
374 OPENSSL_armcap_P |= ARMV8_SVE2;
377 if (sigsetjmp(ill_jmp, 1) == 0) {
379 OPENSSL_armcap_P |= ARMV8_RNG;
385 * Probing for ARMV7_TICK is known to produce unreliable results,
386 * so we will only use the feature when the user explicitly enables
387 * it with OPENSSL_armcap.
390 sigaction(SIGILL, &ill_oact, NULL);
391 sigprocmask(SIG_SETMASK, &oset, NULL);
394 if (OPENSSL_armcap_P & ARMV8_CPUID)
395 OPENSSL_arm_midr = _armv8_cpuid_probe();
397 if ((MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A72) ||
398 MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_N1)) &&
399 (OPENSSL_armcap_P & ARMV7_NEON)) {
400 OPENSSL_armv8_rsa_neonized = 1;
402 if ((MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_V1) ||
403 MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_N2)) &&
404 (OPENSSL_armcap_P & ARMV8_SHA3))
405 OPENSSL_armcap_P |= ARMV8_UNROLL8_EOR3;