2 * Copyright 2011-2021 The OpenSSL Project Authors. All Rights Reserved.
4 * Licensed under the Apache License 2.0 (the "License"). You may not use
5 * this file except in compliance with the License. You can obtain a copy
6 * in the file LICENSE in the source distribution or at
7 * https://www.openssl.org/source/license.html
15 #include <openssl/crypto.h>
17 #include <sys/sysctl.h>
19 #include "internal/cryptlib.h"
24 unsigned int OPENSSL_armcap_P = 0;
25 unsigned int OPENSSL_arm_midr = 0;
26 unsigned int OPENSSL_armv8_rsa_neonized = 0;
28 #if __ARM_MAX_ARCH__<7
29 void OPENSSL_cpuid_setup(void)
33 uint32_t OPENSSL_rdtsc(void)
38 static sigset_t all_masked;
40 static sigjmp_buf ill_jmp;
41 static void ill_handler(int sig)
43 siglongjmp(ill_jmp, sig);
47 * Following subroutines could have been inlined, but it's not all
48 * ARM compilers support inline assembler...
50 void _armv7_neon_probe(void);
51 void _armv8_aes_probe(void);
52 void _armv8_sha1_probe(void);
53 void _armv8_sha256_probe(void);
54 void _armv8_pmull_probe(void);
56 void _armv8_sm3_probe(void);
57 void _armv8_sha512_probe(void);
58 unsigned int _armv8_cpuid_probe(void);
59 void _armv8_rng_probe(void);
61 size_t OPENSSL_rndr_asm(unsigned char *buf, size_t len);
62 size_t OPENSSL_rndrrs_asm(unsigned char *buf, size_t len);
64 size_t OPENSSL_rndr_bytes(unsigned char *buf, size_t len);
65 size_t OPENSSL_rndrrs_bytes(unsigned char *buf, size_t len);
67 static size_t OPENSSL_rndr_wrapper(size_t (*func)(unsigned char *, size_t), unsigned char *buf, size_t len)
69 size_t buffer_size = 0;
72 for (i = 0; i < 8; i++) {
73 buffer_size = func(buf, len);
74 if (buffer_size == len)
76 usleep(5000); /* 5000 microseconds (5 milliseconds) */
81 size_t OPENSSL_rndr_bytes(unsigned char *buf, size_t len)
83 return OPENSSL_rndr_wrapper(OPENSSL_rndr_asm, buf, len);
86 size_t OPENSSL_rndrrs_bytes(unsigned char *buf, size_t len)
88 return OPENSSL_rndr_wrapper(OPENSSL_rndrrs_asm, buf, len);
91 uint32_t _armv7_tick(void);
93 uint32_t OPENSSL_rdtsc(void)
95 if (OPENSSL_armcap_P & ARMV7_TICK)
101 # if defined(__GNUC__) && __GNUC__>=2
102 void OPENSSL_cpuid_setup(void) __attribute__ ((constructor));
105 # if defined(__GLIBC__) && defined(__GLIBC_PREREQ)
106 # if __GLIBC_PREREQ(2, 16)
107 # include <sys/auxv.h>
108 # define OSSL_IMPLEMENT_GETAUXVAL
110 # elif defined(__ANDROID_API__)
111 /* see https://developer.android.google.cn/ndk/guides/cpu-features */
112 # if __ANDROID_API__ >= 18
113 # include <sys/auxv.h>
114 # define OSSL_IMPLEMENT_GETAUXVAL
117 # if defined(__FreeBSD__)
118 # include <sys/param.h>
119 # if __FreeBSD_version >= 1200000
120 # include <sys/auxv.h>
121 # define OSSL_IMPLEMENT_GETAUXVAL
123 static unsigned long getauxval(unsigned long key)
125 unsigned long val = 0ul;
127 if (elf_aux_info((int)key, &val, sizeof(val)) != 0)
136 * Android: according to https://developer.android.com/ndk/guides/cpu-features,
137 * getauxval is supported starting with API level 18
139 # if defined(__ANDROID__) && defined(__ANDROID_API__) && __ANDROID_API__ >= 18
140 # include <sys/auxv.h>
141 # define OSSL_IMPLEMENT_GETAUXVAL
145 * ARM puts the feature bits for Crypto Extensions in AT_HWCAP2, whereas
146 * AArch64 used AT_HWCAP.
152 # define AT_HWCAP2 26
154 # if defined(__arm__) || defined (__arm)
155 # define HWCAP AT_HWCAP
156 # define HWCAP_NEON (1 << 12)
158 # define HWCAP_CE AT_HWCAP2
159 # define HWCAP_CE_AES (1 << 0)
160 # define HWCAP_CE_PMULL (1 << 1)
161 # define HWCAP_CE_SHA1 (1 << 2)
162 # define HWCAP_CE_SHA256 (1 << 3)
163 # elif defined(__aarch64__)
164 # define HWCAP AT_HWCAP
165 # define HWCAP_NEON (1 << 1)
167 # define HWCAP_CE HWCAP
168 # define HWCAP_CE_AES (1 << 3)
169 # define HWCAP_CE_PMULL (1 << 4)
170 # define HWCAP_CE_SHA1 (1 << 5)
171 # define HWCAP_CE_SHA256 (1 << 6)
172 # define HWCAP_CPUID (1 << 11)
173 # define HWCAP_CE_SM3 (1 << 18)
174 # define HWCAP_CE_SHA512 (1 << 21)
177 # define HWCAP2_RNG (1 << 16)
180 void OPENSSL_cpuid_setup(void)
183 struct sigaction ill_oact, ill_act;
185 static int trigger = 0;
191 OPENSSL_armcap_P = 0;
193 if ((e = getenv("OPENSSL_armcap"))) {
194 OPENSSL_armcap_P = (unsigned int)strtoul(e, NULL, 0);
198 # if defined(__APPLE__)
199 # if !defined(__aarch64__)
201 * Capability probing by catching SIGILL appears to be problematic
202 * on iOS. But since Apple universe is "monocultural", it's actually
203 * possible to simply set pre-defined processor capability mask.
206 OPENSSL_armcap_P = ARMV7_NEON;
210 * One could do same even for __aarch64__ iOS builds. It's not done
211 * exclusively for reasons of keeping code unified across platforms.
212 * Unified code works because it never triggers SIGILL on Apple
218 size_t len = sizeof(sha512);
220 if (sysctlbyname("hw.optional.armv8_2_sha512", &sha512, &len, NULL, 0) == 0 && sha512 == 1)
221 OPENSSL_armcap_P |= ARMV8_SHA512;
226 # ifdef OSSL_IMPLEMENT_GETAUXVAL
227 if (getauxval(HWCAP) & HWCAP_NEON) {
228 unsigned long hwcap = getauxval(HWCAP_CE);
230 OPENSSL_armcap_P |= ARMV7_NEON;
232 if (hwcap & HWCAP_CE_AES)
233 OPENSSL_armcap_P |= ARMV8_AES;
235 if (hwcap & HWCAP_CE_PMULL)
236 OPENSSL_armcap_P |= ARMV8_PMULL;
238 if (hwcap & HWCAP_CE_SHA1)
239 OPENSSL_armcap_P |= ARMV8_SHA1;
241 if (hwcap & HWCAP_CE_SHA256)
242 OPENSSL_armcap_P |= ARMV8_SHA256;
245 if (hwcap & HWCAP_CE_SHA512)
246 OPENSSL_armcap_P |= ARMV8_SHA512;
248 if (hwcap & HWCAP_CPUID)
249 OPENSSL_armcap_P |= ARMV8_CPUID;
251 if (hwcap & HWCAP_CE_SM3)
252 OPENSSL_armcap_P |= ARMV8_SM3;
256 if (getauxval(HWCAP2) & HWCAP2_RNG)
257 OPENSSL_armcap_P |= ARMV8_RNG;
261 sigfillset(&all_masked);
262 sigdelset(&all_masked, SIGILL);
263 sigdelset(&all_masked, SIGTRAP);
264 sigdelset(&all_masked, SIGFPE);
265 sigdelset(&all_masked, SIGBUS);
266 sigdelset(&all_masked, SIGSEGV);
268 memset(&ill_act, 0, sizeof(ill_act));
269 ill_act.sa_handler = ill_handler;
270 ill_act.sa_mask = all_masked;
272 sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset);
273 sigaction(SIGILL, &ill_act, &ill_oact);
275 /* If we used getauxval, we already have all the values */
276 # ifndef OSSL_IMPLEMENT_GETAUXVAL
277 if (sigsetjmp(ill_jmp, 1) == 0) {
279 OPENSSL_armcap_P |= ARMV7_NEON;
280 if (sigsetjmp(ill_jmp, 1) == 0) {
281 _armv8_pmull_probe();
282 OPENSSL_armcap_P |= ARMV8_PMULL | ARMV8_AES;
283 } else if (sigsetjmp(ill_jmp, 1) == 0) {
285 OPENSSL_armcap_P |= ARMV8_AES;
287 if (sigsetjmp(ill_jmp, 1) == 0) {
289 OPENSSL_armcap_P |= ARMV8_SHA1;
291 if (sigsetjmp(ill_jmp, 1) == 0) {
292 _armv8_sha256_probe();
293 OPENSSL_armcap_P |= ARMV8_SHA256;
295 # if defined(__aarch64__) && !defined(__APPLE__)
296 if (sigsetjmp(ill_jmp, 1) == 0) {
297 _armv8_sha512_probe();
298 OPENSSL_armcap_P |= ARMV8_SHA512;
301 if (sigsetjmp(ill_jmp, 1) == 0) {
303 OPENSSL_armcap_P |= ARMV8_SM3;
308 if (sigsetjmp(ill_jmp, 1) == 0) {
310 OPENSSL_armcap_P |= ARMV8_RNG;
315 /* Things that getauxval didn't tell us */
316 if (sigsetjmp(ill_jmp, 1) == 0) {
318 OPENSSL_armcap_P |= ARMV7_TICK;
321 sigaction(SIGILL, &ill_oact, NULL);
322 sigprocmask(SIG_SETMASK, &oset, NULL);
325 if (OPENSSL_armcap_P & ARMV8_CPUID)
326 OPENSSL_arm_midr = _armv8_cpuid_probe();
328 if ((MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A72) ||
329 MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_N1)) &&
330 (OPENSSL_armcap_P & ARMV7_NEON)) {
331 OPENSSL_armv8_rsa_neonized = 1;