[as per http://cvs.openssl.org/chngview?cn=14551].
sub main'por { &out2("por",@_); }
sub main'pand { &out2("pand",@_); }
sub main'movq {
sub main'por { &out2("por",@_); }
sub main'pand { &out2("pand",@_); }
sub main'movq {
- local($p1,$p2)=@_;
- if ($p1=~/^mm[0-7]$/ && $p2=~/^mm[0-7]$/)
- # movq between mmx registers sinks Intel CPUs
+ local($p1,$p2,$optimize)=@_;
+ if ($optimize && $p1=~/^mm[0-7]$/ && $p2=~/^mm[0-7]$/)
+ # movq between mmx registers can sink Intel CPUs
{ push(@out,"\tpshufw\t\$0xe4,%$p2,%$p1\n"); }
else { &out2("movq",@_); }
}
{ push(@out,"\tpshufw\t\$0xe4,%$p2,%$p1\n"); }
else { &out2("movq",@_); }
}
#
# 2.4GHz P4 1.4GHz AMD32 1.4GHz AMD64(*)
# SHA256/gcc(*) 54 43 59
#
# 2.4GHz P4 1.4GHz AMD32 1.4GHz AMD64(*)
# SHA256/gcc(*) 54 43 59
# SHA512/sse2 61(**) 57(**)
# SHA512/icc 26 28
# SHA256/icc(*) 65 54
# SHA512/sse2 61(**) 57(**)
# SHA512/icc 26 28
# SHA256/icc(*) 65 54