Wire SHA3 EVPs and add tests.

[openssl.git] / crypto / perlasm / sparcv9_modes.pl

diff --git a/crypto/perlasm/sparcv9_modes.pl b/crypto/perlasm/sparcv9_modes.pl
index a13ffcec2d1d870eb917c35386d3267266134490..b9922e031893cd38cd1df805ab32b6aa12a483f0 100644 (file)
--- a/crypto/perlasm/sparcv9_modes.pl
+++ b/crypto/perlasm/sparcv9_modes.pl
@@ -1,4 +1,11 @@
-#!/usr/bin/env perl
+#! /usr/bin/env perl
+# Copyright 2012-2016 The OpenSSL Project Authors. All Rights Reserved.
+#
+# Licensed under the OpenSSL license (the "License").  You may not use
+# this file except in compliance with the License.  You can obtain a copy
+# in the file LICENSE in the source distribution or at
+# https://www.openssl.org/source/license.html
+
 
 # Specific modes implementations for SPARC Architecture 2011. There
 # is T4 dependency though, an ASI value that is not specified in the
@@ -16,6 +23,10 @@
 # block sizes [though few percent better for not so long ones]. All
 # this based on suggestions from David Miller.
 
+$::bias="STACK_BIAS";
+$::frame="STACK_FRAME";
+$::size_t_cc="SIZE_T_CC";
+
 sub asm_init {         # to be called with @ARGV as argument
     for (@_)           { $::abibits=64 if (/\-m64/ || /\-xarch\=v9/); }
     if ($::abibits==64)        { $::bias=2047; $::frame=192; $::size_t_cc="%xcc"; }
@@ -35,6 +46,9 @@ $::code.=<<___;
 .align 32
 ${alg}${bits}_t4_cbc_encrypt:
        save            %sp, -$::frame, %sp
+       cmp             $len, 0
+       be,pn           $::size_t_cc, .L${bits}_cbc_enc_abort
+       srln            $len, 0, $len           ! needed on v8+, "nop" on v9
        sub             $inp, $out, $blk_init   ! $inp!=$out
 ___
 $::code.=<<___ if (!$::evp);
@@ -103,7 +117,7 @@ $::code.=<<___;
 
        brnz,pn         $ooff, 2f
        sub             $len, 1, $len
-               
+
        std             %f0, [$out + 0]
        std             %f2, [$out + 8]
        brnz,pt         $len, .L${bits}_cbc_enc_loop
@@ -123,6 +137,7 @@ $::code.=<<___ if (!$::evp);
        std             %f2, [$ivec + 8]
 ___
 $::code.=<<___;
+.L${bits}_cbc_enc_abort:
        ret
        restore
 
@@ -209,7 +224,7 @@ $::code.=<<___;
        call            _${alg}${bits}_encrypt_1x
        add             $inp, 16, $inp
        sub             $len, 1, $len
-               
+
        stda            %f0, [$out]0xe2         ! ASI_BLK_INIT, T4-specific
        add             $out, 8, $out
        stda            %f2, [$out]0xe2         ! ASI_BLK_INIT, T4-specific
@@ -249,6 +264,9 @@ $::code.=<<___;
 .align 32
 ${alg}${bits}_t4_cbc_decrypt:
        save            %sp, -$::frame, %sp
+       cmp             $len, 0
+       be,pn           $::size_t_cc, .L${bits}_cbc_dec_abort
+       srln            $len, 0, $len           ! needed on v8+, "nop" on v9
        sub             $inp, $out, $blk_init   ! $inp!=$out
 ___
 $::code.=<<___ if (!$::evp);
@@ -321,7 +339,7 @@ $::code.=<<___;
 
        brnz,pn         $ooff, 2f
        sub             $len, 1, $len
-               
+
        std             %f0, [$out + 0]
        std             %f2, [$out + 8]
        brnz,pt         $len, .L${bits}_cbc_dec_loop2x
@@ -341,6 +359,7 @@ $::code.=<<___ if (!$::evp);
        std             %f14, [$ivec + 8]
 ___
 $::code.=<<___;
+.L${bits}_cbc_dec_abort:
        ret
        restore
 
@@ -426,7 +445,7 @@ $::code.=<<___;
 
        brnz,pn         $ooff, 2f
        sub             $len, 2, $len
-               
+
        std             %f0, [$out + 0]
        std             %f2, [$out + 8]
        std             %f4, [$out + 16]
@@ -607,6 +626,7 @@ $::code.=<<___;
 .align 32
 ${alg}${bits}_t4_ctr32_encrypt:
        save            %sp, -$::frame, %sp
+       srln            $len, 0, $len           ! needed on v8+, "nop" on v9
 
        prefetch        [$inp], 20
        prefetch        [$inp + 63], 20
@@ -682,7 +702,7 @@ $::code.=<<___;
 
        brnz,pn         $ooff, 2f
        sub             $len, 1, $len
-               
+
        std             %f0, [$out + 0]
        std             %f2, [$out + 8]
        brnz,pt         $len, .L${bits}_ctr32_loop2x
@@ -771,7 +791,7 @@ $::code.=<<___;
 
        brnz,pn         $ooff, 2f
        sub             $len, 2, $len
-               
+
        std             %f0, [$out + 0]
        std             %f2, [$out + 8]
        std             %f4, [$out + 16]
@@ -910,6 +930,7 @@ $::code.=<<___;
 .align 32
 ${alg}${bits}_t4_xts_${dir}crypt:
        save            %sp, -$::frame-16, %sp
+       srln            $len, 0, $len           ! needed on v8+, "nop" on v9
 
        mov             $ivec, %o0
        add             %fp, $::bias-16, %o1
@@ -1003,7 +1024,7 @@ $code.=<<___;
 
        brnz,pn         $ooff, 2f
        sub             $len, 1, $len
-               
+
        std             %f0, [$out + 0]
        std             %f2, [$out + 8]
        brnz,pt         $len, .L${bits}_xts_${dir}loop2x
@@ -1114,7 +1135,7 @@ $code.=<<___;
 
        brnz,pn         $ooff, 2f
        sub             $len, 2, $len
-               
+
        std             %f0, [$out + 0]
        std             %f2, [$out + 8]
        std             %f4, [$out + 16]
@@ -1243,6 +1264,7 @@ $code.=<<___;
        fxor            %f8,  %f4, %f4
        fxor            %f10, %f6, %f6
 
+       subcc           $len, 2, $len
        stda            %f0, [$out]0xe2         ! ASI_BLK_INIT, T4-specific
        add             $out, 8, $out
        stda            %f2, [$out]0xe2         ! ASI_BLK_INIT, T4-specific
@@ -1376,7 +1398,7 @@ ___
 
 # Purpose of these subroutines is to explicitly encode VIS instructions,
 # so that one can compile the module without having to specify VIS
-# extentions on compiler command line, e.g. -xarch=v9 vs. -xarch=v9a.
+# extensions on compiler command line, e.g. -xarch=v9 vs. -xarch=v9a.
 # Idea is to reserve for option to produce "universal" binary and let
 # programmer detect if current CPU is VIS capable at run-time.
 sub unvis {
@@ -1657,8 +1679,8 @@ sub emit_assembler {
        s/\b(camellia_[^s]+)\s+(%f[0-9]{1,2}),\s*(%f[0-9]{1,2}),\s*(%f[0-9]{1,2})/
                &uncamellia3($1,$2,$3,$4)
         /geo or
-       s/\b(des_\w+)\s+(?<rs1>%f[0-9]{1,2}),\s*(?<rs2>[%fx0-9]+)(,\s*(?<rs3>%f[0-9]{1,2})(,\s*(?<rs4>%f[0-9]{1,2}))?)?/
-               &undes($1,$+{rs1},$+{rs2},$+{rs3},$+{rs4})
+       s/\b(des_\w+)\s+(%f[0-9]{1,2}),\s*([%fx0-9]+)(?:,\s*(%f[0-9]{1,2})(?:,\s*(%f[0-9]{1,2}))?)?/
+               &undes($1,$2,$3,$4,$5)
         /geo or
        s/\b(mov[ds]to\w+)\s+(%f[0-9]{1,2}),\s*(%[goli][0-7])/
                &unmovxtox($1,$2,$3)