Add OpenSSL copyright to .pl files

[openssl.git] / crypto / md5 / asm / md5-sparcv9.pl

diff --git a/crypto/md5/asm/md5-sparcv9.pl b/crypto/md5/asm/md5-sparcv9.pl
index ef16666cc34276f9b2030cbdef0a8b72d67c0dc9..09e6d7139a8b678d351ae3909b170460985e6172 100644 (file)
--- a/crypto/md5/asm/md5-sparcv9.pl
+++ b/crypto/md5/asm/md5-sparcv9.pl
@@ -1,4 +1,11 @@
-#!/usr/bin/env perl
+#! /usr/bin/env perl
+# Copyright 2012-2016 The OpenSSL Project Authors. All Rights Reserved.
+#
+# Licensed under the OpenSSL license (the "License").  You may not use
+# this file except in compliance with the License.  You can obtain a copy
+# in the file LICENSE in the source distribution or at
+# https://www.openssl.org/source/license.html
+
 
 # ====================================================================
 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
@@ -17,12 +24,7 @@
 # single-process result on 8-core processor, or ~11GBps per 2.85GHz
 # socket.
 
-$bits=32;
-for (@ARGV)    { $bits=64 if (/\-m64/ || /\-xarch\=v9/); }
-if ($bits==64) { $bias=2047; $frame=192; }
-else           { $bias=0;    $frame=112; }
-
-$output=shift;
+$output=pop;
 open STDOUT,">$output";
 
 use integer;
@@ -198,13 +200,14 @@ $code.=<<___;
 ___
 }
 
-$code.=<<___ if ($bits==64);
-.register      %g2,#scratch
-.register      %g3,#scratch
-___
 $code.=<<___;
 #include "sparc_arch.h"
 
+#ifdef __arch64__
+.register      %g2,#scratch
+.register      %g3,#scratch
+#endif
+
 .section       ".text",#alloc,#execinstr
 
 #ifdef __PIC__
@@ -246,7 +249,7 @@ md5_block_asm_data_order:
 
        .word   0x81b02800              ! MD5
 
-       bne,pt  `$bits==64?"%xcc":"%icc"`, .Lhw_loop
+       bne,pt  SIZE_T_CC, .Lhw_loop
        nop
 
 .Lhwfinish:
@@ -287,7 +290,7 @@ md5_block_asm_data_order:
 
        .word   0x81b02800              ! MD5
 
-       bne,pt  `$bits==64?"%xcc":"%icc"`, .Lhwunaligned_loop
+       bne,pt  SIZE_T_CC, .Lhwunaligned_loop
        for     %f26, %f26, %f10        ! %f10=%f26
 
        ba      .Lhwfinish
@@ -295,7 +298,7 @@ md5_block_asm_data_order:
 
 .align 16
 .Lsoftware:
-       save    %sp,-$frame,%sp
+       save    %sp,-STACK_FRAME,%sp
 
        rd      %asi,$saved_asi
        wr      %g0,0x88,%asi           ! ASI_PRIMARY_LITTLE
@@ -355,7 +358,7 @@ $code.=<<___;
        add     $t2,$C,$C
        add     $CD,$D,$D
        srl     $B,0,$B                 ! clruw $B
-       bne     `$bits==64?"%xcc":"%icc"`,.Loop
+       bne     SIZE_T_CC,.Loop
        srl     $D,0,$D                 ! clruw $D
 
        st      $A,[$ctx+0]             ! write out ctx
@@ -375,7 +378,7 @@ ___
 
 # Purpose of these subroutines is to explicitly encode VIS instructions,
 # so that one can compile the module without having to specify VIS
-# extentions on compiler command line, e.g. -xarch=v9 vs. -xarch=v9a.
+# extensions on compiler command line, e.g. -xarch=v9 vs. -xarch=v9a.
 # Idea is to reserve for option to produce "universal" binary and let
 # programmer detect if current CPU is VIS capable at run-time.
 sub unvis {