Read MIDR_EL1 system register on aarch64
[openssl.git] / crypto / arm64cpuid.pl
index 0eadcc43f2b64a838ef0d14987425afdbb4b5c5e..ac76dd449f379bdb027be745666297506169b3b5 100755 (executable)
@@ -81,6 +81,13 @@ _armv8_sha512_probe:
        ret
 .size  _armv8_sha512_probe,.-_armv8_sha512_probe
 
+.globl _armv8_cpuid_probe
+.type  _armv8_cpuid_probe,%function
+_armv8_cpuid_probe:
+       mrs     x0, midr_el1
+       ret
+.size  _armv8_cpuid_probe,.-_armv8_cpuid_probe
+
 .globl OPENSSL_cleanse
 .type  OPENSSL_cleanse,%function
 .align 5