crypto/x86_64cpuid.pl: suppress AVX512F flag on Skylake-X.
authorAndy Polyakov <appro@openssl.org>
Mon, 4 Dec 2017 13:03:05 +0000 (14:03 +0100)
committerAndy Polyakov <appro@openssl.org>
Fri, 8 Dec 2017 11:57:09 +0000 (12:57 +0100)
It was observed that AVX512 code paths can negatively affect overall
Skylake-X system performance. But we are talking specifically about
512-bit code, while AVX512VL, 256-bit variant of AVX512F instructions,
is supposed to fly as smooth as AVX2. Which is why it remains unmasked.

Reviewed-by: Rich Salz <rsalz@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/4838)

crypto/x86_64cpuid.pl

index d30928e..0a88c7a 100644 (file)
@@ -139,6 +139,7 @@ OPENSSL_ia32_cpuid:
 .Lnocacheinfo:
        mov     \$1,%eax
        cpuid
+       movd    %eax,%xmm0              # put aside processor id
        and     \$0xbfefffff,%edx       # force reserved bits to 0
        cmp     \$0,%r9d
        jne     .Lnotintel
@@ -186,6 +187,13 @@ OPENSSL_ia32_cpuid:
        jc      .Lnotknights
        and     \$0xfff7ffff,%ebx       # clear ADCX/ADOX flag
 .Lnotknights:
+       movd    %xmm0,%eax              # restore processor id
+       and     \$0x0fff0ff0,%eax
+       cmp     \$0x00050650,%eax       # Skylake-X
+       jne     .Lnotskylakex
+       and     \$0xfffeffff,%ebx       # ~(1<<16)
+                                       # suppress AVX512F flag on Skylake-X
+.Lnotskylakex:
        mov     %ebx,8(%rdi)            # save extended feature flags
        mov     %ecx,12(%rdi)
 .Lno_extended_info: