Add linux-x32 target [from HEAD].
authorAndy Polyakov <appro@openssl.org>
Wed, 29 Aug 2012 14:12:10 +0000 (14:12 +0000)
committerAndy Polyakov <appro@openssl.org>
Wed, 29 Aug 2012 14:12:10 +0000 (14:12 +0000)
CHANGES
Configure
TABLE
crypto/bn/asm/x86_64-gcc.c

diff --git a/CHANGES b/CHANGES
index bc9de91..2bd9418 100644 (file)
--- a/CHANGES
+++ b/CHANGES
@@ -4,6 +4,9 @@
 
  Changes between 1.0.1 and 1.0.2 [xx XXX xxxx]
 
+  *) Support for linux-x32, ILP32 environment in x86_64 framework.
+     [Andy Polyakov]
+
   *) RFC 5878 support.
      [Emilia Kasper, Adam Langley, Ben Laurie (Google)]
 
index 4eb33a1..e6f7994 100755 (executable)
--- a/Configure
+++ b/Configure
@@ -359,6 +359,7 @@ my %table=(
 "linux-ia64-ecc","ecc:-DL_ENDIAN -DTERMIO -O2 -Wall -no_cpprt::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK DES_INT:${ia64_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
 "linux-ia64-icc","icc:-DL_ENDIAN -DTERMIO -O2 -Wall -no_cpprt::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK DES_RISC1 DES_INT:${ia64_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
 "linux-x86_64",        "gcc:-m64 -DL_ENDIAN -DTERMIO -O3 -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK DES_INT DES_UNROLL:${x86_64_asm}:elf:dlfcn:linux-shared:-fPIC:-m64:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR):::64",
+"linux-x32",   "gcc:-mx32 -DL_ENDIAN -DTERMIO -O3 -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT RC4_CHUNK_LL DES_INT DES_UNROLL:${x86_64_asm}:elf:dlfcn:linux-shared:-fPIC:-mx32:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR):::x32",
 "linux64-s390x",       "gcc:-m64 -DB_ENDIAN -DTERMIO -O3 -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHAR RC4_CHUNK DES_INT DES_UNROLL:${s390x_asm}:64:dlfcn:linux-shared:-fPIC:-m64:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR):::64",
 #### So called "highgprs" target for z/Architecture CPUs
 # "Highgprs" is kernel feature first implemented in Linux 2.6.32, see
diff --git a/TABLE b/TABLE
index f614555..ca65918 100644 (file)
--- a/TABLE
+++ b/TABLE
@@ -4323,6 +4323,39 @@ $ranlib       =
 $arflags      = 
 $multilib     = 
 
+*** linux-x32
+$cc           = gcc
+$cflags       = -mx32 -DL_ENDIAN -DTERMIO -O3 -Wall
+$unistd       = 
+$thread_cflag = -D_REENTRANT
+$sys_id       = 
+$lflags       = -ldl
+$bn_ops       = SIXTY_FOUR_BIT RC4_CHUNK_LL DES_INT DES_UNROLL
+$cpuid_obj    = x86_64cpuid.o
+$bn_obj       = x86_64-gcc.o x86_64-mont.o x86_64-mont5.o x86_64-gf2m.o modexp512-x86_64.o
+$des_obj      = 
+$aes_obj      = aes-x86_64.o vpaes-x86_64.o bsaes-x86_64.o aesni-x86_64.o aesni-sha1-x86_64.o
+$bf_obj       = 
+$md5_obj      = md5-x86_64.o
+$sha1_obj     = sha1-x86_64.o sha256-x86_64.o sha512-x86_64.o
+$cast_obj     = 
+$rc4_obj      = rc4-x86_64.o rc4-md5-x86_64.o
+$rmd160_obj   = 
+$rc5_obj      = 
+$wp_obj       = wp-x86_64.o
+$cmll_obj     = cmll-x86_64.o cmll_misc.o
+$modes_obj    = ghash-x86_64.o
+$engines_obj  = 
+$perlasm_scheme = elf
+$dso_scheme   = dlfcn
+$shared_target= linux-shared
+$shared_cflag = -fPIC
+$shared_ldflag = -mx32
+$shared_extension = .so.$(SHLIB_MAJOR).$(SHLIB_MINOR)
+$ranlib       = 
+$arflags      = 
+$multilib     = x32
+
 *** linux-x86_64
 $cc           = gcc
 $cflags       = -m64 -DL_ENDIAN -DTERMIO -O3 -Wall
index acb0b40..d34d2dc 100644 (file)
@@ -55,7 +55,7 @@
  *    machine.
  */
 
-#ifdef _WIN64
+#if defined(_WIN64) || !defined(__LP64__)
 #define BN_ULONG unsigned long long
 #else
 #define BN_ULONG unsigned long
@@ -63,7 +63,6 @@
 
 #undef mul
 #undef mul_add
-#undef sqr
 
 /*
  * "m"(a), "+m"(r)     is the way to favor DirectPath ยต-code;
@@ -99,7 +98,7 @@
                : "cc");                \
        (r)=carry, carry=high;          \
        } while (0)
-
+#undef sqr
 #define sqr(r0,r1,a)                   \
        asm ("mulq %2"                  \
                : "=a"(r0),"=d"(r1)     \
@@ -185,20 +184,22 @@ BN_ULONG bn_div_words(BN_ULONG h, BN_ULONG l, BN_ULONG d)
 }
 
 BN_ULONG bn_add_words (BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,int n)
-{ BN_ULONG ret=0,i=0;
+{ BN_ULONG ret;
+  size_t i=0;
 
        if (n <= 0) return 0;
 
        asm (
-       "       subq    %2,%2           \n"
+       "       subq    %0,%0           \n"     /* clear carry */
+       "       jmp     1f              \n"
        ".p2align 4                     \n"
        "1:     movq    (%4,%2,8),%0    \n"
        "       adcq    (%5,%2,8),%0    \n"
        "       movq    %0,(%3,%2,8)    \n"
-       "       leaq    1(%2),%2        \n"
+       "       lea     1(%2),%2        \n"
        "       loop    1b              \n"
        "       sbbq    %0,%0           \n"
-               : "=&a"(ret),"+c"(n),"=&r"(i)
+               : "=r"(ret),"+c"(n),"+r"(i)
                : "r"(rp),"r"(ap),"r"(bp)
                : "cc"
        );
@@ -208,20 +209,22 @@ BN_ULONG bn_add_words (BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,int
 
 #ifndef SIMICS
 BN_ULONG bn_sub_words (BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,int n)
-{ BN_ULONG ret=0,i=0;
+{ BN_ULONG ret;
+  size_t i=0;
 
        if (n <= 0) return 0;
 
        asm (
-       "       subq    %2,%2           \n"
+       "       subq    %0,%0           \n"     /* clear borrow */
+       "       jmp     1f              \n"
        ".p2align 4                     \n"
        "1:     movq    (%4,%2,8),%0    \n"
        "       sbbq    (%5,%2,8),%0    \n"
        "       movq    %0,(%3,%2,8)    \n"
-       "       leaq    1(%2),%2        \n"
+       "       lea     1(%2),%2        \n"
        "       loop    1b              \n"
        "       sbbq    %0,%0           \n"
-               : "=&a"(ret),"+c"(n),"=&r"(i)
+               : "=r"(ret),"+c"(n),"+r"(i)
                : "r"(rp),"r"(ap),"r"(bp)
                : "cc"
        );