x86_64: Add endbranch at function entries for Intel CET
authorH.J. Lu <hongjiu.lu@intel.com>
Fri, 31 Jan 2020 12:17:26 +0000 (04:17 -0800)
committerRichard Levitte <levitte@openssl.org>
Sat, 15 Feb 2020 21:15:03 +0000 (22:15 +0100)
commit98ad3fe82bd3e7e7f929dd1fa4ef3915426002c0
tree90305d8bdb22f19188d925136cdd25b2d13f9b03
parent07980622e28746245a83ad9d011b6a4a32a1c2e0
x86_64: Add endbranch at function entries for Intel CET

To support Intel CET, all indirect branch targets must start with
endbranch.  Here is a patch to add endbranch to function entries
in x86_64 assembly codes which are indirect branch targets as
discovered by running openssl testsuite on Intel CET machine and
visual inspection.

Verified with

$ CC="gcc -Wl,-z,cet-report=error" ./Configure shared linux-x86_64 -fcf-protection
$ make
$ make test

and

$ CC="gcc -mx32 -Wl,-z,cet-report=error" ./Configure shared linux-x32 -fcf-protection
$ make
$ make test # <<< passed with https://github.com/openssl/openssl/pull/10988

Reviewed-by: Tomas Mraz <tmraz@fedoraproject.org>
Reviewed-by: Richard Levitte <levitte@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/10982)
crypto/aes/asm/aes-x86_64.pl
crypto/aes/asm/aesni-x86_64.pl
crypto/aes/asm/bsaes-x86_64.pl
crypto/aes/asm/vpaes-x86_64.pl
crypto/camellia/asm/cmll-x86_64.pl
crypto/modes/asm/ghash-x86_64.pl
crypto/poly1305/asm/poly1305-x86_64.pl
crypto/rc4/asm/rc4-x86_64.pl
crypto/x86_64cpuid.pl