X-Git-Url: https://git.openssl.org/gitweb/?p=openssl.git;a=blobdiff_plain;f=crypto%2Fmd32_common.h;h=3d9f8d03497a9d1d48f472300dcf541ea5767077;hp=470a8c3e512175a27554a7dff288085049399f63;hb=b93642c5ccf3274e505080768f9ac199b036cc1d;hpb=a7c5241f5f23bf8eeb41efd7f4932f9e1359a38d diff --git a/crypto/md32_common.h b/crypto/md32_common.h index 470a8c3e51..3d9f8d0349 100644 --- a/crypto/md32_common.h +++ b/crypto/md32_common.h @@ -179,15 +179,18 @@ */ #undef ROTATE #ifndef PEDANTIC -# if defined(_MSC_VER) +# if 0 /* defined(_MSC_VER) */ # define ROTATE(a,n) _lrotl(a,n) # elif defined(__MWERKS__) -# ifdef __POWERPC__ +# if defined(__POWERPC__) # define ROTATE(a,n) __rlwinm(a,n,0,31) +# elif defined(__MC68K__) + /* Motorola specific tweak. */ +# define ROTATE(a,n) ( n<24 ? __rol(a,n) : __ror(a,32-n) ) # else # define ROTATE(a,n) __rol(a,n) # endif -# elif defined(__GNUC__) && __GNUC__>=2 && !defined(NO_ASM) +# elif defined(__GNUC__) && __GNUC__>=2 && !defined(NO_ASM) && !defined(NO_INLINE_ASM) /* * Some GNU C inline assembler templates. Note that these are * rotates by *constant* number of bits! But that's exactly @@ -197,16 +200,16 @@ */ # if defined(__i386) # define ROTATE(a,n) ({ register unsigned int ret; \ - asm volatile ( \ + asm ( \ "roll %1,%0" \ : "=r"(ret) \ : "I"(n), "0"(a) \ : "cc"); \ ret; \ }) -# elif defined(__powerpc) +# elif defined(__powerpc) || defined(__ppc) # define ROTATE(a,n) ({ register unsigned int ret; \ - asm volatile ( \ + asm ( \ "rlwinm %0,%1,%2,0,31" \ : "=r"(ret) \ : "r"(a), "I"(n)); \ @@ -219,18 +222,18 @@ * Engage compiler specific "fetch in reverse byte order" * intrinsic function if available. */ -# if defined(__GNUC__) && __GNUC__>=2 && !defined(NO_ASM) +# if defined(__GNUC__) && __GNUC__>=2 && !defined(NO_ASM) && !defined(NO_INLINE_ASM) /* some GNU C inline assembler templates by */ # if defined(__i386) && !defined(I386_ONLY) # define BE_FETCH32(a) ({ register unsigned int l=(a);\ - asm volatile ( \ + asm ( \ "bswapl %0" \ : "=r"(l) : "0"(l)); \ l; \ }) # elif defined(__powerpc) # define LE_FETCH32(a) ({ register unsigned int l; \ - asm volatile ( \ + asm ( \ "lwbrx %0,0,%1" \ : "=r"(l) \ : "r"(a)); \ @@ -239,7 +242,7 @@ # elif defined(__sparc) && defined(ULTRASPARC) # define LE_FETCH32(a) ({ register unsigned int l; \ - asm volatile ( \ + asm ( \ "lda [%1]#ASI_PRIMARY_LITTLE,%0"\ : "=r"(l) \ : "r"(a)); \ @@ -407,8 +410,9 @@ * Time for some action:-) */ -void HASH_UPDATE (HASH_CTX *c, const unsigned char *data, unsigned long len) +void HASH_UPDATE (HASH_CTX *c, const void *data_, unsigned long len) { + const unsigned char *data=data_; register HASH_LONG * p; register unsigned long l; int sw,sc,ew,ec;