evp/e_aes_cbc_hmac_sha*.c: harmonize names, fix bugs.
[openssl.git] / crypto / x86cpuid.pl
index 13828d5..ef1216a 100644 (file)
@@ -1,6 +1,7 @@
 #!/usr/bin/env perl
 
-push(@INC,"perlasm");
+$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
+push(@INC, "${dir}perlasm", "perlasm");
 require "x86asm.pl";
 
 &asm_init($ARGV[0],"x86cpuid");
@@ -18,10 +19,14 @@ for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
        &pushf  ();
        &pop    ("eax");
        &xor    ("ecx","eax");
+       &xor    ("eax","eax");
        &bt     ("ecx",21);
        &jnc    (&label("nocpuid"));
-       &xor    ("eax","eax");
+       &mov    ("esi",&wparam(0));
+       &mov    (&DWP(8,"esi"),"eax");  # clear 3rd word
        &cpuid  ();
+       &mov    ("edi","eax");          # max value for standard query level
+
        &xor    ("eax","eax");
        &cmp    ("ebx",0x756e6547);     # "Genu"
        &setne  (&LB("eax"));
@@ -31,25 +36,124 @@ for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
        &or     ("ebp","eax");
        &cmp    ("ecx",0x6c65746e);     # "ntel"
        &setne  (&LB("eax"));
-       &or     ("ebp","eax");
+       &or     ("ebp","eax");          # 0 indicates Intel CPU
+       &jz     (&label("intel"));
+
+       &cmp    ("ebx",0x68747541);     # "Auth"
+       &setne  (&LB("eax"));
+       &mov    ("esi","eax");
+       &cmp    ("edx",0x69746E65);     # "enti"
+       &setne  (&LB("eax"));
+       &or     ("esi","eax");
+       &cmp    ("ecx",0x444D4163);     # "cAMD"
+       &setne  (&LB("eax"));
+       &or     ("esi","eax");          # 0 indicates AMD CPU
+       &jnz    (&label("intel"));
+
+       # AMD specific
+       &mov    ("eax",0x80000000);
+       &cpuid  ();
+       &cmp    ("eax",0x80000001);
+       &jb     (&label("intel"));
+       &mov    ("esi","eax");
+       &mov    ("eax",0x80000001);
+       &cpuid  ();
+       &or     ("ebp","ecx");
+       &and    ("ebp",1<<11|1);        # isolate XOP bit
+       &cmp    ("esi",0x80000008);
+       &jb     (&label("intel"));
+
+       &mov    ("eax",0x80000008);
+       &cpuid  ();
+       &movz   ("esi",&LB("ecx"));     # number of cores - 1
+       &inc    ("esi");                # number of cores
+
        &mov    ("eax",1);
+       &xor    ("ecx","ecx");
        &cpuid  ();
-       &bt     ("edx",28);             # test hyper-threading bit
-       &jnc    (&label("nocpuid"));
+       &bt     ("edx",28);
+       &jnc    (&label("generic"));
+       &shr    ("ebx",16);
+       &and    ("ebx",0xff);
+       &cmp    ("ebx","esi");
+       &ja     (&label("generic"));
+       &and    ("edx",0xefffffff);     # clear hyper-threading bit
+       &jmp    (&label("generic"));
+       
+&set_label("intel");
+       &cmp    ("edi",7);
+       &jb     (&label("cacheinfo"));
+
+       &mov    ("esi",&wparam(0));
+       &mov    ("eax",7);
+       &xor    ("ecx","ecx");
+       &cpuid  ();
+       &mov    (&DWP(8,"esi"),"ebx");
+
+&set_label("cacheinfo");
+       &cmp    ("edi",4);
+       &mov    ("edi",-1);
+       &jb     (&label("nocacheinfo"));
+
+       &mov    ("eax",4);
+       &mov    ("ecx",0);              # query L1D
+       &cpuid  ();
+       &mov    ("edi","eax");
+       &shr    ("edi",14);
+       &and    ("edi",0xfff);          # number of cores -1 per L1D
+
+&set_label("nocacheinfo");
+       &mov    ("eax",1);
+       &xor    ("ecx","ecx");
+       &cpuid  ();
+       &and    ("edx",0xbfefffff);     # force reserved bits #20, #30 to 0
        &cmp    ("ebp",0);
        &jne    (&label("notintel"));
-       &or     ("edx",1<<20);          # use reserved bit to engage RC4_CHAR
+       &or     ("edx",1<<30);          # set reserved bit#30 on Intel CPUs
+       &and    (&HB("eax"),15);        # familiy ID
+       &cmp    (&HB("eax"),15);        # P4?
+       &jne    (&label("notintel"));
+       &or     ("edx",1<<20);          # set reserved bit#20 to engage RC4_CHAR
 &set_label("notintel");
+       &bt     ("edx",28);             # test hyper-threading bit
+       &jnc    (&label("generic"));
+       &and    ("edx",0xefffffff);
+       &cmp    ("edi",0);
+       &je     (&label("generic"));
+
+       &or     ("edx",0x10000000);
        &shr    ("ebx",16);
-       &cmp    (&LB("ebx"),1);         # see if cache is shared(*)
-       &ja     (&label("nocpuid"));
-       &and    ("edx",~(1<<28));       # clear hyper-threading bit if not
+       &cmp    (&LB("ebx"),1);
+       &ja     (&label("generic"));
+       &and    ("edx",0xefffffff);     # clear hyper-threading bit if not
+
+&set_label("generic");
+       &and    ("ebp",1<<11);          # isolate AMD XOP flag
+       &and    ("ecx",0xfffff7ff);     # force 11th bit to 0
+       &mov    ("esi","edx");
+       &or     ("ebp","ecx");          # merge AMD XOP flag
+
+       &bt     ("ecx",27);             # check OSXSAVE bit
+       &jnc    (&label("clear_avx"));
+       &xor    ("ecx","ecx");
+       &data_byte(0x0f,0x01,0xd0);     # xgetbv
+       &and    ("eax",6);
+       &cmp    ("eax",6);
+       &je     (&label("done"));
+       &cmp    ("eax",2);
+       &je     (&label("clear_avx"));
+&set_label("clear_xmm");
+       &and    ("ebp",0xfdfffffd);     # clear AESNI and PCLMULQDQ bits
+       &and    ("esi",0xfeffffff);     # clear FXSR
+&set_label("clear_avx");
+       &and    ("ebp",0xefffe7ff);     # clear AVX, FMA and AMD XOP bits
+       &mov    ("edi",&wparam(0));
+       &and    (&DWP(8,"edi"),0xffffffdf);     # clear AVX2
+&set_label("done");
+       &mov    ("eax","esi");
+       &mov    ("edx","ebp");
 &set_label("nocpuid");
-       &mov    ("eax","edx");
-       &mov    ("edx","ecx");
 &function_end("OPENSSL_ia32_cpuid");
-# (*)  on Core2 this value is set to 2 denoting the fact that L2
-#      cache is shared between cores.
 
 &external_label("OPENSSL_ia32cap_P");
 
@@ -77,7 +181,7 @@ for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
        &jnz    (&label("nohalt"));     # not enough privileges
 
        &pushf  ();
-       &pop    ("eax")
+       &pop    ("eax");
        &bt     ("eax",9);
        &jnc    (&label("nohalt"));     # interrupts are disabled
 
@@ -108,7 +212,7 @@ for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
 
 &function_begin_B("OPENSSL_far_spin");
        &pushf  ();
-       &pop    ("eax")
+       &pop    ("eax");
        &bt     ("eax",9);
        &jnc    (&label("nospin"));     # interrupts are disabled
 
@@ -142,8 +246,9 @@ for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
        &bt     (&DWP(0,"ecx"),1);
        &jnc    (&label("no_x87"));
        if ($sse2) {
-               &bt     (&DWP(0,"ecx"),26);
-               &jnc    (&label("no_sse2"));
+               &and    ("ecx",1<<26|1<<24);    # check SSE2 and FXSR bits
+               &cmp    ("ecx",1<<26|1<<24);
+               &jne    (&label("no_sse2"));
                &pxor   ("xmm0","xmm0");
                &pxor   ("xmm1","xmm1");
                &pxor   ("xmm2","xmm2");
@@ -191,7 +296,7 @@ for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
 #      arguments is 1 or 2!
 &function_begin_B("OPENSSL_indirect_call");
        {
-       my $i,$max=7;           # $max has to be chosen as 4*n-1
+       my ($max,$i)=(7,);      # $max has to be chosen as 4*n-1
                                # in order to preserve eventual
                                # stack alignment
        &push   ("ebp");
@@ -222,11 +327,14 @@ for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
        &xor    ("eax","eax");
        &cmp    ("ecx",7);
        &jae    (&label("lot"));
+       &cmp    ("ecx",0);
+       &je     (&label("ret"));
 &set_label("little");
        &mov    (&BP(0,"edx"),"al");
        &sub    ("ecx",1);
        &lea    ("edx",&DWP(1,"edx"));
        &jnz    (&label("little"));
+&set_label("ret");
        &ret    ();
 
 &set_label("lot",16);
@@ -247,6 +355,123 @@ for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
        &ret    ();
 &function_end_B("OPENSSL_cleanse");
 
+{
+my $lasttick = "esi";
+my $lastdiff = "ebx";
+my $out = "edi";
+my $cnt = "ecx";
+my $max = "ebp";
+
+&function_begin("OPENSSL_instrument_bus");
+    &mov       ("eax",0);
+    if ($sse2) {
+       &picmeup("edx","OPENSSL_ia32cap_P");
+       &bt     (&DWP(0,"edx"),4);
+       &jnc    (&label("nogo"));       # no TSC
+       &bt     (&DWP(0,"edx"),19);
+       &jnc    (&label("nogo"));       # no CLFLUSH
+
+       &mov    ($out,&wparam(0));      # load arguments
+       &mov    ($cnt,&wparam(1));
+
+       # collect 1st tick
+       &rdtsc  ();
+       &mov    ($lasttick,"eax");      # lasttick = tick
+       &mov    ($lastdiff,0);          # lastdiff = 0
+       &clflush(&DWP(0,$out));
+       &data_byte(0xf0);               # lock
+       &add    (&DWP(0,$out),$lastdiff);
+       &jmp    (&label("loop"));
+
+&set_label("loop",16);
+       &rdtsc  ();
+       &mov    ("edx","eax");          # put aside tick (yes, I neglect edx)
+       &sub    ("eax",$lasttick);      # diff
+       &mov    ($lasttick,"edx");      # lasttick = tick
+       &mov    ($lastdiff,"eax");      # lastdiff = diff
+       &clflush(&DWP(0,$out));
+       &data_byte(0xf0);               # lock
+       &add    (&DWP(0,$out),"eax");   # accumulate diff
+       &lea    ($out,&DWP(4,$out));    # ++$out
+       &sub    ($cnt,1);               # --$cnt
+       &jnz    (&label("loop"));
+
+       &mov    ("eax",&wparam(1));
+&set_label("nogo");
+    }
+&function_end("OPENSSL_instrument_bus");
+
+&function_begin("OPENSSL_instrument_bus2");
+    &mov       ("eax",0);
+    if ($sse2) {
+       &picmeup("edx","OPENSSL_ia32cap_P");
+       &bt     (&DWP(0,"edx"),4);
+       &jnc    (&label("nogo"));       # no TSC
+       &bt     (&DWP(0,"edx"),19);
+       &jnc    (&label("nogo"));       # no CLFLUSH
+
+       &mov    ($out,&wparam(0));      # load arguments
+       &mov    ($cnt,&wparam(1));
+       &mov    ($max,&wparam(2));
+
+       &rdtsc  ();                     # collect 1st tick
+       &mov    ($lasttick,"eax");      # lasttick = tick
+       &mov    ($lastdiff,0);          # lastdiff = 0
+
+       &clflush(&DWP(0,$out));
+       &data_byte(0xf0);               # lock
+       &add    (&DWP(0,$out),$lastdiff);
+
+       &rdtsc  ();                     # collect 1st diff
+       &mov    ("edx","eax");          # put aside tick (yes, I neglect edx)
+       &sub    ("eax",$lasttick);      # diff
+       &mov    ($lasttick,"edx");      # lasttick = tick
+       &mov    ($lastdiff,"eax");      # lastdiff = diff
+       &jmp    (&label("loop2"));
+
+&set_label("loop2",16);
+       &clflush(&DWP(0,$out));
+       &data_byte(0xf0);               # lock
+       &add    (&DWP(0,$out),"eax");   # accumulate diff
+
+       &sub    ($max,1);
+       &jz     (&label("done2"));
+
+       &rdtsc  ();
+       &mov    ("edx","eax");          # put aside tick (yes, I neglect edx)
+       &sub    ("eax",$lasttick);      # diff
+       &mov    ($lasttick,"edx");      # lasttick = tick
+       &cmp    ("eax",$lastdiff);
+       &mov    ($lastdiff,"eax");      # lastdiff = diff
+       &mov    ("edx",0);
+       &setne  ("dl");
+       &sub    ($cnt,"edx");           # conditional --$cnt
+       &lea    ($out,&DWP(0,$out,"edx",4));    # conditional ++$out
+       &jnz    (&label("loop2"));
+
+&set_label("done2");
+       &mov    ("eax",&wparam(1));
+       &sub    ("eax",$cnt);
+&set_label("nogo");
+    }
+&function_end("OPENSSL_instrument_bus2");
+}
+
+&function_begin_B("OPENSSL_ia32_rdrand");
+       &mov    ("ecx",8);
+&set_label("loop");
+       &rdrand ("eax");
+       &jc     (&label("break"));
+       &loop   (&label("loop"));
+&set_label("break");
+       &cmp    ("eax",0);
+       &cmove  ("eax","ecx");
+       &ret    ();
+&function_end_B("OPENSSL_ia32_rdrand");
+
 &initseg("OPENSSL_cpuid_setup");
 
+&hidden("OPENSSL_cpuid_setup");
+&hidden("OPENSSL_ia32cap_P");
+
 &asm_finish();