"Jumbo" update for crypto/modes:

[openssl.git] / crypto / x86_64cpuid.pl

diff --git a/crypto/x86_64cpuid.pl b/crypto/x86_64cpuid.pl
index c54b9e3681c6cebba14a9509a43c13865079dccc..c96821a3c811d55567f43caebce6f47a8308c790 100644 (file)
--- a/crypto/x86_64cpuid.pl
+++ b/crypto/x86_64cpuid.pl
@@ -50,6 +50,8 @@ OPENSSL_ia32_cpuid:
 
        xor     %eax,%eax
        cpuid
+       mov     %eax,%r11d              # max value for standard query level
+
        xor     %eax,%eax
        cmp     \$0x756e6547,%ebx       # "Genu"
        setne   %al
@@ -59,8 +61,54 @@ OPENSSL_ia32_cpuid:
        or      %eax,%r9d
        cmp     \$0x6c65746e,%ecx       # "ntel"
        setne   %al
-       or      %eax,%r9d
+       or      %eax,%r9d               # 0 indicates Intel CPU
+       jz      .Lintel
+
+       cmp     \$0x68747541,%ebx       # "Auth"
+       setne   %al
+       mov     %eax,%r10d
+       cmp     \$0x69746E65,%edx       # "enti"
+       setne   %al
+       or      %eax,%r10d
+       cmp     \$0x444D4163,%ecx       # "cAMD"
+       setne   %al
+       or      %eax,%r10d              # 0 indicates AMD CPU
+       jnz     .Lintel
+
+       # AMD specific
+       mov     \$0x80000000,%eax
+       cpuid
+       cmp     \$0x80000008,%eax
+       jb      .Lintel
+
+       mov     \$0x80000008,%eax
+       cpuid
+       movzb   %cl,%r10                # number of cores - 1
+       inc     %r10                    # number of cores
 
+       mov     \$1,%eax
+       cpuid
+       bt      \$28,%edx               # test hyper-threading bit
+       jnc     .Ldone
+       shr     \$16,%ebx               # number of logical processors
+       cmp     %r10b,%bl
+       ja      .Ldone
+       and     \$0xefffffff,%edx       # ~(1<<28)
+       jmp     .Ldone
+
+.Lintel:
+       cmp     \$4,%r11d
+       mov     \$-1,%r10d
+       jb      .Lnocacheinfo
+
+       mov     \$4,%eax
+       mov     \$0,%ecx                # query L1D
+       cpuid
+       mov     %eax,%r10d
+       shr     \$14,%r10d
+       and     \$0xfff,%r10d           # number of cores -1 per L1D
+
+.Lnocacheinfo:
        mov     \$1,%eax
        cpuid
        cmp     \$0,%r9d
@@ -73,6 +121,11 @@ OPENSSL_ia32_cpuid:
 .Lnotintel:
        bt      \$28,%edx               # test hyper-threading bit
        jnc     .Ldone
+       and     \$0xefffffff,%edx       # ~(1<<28)
+       cmp     \$0,%r10d
+       je      .Ldone
+
+       or      \$0x10000000,%edx       # 1<<28
        shr     \$16,%ebx
        cmp     \$1,%bl                 # see if cache is shared
        ja      .Ldone
@@ -92,11 +145,14 @@ OPENSSL_cleanse:
        xor     %rax,%rax
        cmp     \$15,$arg2
        jae     .Lot
+       cmp     \$0,$arg2
+       je      .Lret
 .Little:
        mov     %al,($arg1)
        sub     \$1,$arg2
        lea     1($arg1),$arg1
        jnz     .Little
+.Lret:
        ret
 .align 16
 .Lot: