+#if 0
+ /*
+ * MSC ARM compiler [version 2013, presumably even earlier,
+ * much earlier] miscompiles this code, but not one in
+ * #else section. See RT#3541.
+ */
+ tmp = val>>BN_NIST_521_RSHIFT;
+ val = t_d[i+1];
+ t_d[i] = (tmp | val<<BN_NIST_521_LSHIFT) & BN_MASK2;
+#else