bn/asm/x86_64*: add DWARF CFI directives.

[openssl.git] / crypto / bn / asm / rsaz-avx2.pl

diff --git a/crypto/bn/asm/rsaz-avx2.pl b/crypto/bn/asm/rsaz-avx2.pl
index 712a77fe8ca3aba1156aa87be3a7227e7ef9f947..f45c2149fc60f8aa986860ded625029794aefdf3 100755 (executable)
--- a/crypto/bn/asm/rsaz-avx2.pl
+++ b/crypto/bn/asm/rsaz-avx2.pl
@@ -1,4 +1,11 @@
-#!/usr/bin/env perl
+#! /usr/bin/env perl
+# Copyright 2013-2016 The OpenSSL Project Authors. All Rights Reserved.
+#
+# Licensed under the OpenSSL license (the "License").  You may not use
+# this file except in compliance with the License.  You can obtain a copy
+# in the file LICENSE in the source distribution or at
+# https://www.openssl.org/source/license.html
+
 
 ##############################################################################
 #                                                                            #
@@ -103,7 +110,7 @@ if (!$avx && `$ENV{CC} -v 2>&1` =~ /(^clang version|based on LLVM) ([3-9])\.([0-
        $addx = ($ver>=3.03);
 }
 
-open OUT,"| \"$^X\" $xlate $flavour $output";
+open OUT,"| \"$^X\" \"$xlate\" $flavour \"$output\"";
 *STDOUT = *OUT;
 
 if ($avx>1) {{{
@@ -161,13 +168,21 @@ $code.=<<___;
 .type  rsaz_1024_sqr_avx2,\@function,5
 .align 64
 rsaz_1024_sqr_avx2:            # 702 cycles, 14% faster than rsaz_1024_mul_avx2
+.cfi_startproc
        lea     (%rsp), %rax
+.cfi_def_cfa_register  %rax
        push    %rbx
+.cfi_push      %rbx
        push    %rbp
+.cfi_push      %rbp
        push    %r12
+.cfi_push      %r12
        push    %r13
+.cfi_push      %r13
        push    %r14
+.cfi_push      %r14
        push    %r15
+.cfi_push      %r15
        vzeroupper
 ___
 $code.=<<___ if ($win64);
@@ -186,6 +201,7 @@ $code.=<<___ if ($win64);
 ___
 $code.=<<___;
        mov     %rax,%rbp
+.cfi_def_cfa_register  %rbp
        mov     %rdx, $np                       # reassigned argument
        sub     \$$FrameSize, %rsp
        mov     $np, $tmp
@@ -375,7 +391,7 @@ $code.=<<___;
        vpaddq          $TEMP1, $ACC1, $ACC1
        vpmuludq        32*7-128($aap), $B2, $ACC2
         vpbroadcastq   32*5-128($tpa), $B2
-       vpaddq          32*11-448($tp1), $ACC2, $ACC2   
+       vpaddq          32*11-448($tp1), $ACC2, $ACC2
 
        vmovdqu         $ACC6, 32*6-192($tp0)
        vmovdqu         $ACC7, 32*7-192($tp0)
@@ -434,7 +450,7 @@ $code.=<<___;
        vmovdqu         $ACC7, 32*16-448($tp1)
        lea             8($tp1), $tp1
 
-       dec     $i        
+       dec     $i
        jnz     .LOOP_SQR_1024
 ___
 $ZERO = $ACC9;
@@ -779,7 +795,7 @@ $code.=<<___;
        vpblendd        \$3, $TEMP4, $TEMP5, $TEMP4
        vpaddq          $TEMP3, $ACC7, $ACC7
        vpaddq          $TEMP4, $ACC8, $ACC8
-     
+
        vpsrlq          \$29, $ACC4, $TEMP1
        vpand           $AND_MASK, $ACC4, $ACC4
        vpsrlq          \$29, $ACC5, $TEMP2
@@ -818,8 +834,10 @@ $code.=<<___;
 
        vzeroall
        mov     %rbp, %rax
+.cfi_def_cfa_register  %rax
 ___
 $code.=<<___ if ($win64);
+.Lsqr_1024_in_tail:
        movaps  -0xd8(%rax),%xmm6
        movaps  -0xc8(%rax),%xmm7
        movaps  -0xb8(%rax),%xmm8
@@ -833,14 +851,22 @@ $code.=<<___ if ($win64);
 ___
 $code.=<<___;
        mov     -48(%rax),%r15
+.cfi_restore   %r15
        mov     -40(%rax),%r14
+.cfi_restore   %r14
        mov     -32(%rax),%r13
+.cfi_restore   %r13
        mov     -24(%rax),%r12
+.cfi_restore   %r12
        mov     -16(%rax),%rbp
+.cfi_restore   %rbp
        mov     -8(%rax),%rbx
+.cfi_restore   %rbx
        lea     (%rax),%rsp             # restore %rsp
+.cfi_def_cfa_register  %rsp
 .Lsqr_1024_epilogue:
        ret
+.cfi_endproc
 .size  rsaz_1024_sqr_avx2,.-rsaz_1024_sqr_avx2
 ___
 }
@@ -893,13 +919,21 @@ $code.=<<___;
 .type  rsaz_1024_mul_avx2,\@function,5
 .align 64
 rsaz_1024_mul_avx2:
+.cfi_startproc
        lea     (%rsp), %rax
+.cfi_def_cfa_register  %rax
        push    %rbx
+.cfi_push      %rbx
        push    %rbp
+.cfi_push      %rbp
        push    %r12
+.cfi_push      %r12
        push    %r13
+.cfi_push      %r13
        push    %r14
+.cfi_push      %r14
        push    %r15
+.cfi_push      %r15
 ___
 $code.=<<___ if ($win64);
        vzeroupper
@@ -918,6 +952,7 @@ $code.=<<___ if ($win64);
 ___
 $code.=<<___;
        mov     %rax,%rbp
+.cfi_def_cfa_register  %rbp
        vzeroall
        mov     %rdx, $bp       # reassigned argument
        sub     \$64,%rsp
@@ -1444,15 +1479,17 @@ $code.=<<___;
        vpaddq          $TEMP4, $ACC8, $ACC8
 
        vmovdqu         $ACC4, 128-128($rp)
-       vmovdqu         $ACC5, 160-128($rp)    
+       vmovdqu         $ACC5, 160-128($rp)
        vmovdqu         $ACC6, 192-128($rp)
        vmovdqu         $ACC7, 224-128($rp)
        vmovdqu         $ACC8, 256-128($rp)
        vzeroupper
 
        mov     %rbp, %rax
+.cfi_def_cfa_register  %rax
 ___
 $code.=<<___ if ($win64);
+.Lmul_1024_in_tail:
        movaps  -0xd8(%rax),%xmm6
        movaps  -0xc8(%rax),%xmm7
        movaps  -0xb8(%rax),%xmm8
@@ -1466,14 +1503,22 @@ $code.=<<___ if ($win64);
 ___
 $code.=<<___;
        mov     -48(%rax),%r15
+.cfi_restore   %r15
        mov     -40(%rax),%r14
+.cfi_restore   %r14
        mov     -32(%rax),%r13
+.cfi_restore   %r13
        mov     -24(%rax),%r12
+.cfi_restore   %r12
        mov     -16(%rax),%rbp
+.cfi_restore   %rbp
        mov     -8(%rax),%rbx
+.cfi_restore   %rbx
        lea     (%rax),%rsp             # restore %rsp
+.cfi_def_cfa_register  %rsp
 .Lmul_1024_epilogue:
        ret
+.cfi_endproc
 .size  rsaz_1024_mul_avx2,.-rsaz_1024_mul_avx2
 ___
 }
@@ -1592,8 +1637,10 @@ rsaz_1024_scatter5_avx2:
 .type  rsaz_1024_gather5_avx2,\@abi-omnipotent
 .align 32
 rsaz_1024_gather5_avx2:
+.cfi_startproc
        vzeroupper
        mov     %rsp,%r11
+.cfi_def_cfa_register  %r11
 ___
 $code.=<<___ if ($win64);
        lea     -0x88(%rsp),%rax
@@ -1731,11 +1778,13 @@ $code.=<<___ if ($win64);
        movaps  -0x38(%r11),%xmm13
        movaps  -0x28(%r11),%xmm14
        movaps  -0x18(%r11),%xmm15
-.LSEH_end_rsaz_1024_gather5:
 ___
 $code.=<<___;
        lea     (%r11),%rsp
+.cfi_def_cfa_register  %rsp
        ret
+.cfi_endproc
+.LSEH_end_rsaz_1024_gather5:
 .size  rsaz_1024_gather5_avx2,.-rsaz_1024_gather5_avx2
 ___
 }
@@ -1808,14 +1857,17 @@ rsaz_se_handler:
        cmp     %r10,%rbx               # context->Rip<prologue label
        jb      .Lcommon_seh_tail
 
-       mov     152($context),%rax      # pull context->Rsp
-
        mov     4(%r11),%r10d           # HandlerData[1]
        lea     (%rsi,%r10),%r10        # epilogue label
        cmp     %r10,%rbx               # context->Rip>=epilogue label
        jae     .Lcommon_seh_tail
 
-       mov     160($context),%rax      # pull context->Rbp
+       mov     160($context),%rbp      # pull context->Rbp
+
+       mov     8(%r11),%r10d           # HandlerData[2]
+       lea     (%rsi,%r10),%r10        # "in tail" label
+       cmp     %r10,%rbx               # context->Rip>="in tail" label
+       cmovc   %rbp,%rax
 
        mov     -48(%rax),%r15
        mov     -40(%rax),%r14
@@ -1893,11 +1945,13 @@ rsaz_se_handler:
 .LSEH_info_rsaz_1024_sqr_avx2:
        .byte   9,0,0,0
        .rva    rsaz_se_handler
-       .rva    .Lsqr_1024_body,.Lsqr_1024_epilogue
+       .rva    .Lsqr_1024_body,.Lsqr_1024_epilogue,.Lsqr_1024_in_tail
+       .long   0
 .LSEH_info_rsaz_1024_mul_avx2:
        .byte   9,0,0,0
        .rva    rsaz_se_handler
-       .rva    .Lmul_1024_body,.Lmul_1024_epilogue
+       .rva    .Lmul_1024_body,.Lmul_1024_epilogue,.Lmul_1024_in_tail
+       .long   0
 .LSEH_info_rsaz_1024_gather5:
        .byte   0x01,0x36,0x17,0x0b
        .byte   0x36,0xf8,0x09,0x00     # vmovaps 0x90(rsp),xmm15