1 /* ====================================================================
2 * Copyright (c) 2005 The OpenSSL Project. Rights for redistribution
3 * and usage in source and binary forms are granted according to the
13 const void *FIPS_text_start(void);
14 const void *FIPS_text_end(void);
18 #if !defined(POINTER_TO_FUNCTION_IS_POINTER_TO_1ST_INSTRUCTION)
19 # if (defined(__sun) && (defined(__sparc) || defined(__sparcv9))) || \
20 (defined(__sgi) && (defined(__mips) || defined(mips))) || \
21 (defined(__osf__) && defined(__alpha)) || \
22 (defined(__linux) && (defined(__arm) || defined(__arm__))) || \
23 (defined(__i386) || defined(__i386__)) || \
24 (defined(__x86_64) || defined(__x86_64__)) || \
25 (defined(vax) || defined(__vax__))
26 # define POINTER_TO_FUNCTION_IS_POINTER_TO_1ST_INSTRUCTION
30 #if !defined(FIPS_REF_POINT_IS_CROSS_COMPILER_AWARE)
31 # if (defined(__ANDROID__) && (defined(__arm__) || defined(__arm))) || \
32 (defined(__vxworks) && (defined(__ppc__) || defined(__ppc))) || \
33 (defined(__linux) && defined(__PPC__) && !defined(__PPC64__))
34 # define FIPS_REF_POINT_IS_CROSS_COMPILER_AWARE
38 #if defined(__xlC__) && __xlC__>=0x600 && (defined(_POWER) || defined(_ARCH_PPC))
39 static void *instruction_pointer_xlc(void);
40 # pragma mc_func instruction_pointer_xlc {\
41 "7c0802a6" /* mflr r0 */ \
42 "48000005" /* bl $+4 */ \
43 "7c6802a6" /* mflr r3 */ \
44 "7c0803a6" /* mtlr r0 */ }
45 # pragma reg_killed_by instruction_pointer_xlc gr0 gr3
46 # define INSTRUCTION_POINTER_IMPLEMENTED(ret) (ret=instruction_pointer_xlc());
50 # define FIPS_ref_point FIPS_text_start
51 # ifdef FIPS_REF_POINT_IS_CROSS_COMPILER_AWARE
52 # define instruction_pointer FIPS_text_startX
54 /* Some compilers put string literals into a separate segment. As we
55 * are mostly interested to hash AES tables in .rodata, we declare
56 * reference points accordingly. In case you wonder, the values are
57 * big-endian encoded variable names, just to prevent these arrays
58 * from being merged by linker. */
59 const unsigned int FIPS_rodata_start[]=
60 { 0x46495053, 0x5f726f64, 0x6174615f, 0x73746172 };
62 # define FIPS_ref_point FIPS_text_end
63 # ifdef FIPS_REF_POINT_IS_CROSS_COMPILER_AWARE
64 # define instruction_pointer FIPS_text_endX
66 const unsigned int FIPS_rodata_end[]=
67 { 0x46495053, 0x5f726f64, 0x6174615f, 0x656e645b };
71 * I declare reference function as static in order to avoid certain
72 * pitfalls in -dynamic linker behaviour...
74 static void *instruction_pointer(void)
76 /* These are ABI-neutral CPU-specific snippets. ABI-neutrality means
77 * that they are designed to work under any OS running on particular
78 * CPU, which is why you don't find any #ifdef THIS_OR_THAT_OS in
80 #if defined(INSTRUCTION_POINTER_IMPLEMENTED)
81 INSTRUCTION_POINTER_IMPLEMENTED(ret);
82 #elif defined(__GNUC__) && __GNUC__>=2
83 # if defined(__alpha) || defined(__alpha__)
84 # define INSTRUCTION_POINTER_IMPLEMENTED
85 __asm __volatile ( "br %0,1f\n1:" : "=r"(ret) );
86 # elif defined(__i386) || defined(__i386__)
87 # define INSTRUCTION_POINTER_IMPLEMENTED
88 __asm __volatile ( "call 1f\n1: popl %0" : "=r"(ret) );
89 ret = (void *)((size_t)ret&~3UL); /* align for better performance */
90 # elif defined(__ia64) || defined(__ia64__)
91 # define INSTRUCTION_POINTER_IMPLEMENTED
92 __asm __volatile ( "mov %0=ip" : "=r"(ret) );
93 # elif defined(__hppa) || defined(__hppa__) || defined(__pa_risc)
94 # define INSTRUCTION_POINTER_IMPLEMENTED
95 __asm __volatile ( "blr %%r0,%0\n\tnop" : "=r"(ret) );
96 ret = (void *)((size_t)ret&~3UL); /* mask privilege level */
97 # elif defined(__mips) || defined(__mips__)
98 # define INSTRUCTION_POINTER_IMPLEMENTED
100 __asm __volatile ( "move %1,$31\n\t" /* save ra */
103 "move $31,%1" /* restore ra */
104 : "=r"(ret),"=r"(scratch) );
105 # elif defined(__ppc__) || defined(__ppc) || \
106 defined(__powerpc) || defined(__powerpc__) || \
107 defined(__POWERPC__) || defined(_POWER) || defined(__PPC__) || \
108 defined(__PPC64__) || defined(__ppc64__) || defined(__powerpc64__)
109 # define INSTRUCTION_POINTER_IMPLEMENTED
111 __asm __volatile ( "mfspr %1,8\n\t" /* save lr */
113 "mfspr %0,8\n\t" /* mflr ret */
114 "mtspr 8,%1" /* restore lr */
115 : "=r"(ret),"=r"(scratch) );
116 # elif defined(__s390__) || defined(__s390x__)
117 # define INSTRUCTION_POINTER_IMPLEMENTED
118 __asm __volatile ( "bras %0,1f\n1:" : "=r"(ret) );
119 ret = (void *)((size_t)ret&~3UL);
120 # elif defined(__sparc) || defined(__sparc__) || defined(__sparcv9)
121 # define INSTRUCTION_POINTER_IMPLEMENTED
123 __asm __volatile ( "mov %%o7,%1\n\t"
127 : "=r"(ret),"=r"(scratch) );
128 # elif defined(__x86_64) || defined(__x86_64__)
129 # define INSTRUCTION_POINTER_IMPLEMENTED
130 __asm __volatile ( "leaq 0(%%rip),%0" : "=r"(ret) );
131 ret = (void *)((size_t)ret&~3UL); /* align for better performance */
132 # elif defined(__arm) || defined(__arm__)
133 # define INSTRUCTION_POINTER_IMPLEMENTED
134 __asm __volatile ( "sub %0,pc,#8" : "=r"(ret) );
136 #elif defined(__DECC) && defined(__alpha)
137 # define INSTRUCTION_POINTER_IMPLEMENTED
138 ret = (void *)(size_t)asm("br %v0,1f\n1:");
139 #elif defined(_MSC_VER) && defined(_M_IX86)
140 # define INSTRUCTION_POINTER_IMPLEMENTED
147 ret = (void *)((size_t)scratch&~3UL);
153 * This function returns pointer to an instruction in the vicinity of
154 * its entry point, but not outside this object module. This guarantees
155 * that sequestered code is covered...
157 const void *FIPS_ref_point()
159 #if defined(FIPS_REF_POINT_IS_CROSS_COMPILER_AWARE)
160 return (void *)instruction_pointer;
161 #elif defined(INSTRUCTION_POINTER_IMPLEMENTED)
162 return instruction_pointer();
163 /* Below we essentially cover vendor compilers which do not support
164 * inline assembler... */
166 struct { void *ip,*gp,*env; } *p = (void *)instruction_pointer;
168 #elif defined(_HPUX_SOURCE)
169 # if defined(__hppa) || defined(__hppa__)
170 struct { void *i[4]; } *p = (void *)FIPS_ref_point;
172 if (sizeof(p) == 8) /* 64-bit */
174 else if ((size_t)p & 2)
175 { p = (void *)((size_t)p&~3UL);
180 # elif defined(__ia64) || defined(__ia64__)
181 struct { unsigned long long ip,gp; } *p=(void *)instruction_pointer;
182 return (void *)(size_t)p->ip;
184 #elif (defined(__VMS) || defined(VMS)) && !(defined(vax) || defined(__vax__))
185 /* applies to both alpha and ia64 */
186 struct { unsigned __int64 opaque,ip; } *p=(void *)instruction_pointer;
187 return (void *)(size_t)p->ip;
188 #elif defined(__VOS__)
189 /* applies to both pa-risc and ia32 */
190 struct { void *dp,*ip,*gp; } *p = (void *)instruction_pointer;
192 #elif defined(_WIN32)
193 # if defined(_WIN64) && defined(_M_IA64)
194 struct { void *ip,*gp; } *p = (void *)FIPS_ref_point;
197 return (void *)FIPS_ref_point;
200 * In case you wonder why there is no #ifdef __linux. All Linux targets
201 * are GCC-based and therefore are covered by instruction_pointer above
202 * [well, some are covered by by the one below]...
204 #elif defined(POINTER_TO_FUNCTION_IS_POINTER_TO_1ST_INSTRUCTION)
205 return (void *)instruction_pointer;