3 # ====================================================================
4 # Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
5 # project. Rights for redistribution and usage in source and binary
6 # forms are granted according to the OpenSSL license.
7 # ====================================================================
9 # 2.22x RC4 tune-up:-) It should be noted though that my hand [as in
10 # "hand-coded assembler"] doesn't stand for the whole improvement
11 # coefficient. It turned out that eliminating RC4_CHAR from config
12 # line results in ~40% improvement (yes, even for C implementation).
13 # Presumably it has everything to do with AMD cache architecture and
14 # RAW or whatever penalties. Once again! The module *requires* config
15 # line *without* RC4_CHAR! As for coding "secret," I bet on partial
16 # register arithmetics. For example instead of 'inc %r8; and $255,%r8'
17 # I simply 'inc %r8b'. Even though optimization manual discourages
18 # to operate on partial registers, it turned out to be the best bet.
19 # At least for AMD... How IA32E would perform remains to be seen...
21 # As was shown by Marc Bevand reordering of couple of load operations
22 # results in even higher performance gain of 3.3x:-) At least on
23 # Opteron... For reference, 1x in this case is RC4_CHAR C-code
24 # compiled with gcc 3.3.2, which performs at ~54MBps per 1GHz clock.
25 # Latter means that if you want to *estimate* what to expect from
26 # *your* CPU, then multiply 54 by 3.3 and clock frequency in GHz.
30 $win64a=1 if ($output =~ /win64a.[s|asm]/);
32 open STDOUT,">$output" || die "can't open $output: $!";
34 if (defined($win64a)) {
37 $inp="%rsi"; # r8, arg3 moves here
38 $out="%rdi"; # r9, arg4 moves here
53 if (defined($win64a)) {
54 $ret =~ s/\[([\S]+)\+([\S]+)\]/[$2+$1]/g; # [%rN+%rM*4]->[%rM*4+%rN]
55 $ret =~ s/:([^\[]+)\[([^\]]+)\]/:[$2+$1]/g; # :off[ea]->:[ea+off]
57 $ret =~ s/[\+\*]/,/g; # [%rN+%rM*4]->[%rN,%rM,4]
58 $ret =~ s/\[([^\]]+)\]/($1)/g; # [%rN]->(%rN)
63 $code=<<___ if (!defined($win64a));
74 $code=<<___ if (defined($win64a));
91 movl `&PTR("DWORD:-8[$dat]")`,$XX#d
92 movl `&PTR("DWORD:-4[$dat]")`,$YY#d
98 movl `&PTR("DWORD:[$dat+$XX*4]")`,$TX#d
100 movl `&PTR("DWORD:[$dat+$YY*4]")`,$TY#d
101 movl $TX#d,`&PTR("DWORD:[$dat+$YY*4]")`
102 movl $TY#d,`&PTR("DWORD:[$dat+$XX*4]")`
105 movl `&PTR("DWORD:[$dat+$XX*4]")`,$TX#d
106 movb `&PTR("BYTE:[$dat+$TY*4]")`,%al
108 for ($i=1;$i<=6;$i++) {
112 movl `&PTR("DWORD:[$dat+$YY*4]")`,$TY#d
113 movl $TX#d,`&PTR("DWORD:[$dat+$YY*4]")`
114 movl $TY#d,`&PTR("DWORD:[$dat+$XX*4]")`
117 movl `&PTR("DWORD:[$dat+$XX*4]")`,$TX#d
118 movb `&PTR("BYTE:[$dat+$TY*4]")`,%al
124 movl `&PTR("DWORD:[$dat+$YY*4]")`,$TY#d
125 movl $TX#d,`&PTR("DWORD:[$dat+$YY*4]")`
126 movl $TY#d,`&PTR("DWORD:[$dat+$XX*4]")`
129 movb `&PTR("BYTE:[$dat+$TX*4]")`,%al
134 xor `&PTR("QWORD:-8[$inp]")`,%rax
135 mov %rax,`&PTR("QWORD:-8[$out]")`
142 movl $XX#d,`&PTR("DWORD:-8[$dat]")`
143 movl $YY#d,`&PTR("DWORD:-4[$dat]")`
145 $code.=<<___ if (defined($win64a));
154 movzb `&PTR("BYTE:[$inp]")`,%eax
156 movl `&PTR("DWORD:[$dat+$XX*4]")`,$TX#d
158 movl `&PTR("DWORD:[$dat+$YY*4]")`,$TY#d
159 movl $TX#d,`&PTR("DWORD:[$dat+$YY*4]")`
160 movl $TY#d,`&PTR("DWORD:[$dat+$XX*4]")`
162 movl `&PTR("DWORD:[$dat+$TX*4]")`,$TY#d
165 movb %al,`&PTR("BYTE:[$out]")`
171 $code.=<<___ if (defined($win64a));
176 $code.=<<___ if (!defined($win64a));
180 $code =~ s/#([bwd])/$1/gm;
181 $code =~ s/\`([^\`]*)\`/eval $1/gem;
183 if (defined($win64a)) {
184 $code =~ s/\.align/ALIGN/gm;
185 $code =~ s/[\$%]//gm;
186 $code =~ s/\.L/\$L/gm;
187 $code =~ s/([\w]+)([\s]+)([\S]+),([\S]+)/$1$2$4,$3/gm;
188 $code =~ s/([QD]*WORD|BYTE):/$1 PTR/gm;
189 $code =~ s/mov[bwlq]/mov/gm;
190 $code =~ s/movzb/movzx/gm;
191 $code =~ s/repret/DB\t0F3h,0C3h/gm;
193 $code =~ s/([QD]*WORD|BYTE)://gm;
194 $code =~ s/repret/.byte\t0xF3,0xC3/gm;