crypto/modes/asm/ghash-x86_64.pl

   1 #! /usr/bin/env perl
   2 # Copyright 2010-2016 The OpenSSL Project Authors. All Rights Reserved.
   3 #
   4 # Licensed under the OpenSSL license (the "License").  You may not use
   5 # this file except in compliance with the License.  You can obtain a copy
   6 # in the file LICENSE in the source distribution or at
   7 # https://www.openssl.org/source/license.html
   8
   9 #
  10 # ====================================================================
  11 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
  12 # project. The module is, however, dual licensed under OpenSSL and
  13 # CRYPTOGAMS licenses depending on where you obtain it. For further
  14 # details see http://www.openssl.org/~appro/cryptogams/.
  15 # ====================================================================
  16 #
  17 # March, June 2010
  18 #
  19 # The module implements "4-bit" GCM GHASH function and underlying
  20 # single multiplication operation in GF(2^128). "4-bit" means that
  21 # it uses 256 bytes per-key table [+128 bytes shared table]. GHASH
  22 # function features so called "528B" variant utilizing additional
  23 # 256+16 bytes of per-key storage [+512 bytes shared table].
  24 # Performance results are for this streamed GHASH subroutine and are
  25 # expressed in cycles per processed byte, less is better:
  26 #
  27 #               gcc 3.4.x(*)    assembler
  28 #
  29 # P4            28.6            14.0            +100%
  30 # Opteron       19.3            7.7             +150%
  31 # Core2         17.8            8.1(**)         +120%
  32 # Atom          31.6            16.8            +88%
  33 # VIA Nano      21.8            10.1            +115%
  34 #
  35 # (*)   comparison is not completely fair, because C results are
  36 #       for vanilla "256B" implementation, while assembler results
  37 #       are for "528B";-)
  38 # (**)  it's mystery [to me] why Core2 result is not same as for
  39 #       Opteron;
  40
  41 # May 2010
  42 #
  43 # Add PCLMULQDQ version performing at 2.02 cycles per processed byte.
  44 # See ghash-x86.pl for background information and details about coding
  45 # techniques.
  46 #
  47 # Special thanks to David Woodhouse <dwmw2@infradead.org> for
  48 # providing access to a Westmere-based system on behalf of Intel
  49 # Open Source Technology Centre.
  50
  51 # December 2012
  52 #
  53 # Overhaul: aggregate Karatsuba post-processing, improve ILP in
  54 # reduction_alg9, increase reduction aggregate factor to 4x. As for
  55 # the latter. ghash-x86.pl discusses that it makes lesser sense to
  56 # increase aggregate factor. Then why increase here? Critical path
  57 # consists of 3 independent pclmulqdq instructions, Karatsuba post-
  58 # processing and reduction. "On top" of this we lay down aggregated
  59 # multiplication operations, triplets of independent pclmulqdq's. As
  60 # issue rate for pclmulqdq is limited, it makes lesser sense to
  61 # aggregate more multiplications than it takes to perform remaining
  62 # non-multiplication operations. 2x is near-optimal coefficient for
  63 # contemporary Intel CPUs (therefore modest improvement coefficient),
  64 # but not for Bulldozer. Latter is because logical SIMD operations
  65 # are twice as slow in comparison to Intel, so that critical path is
  66 # longer. A CPU with higher pclmulqdq issue rate would also benefit
  67 # from higher aggregate factor...
  68 #
  69 # Westmere      1.78(+13%)
  70 # Sandy Bridge  1.80(+8%)
  71 # Ivy Bridge    1.80(+7%)
  72 # Haswell       0.55(+93%) (if system doesn't support AVX)
  73 # Broadwell     0.45(+110%)(if system doesn't support AVX)
  74 # Skylake       0.44(+110%)(if system doesn't support AVX)
  75 # Bulldozer     1.49(+27%)
  76 # Silvermont    2.88(+13%)
  77
  78 # March 2013
  79 #
  80 # ... 8x aggregate factor AVX code path is using reduction algorithm
  81 # suggested by Shay Gueron[1]. Even though contemporary AVX-capable
  82 # CPUs such as Sandy and Ivy Bridge can execute it, the code performs
  83 # sub-optimally in comparison to above mentioned version. But thanks
  84 # to Ilya Albrekht and Max Locktyukhin of Intel Corp. we knew that
  85 # it performs in 0.41 cycles per byte on Haswell processor, in
  86 # 0.29 on Broadwell, and in 0.36 on Skylake.
  87 #
  88 # [1] http://rt.openssl.org/Ticket/Display.html?id=2900&user=guest&pass=guest
  89
  90 $flavour = shift;
  91 $output  = shift;
  92 if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
  93
  94 $win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
  95
  96 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
  97 ( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
  98 ( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
  99 die "can't locate x86_64-xlate.pl";
 100
 101 if (`$ENV{CC} -Wa,-v -c -o /dev/null -x assembler /dev/null 2>&1`
 102                 =~ /GNU assembler version ([2-9]\.[0-9]+)/) {
 103         $avx = ($1>=2.20) + ($1>=2.22);
 104 }
 105
 106 if (!$avx && $win64 && ($flavour =~ /nasm/ || $ENV{ASM} =~ /nasm/) &&
 107             `nasm -v 2>&1` =~ /NASM version ([2-9]\.[0-9]+)/) {
 108         $avx = ($1>=2.09) + ($1>=2.10);
 109 }
 110
 111 if (!$avx && $win64 && ($flavour =~ /masm/ || $ENV{ASM} =~ /ml64/) &&
 112             `ml64 2>&1` =~ /Version ([0-9]+)\./) {
 113         $avx = ($1>=10) + ($1>=11);
 114 }
 115
 116 if (!$avx && `$ENV{CC} -v 2>&1` =~ /((?:^clang|LLVM) version|.*based on LLVM) ([3-9]\.[0-9]+)/) {
 117         $avx = ($2>=3.0) + ($2>3.0);
 118 }
 119
 120 open OUT,"| \"$^X\" \"$xlate\" $flavour \"$output\"";
 121 *STDOUT=*OUT;
 122
 123 $do4xaggr=1;
 124
 125 # common register layout
 126 $nlo="%rax";
 127 $nhi="%rbx";
 128 $Zlo="%r8";
 129 $Zhi="%r9";
 130 $tmp="%r10";
 131 $rem_4bit = "%r11";
 132
 133 $Xi="%rdi";
 134 $Htbl="%rsi";
 135
 136 # per-function register layout
 137 $cnt="%rcx";
 138 $rem="%rdx";
 139
 140 sub LB() { my $r=shift; $r =~ s/%[er]([a-d])x/%\1l/     or
 141                         $r =~ s/%[er]([sd]i)/%\1l/      or
 142                         $r =~ s/%[er](bp)/%\1l/         or
 143                         $r =~ s/%(r[0-9]+)[d]?/%\1b/;   $r; }
 144
 145 sub AUTOLOAD()          # thunk [simplified] 32-bit style perlasm
 146 { my $opcode = $AUTOLOAD; $opcode =~ s/.*:://;
 147   my $arg = pop;
 148     $arg = "\$$arg" if ($arg*1 eq $arg);
 149     $code .= "\t$opcode\t".join(',',$arg,reverse @_)."\n";
 150 }
 151 \f
 152 { my $N;
 153   sub loop() {
 154   my $inp = shift;
 155
 156         $N++;
 157 $code.=<<___;
 158         xor     $nlo,$nlo
 159         xor     $nhi,$nhi
 160         mov     `&LB("$Zlo")`,`&LB("$nlo")`
 161         mov     `&LB("$Zlo")`,`&LB("$nhi")`
 162         shl     \$4,`&LB("$nlo")`
 163         mov     \$14,$cnt
 164         mov     8($Htbl,$nlo),$Zlo
 165         mov     ($Htbl,$nlo),$Zhi
 166         and     \$0xf0,`&LB("$nhi")`
 167         mov     $Zlo,$rem
 168         jmp     .Loop$N
 169
 170 .align  16
 171 .Loop$N:
 172         shr     \$4,$Zlo
 173         and     \$0xf,$rem
 174         mov     $Zhi,$tmp
 175         mov     ($inp,$cnt),`&LB("$nlo")`
 176         shr     \$4,$Zhi
 177         xor     8($Htbl,$nhi),$Zlo
 178         shl     \$60,$tmp
 179         xor     ($Htbl,$nhi),$Zhi
 180         mov     `&LB("$nlo")`,`&LB("$nhi")`
 181         xor     ($rem_4bit,$rem,8),$Zhi
 182         mov     $Zlo,$rem
 183         shl     \$4,`&LB("$nlo")`
 184         xor     $tmp,$Zlo
 185         dec     $cnt
 186         js      .Lbreak$N
 187
 188         shr     \$4,$Zlo
 189         and     \$0xf,$rem
 190         mov     $Zhi,$tmp
 191         shr     \$4,$Zhi
 192         xor     8($Htbl,$nlo),$Zlo
 193         shl     \$60,$tmp
 194         xor     ($Htbl,$nlo),$Zhi
 195         and     \$0xf0,`&LB("$nhi")`
 196         xor     ($rem_4bit,$rem,8),$Zhi
 197         mov     $Zlo,$rem
 198         xor     $tmp,$Zlo
 199         jmp     .Loop$N
 200
 201 .align  16
 202 .Lbreak$N:
 203         shr     \$4,$Zlo
 204         and     \$0xf,$rem
 205         mov     $Zhi,$tmp
 206         shr     \$4,$Zhi
 207         xor     8($Htbl,$nlo),$Zlo
 208         shl     \$60,$tmp
 209         xor     ($Htbl,$nlo),$Zhi
 210         and     \$0xf0,`&LB("$nhi")`
 211         xor     ($rem_4bit,$rem,8),$Zhi
 212         mov     $Zlo,$rem
 213         xor     $tmp,$Zlo
 214
 215         shr     \$4,$Zlo
 216         and     \$0xf,$rem
 217         mov     $Zhi,$tmp
 218         shr     \$4,$Zhi
 219         xor     8($Htbl,$nhi),$Zlo
 220         shl     \$60,$tmp
 221         xor     ($Htbl,$nhi),$Zhi
 222         xor     $tmp,$Zlo
 223         xor     ($rem_4bit,$rem,8),$Zhi
 224
 225         bswap   $Zlo
 226         bswap   $Zhi
 227 ___
 228 }}
 229
 230 $code=<<___;
 231 .text
 232 .extern OPENSSL_ia32cap_P
 233
 234 .globl  gcm_gmult_4bit
 235 .type   gcm_gmult_4bit,\@function,2
 236 .align  16
 237 gcm_gmult_4bit:
 238         push    %rbx
 239         push    %rbp            # %rbp and %r12 are pushed exclusively in
 240         push    %r12            # order to reuse Win64 exception handler...
 241 .Lgmult_prologue:
 242
 243         movzb   15($Xi),$Zlo
 244         lea     .Lrem_4bit(%rip),$rem_4bit
 245 ___
 246         &loop   ($Xi);
 247 $code.=<<___;
 248         mov     $Zlo,8($Xi)
 249         mov     $Zhi,($Xi)
 250
 251         mov     16(%rsp),%rbx
 252         lea     24(%rsp),%rsp
 253 .Lgmult_epilogue:
 254         ret
 255 .size   gcm_gmult_4bit,.-gcm_gmult_4bit
 256 ___
 257 \f
 258 # per-function register layout
 259 $inp="%rdx";
 260 $len="%rcx";
 261 $rem_8bit=$rem_4bit;
 262
 263 $code.=<<___;
 264 .globl  gcm_ghash_4bit
 265 .type   gcm_ghash_4bit,\@function,4
 266 .align  16
 267 gcm_ghash_4bit:
 268         push    %rbx
 269         push    %rbp
 270         push    %r12
 271         push    %r13
 272         push    %r14
 273         push    %r15
 274         sub     \$280,%rsp
 275 .Lghash_prologue:
 276         mov     $inp,%r14               # reassign couple of args
 277         mov     $len,%r15
 278 ___
 279 { my $inp="%r14";
 280   my $dat="%edx";
 281   my $len="%r15";
 282   my @nhi=("%ebx","%ecx");
 283   my @rem=("%r12","%r13");
 284   my $Hshr4="%rbp";
 285
 286         &sub    ($Htbl,-128);           # size optimization
 287         &lea    ($Hshr4,"16+128(%rsp)");
 288         { my @lo =($nlo,$nhi);
 289           my @hi =($Zlo,$Zhi);
 290
 291           &xor  ($dat,$dat);
 292           for ($i=0,$j=-2;$i<18;$i++,$j++) {
 293             &mov        ("$j(%rsp)",&LB($dat))          if ($i>1);
 294             &or         ($lo[0],$tmp)                   if ($i>1);
 295             &mov        (&LB($dat),&LB($lo[1]))         if ($i>0 && $i<17);
 296             &shr        ($lo[1],4)                      if ($i>0 && $i<17);
 297             &mov        ($tmp,$hi[1])                   if ($i>0 && $i<17);
 298             &shr        ($hi[1],4)                      if ($i>0 && $i<17);
 299             &mov        ("8*$j($Hshr4)",$hi[0])         if ($i>1);
 300             &mov        ($hi[0],"16*$i+0-128($Htbl)")   if ($i<16);
 301             &shl        (&LB($dat),4)                   if ($i>0 && $i<17);
 302             &mov        ("8*$j-128($Hshr4)",$lo[0])     if ($i>1);
 303             &mov        ($lo[0],"16*$i+8-128($Htbl)")   if ($i<16);
 304             &shl        ($tmp,60)                       if ($i>0 && $i<17);
 305
 306             push        (@lo,shift(@lo));
 307             push        (@hi,shift(@hi));
 308           }
 309         }
 310         &add    ($Htbl,-128);
 311         &mov    ($Zlo,"8($Xi)");
 312         &mov    ($Zhi,"0($Xi)");
 313         &add    ($len,$inp);            # pointer to the end of data
 314         &lea    ($rem_8bit,".Lrem_8bit(%rip)");
 315         &jmp    (".Louter_loop");
 316
 317 $code.=".align  16\n.Louter_loop:\n";
 318         &xor    ($Zhi,"($inp)");
 319         &mov    ("%rdx","8($inp)");
 320         &lea    ($inp,"16($inp)");
 321         &xor    ("%rdx",$Zlo);
 322         &mov    ("($Xi)",$Zhi);
 323         &mov    ("8($Xi)","%rdx");
 324         &shr    ("%rdx",32);
 325
 326         &xor    ($nlo,$nlo);
 327         &rol    ($dat,8);
 328         &mov    (&LB($nlo),&LB($dat));
 329         &movz   ($nhi[0],&LB($dat));
 330         &shl    (&LB($nlo),4);
 331         &shr    ($nhi[0],4);
 332
 333         for ($j=11,$i=0;$i<15;$i++) {
 334             &rol        ($dat,8);
 335             &xor        ($Zlo,"8($Htbl,$nlo)")                  if ($i>0);
 336             &xor        ($Zhi,"($Htbl,$nlo)")                   if ($i>0);
 337             &mov        ($Zlo,"8($Htbl,$nlo)")                  if ($i==0);
 338             &mov        ($Zhi,"($Htbl,$nlo)")                   if ($i==0);
 339
 340             &mov        (&LB($nlo),&LB($dat));
 341             &xor        ($Zlo,$tmp)                             if ($i>0);
 342             &movzw      ($rem[1],"($rem_8bit,$rem[1],2)")       if ($i>0);
 343
 344             &movz       ($nhi[1],&LB($dat));
 345             &shl        (&LB($nlo),4);
 346             &movzb      ($rem[0],"(%rsp,$nhi[0])");
 347
 348             &shr        ($nhi[1],4)                             if ($i<14);
 349             &and        ($nhi[1],0xf0)                          if ($i==14);
 350             &shl        ($rem[1],48)                            if ($i>0);
 351             &xor        ($rem[0],$Zlo);
 352
 353             &mov        ($tmp,$Zhi);
 354             &xor        ($Zhi,$rem[1])                          if ($i>0);
 355             &shr        ($Zlo,8);
 356
 357             &movz       ($rem[0],&LB($rem[0]));
 358             &mov        ($dat,"$j($Xi)")                        if (--$j%4==0);
 359             &shr        ($Zhi,8);
 360
 361             &xor        ($Zlo,"-128($Hshr4,$nhi[0],8)");
 362             &shl        ($tmp,56);
 363             &xor        ($Zhi,"($Hshr4,$nhi[0],8)");
 364
 365             unshift     (@nhi,pop(@nhi));               # "rotate" registers
 366             unshift     (@rem,pop(@rem));
 367         }
 368         &movzw  ($rem[1],"($rem_8bit,$rem[1],2)");
 369         &xor    ($Zlo,"8($Htbl,$nlo)");
 370         &xor    ($Zhi,"($Htbl,$nlo)");
 371
 372         &shl    ($rem[1],48);
 373         &xor    ($Zlo,$tmp);
 374
 375         &xor    ($Zhi,$rem[1]);
 376         &movz   ($rem[0],&LB($Zlo));
 377         &shr    ($Zlo,4);
 378
 379         &mov    ($tmp,$Zhi);
 380         &shl    (&LB($rem[0]),4);
 381         &shr    ($Zhi,4);
 382
 383         &xor    ($Zlo,"8($Htbl,$nhi[0])");
 384         &movzw  ($rem[0],"($rem_8bit,$rem[0],2)");
 385         &shl    ($tmp,60);
 386
 387         &xor    ($Zhi,"($Htbl,$nhi[0])");
 388         &xor    ($Zlo,$tmp);
 389         &shl    ($rem[0],48);
 390
 391         &bswap  ($Zlo);
 392         &xor    ($Zhi,$rem[0]);
 393
 394         &bswap  ($Zhi);
 395         &cmp    ($inp,$len);
 396         &jb     (".Louter_loop");
 397 }
 398 $code.=<<___;
 399         mov     $Zlo,8($Xi)
 400         mov     $Zhi,($Xi)
 401
 402         lea     280(%rsp),%rsi
 403         mov     0(%rsi),%r15
 404         mov     8(%rsi),%r14
 405         mov     16(%rsi),%r13
 406         mov     24(%rsi),%r12
 407         mov     32(%rsi),%rbp
 408         mov     40(%rsi),%rbx
 409         lea     48(%rsi),%rsp
 410 .Lghash_epilogue:
 411         ret
 412 .size   gcm_ghash_4bit,.-gcm_ghash_4bit
 413 ___
 414 \f
 415 ######################################################################
 416 # PCLMULQDQ version.
 417
 418 @_4args=$win64? ("%rcx","%rdx","%r8", "%r9") :  # Win64 order
 419                 ("%rdi","%rsi","%rdx","%rcx");  # Unix order
 420
 421 ($Xi,$Xhi)=("%xmm0","%xmm1");   $Hkey="%xmm2";
 422 ($T1,$T2,$T3)=("%xmm3","%xmm4","%xmm5");
 423
 424 sub clmul64x64_T2 {     # minimal register pressure
 425 my ($Xhi,$Xi,$Hkey,$HK)=@_;
 426
 427 if (!defined($HK)) {    $HK = $T2;
 428 $code.=<<___;
 429         movdqa          $Xi,$Xhi                #
 430         pshufd          \$0b01001110,$Xi,$T1
 431         pshufd          \$0b01001110,$Hkey,$T2
 432         pxor            $Xi,$T1                 #
 433         pxor            $Hkey,$T2
 434 ___
 435 } else {
 436 $code.=<<___;
 437         movdqa          $Xi,$Xhi                #
 438         pshufd          \$0b01001110,$Xi,$T1
 439         pxor            $Xi,$T1                 #
 440 ___
 441 }
 442 $code.=<<___;
 443         pclmulqdq       \$0x00,$Hkey,$Xi        #######
 444         pclmulqdq       \$0x11,$Hkey,$Xhi       #######
 445         pclmulqdq       \$0x00,$HK,$T1          #######
 446         pxor            $Xi,$T1                 #
 447         pxor            $Xhi,$T1                #
 448
 449         movdqa          $T1,$T2                 #
 450         psrldq          \$8,$T1
 451         pslldq          \$8,$T2                 #
 452         pxor            $T1,$Xhi
 453         pxor            $T2,$Xi                 #
 454 ___
 455 }
 456
 457 sub reduction_alg9 {    # 17/11 times faster than Intel version
 458 my ($Xhi,$Xi) = @_;
 459
 460 $code.=<<___;
 461         # 1st phase
 462         movdqa          $Xi,$T2                 #
 463         movdqa          $Xi,$T1
 464         psllq           \$5,$Xi
 465         pxor            $Xi,$T1                 #
 466         psllq           \$1,$Xi
 467         pxor            $T1,$Xi                 #
 468         psllq           \$57,$Xi                #
 469         movdqa          $Xi,$T1                 #
 470         pslldq          \$8,$Xi
 471         psrldq          \$8,$T1                 #
 472         pxor            $T2,$Xi
 473         pxor            $T1,$Xhi                #
 474
 475         # 2nd phase
 476         movdqa          $Xi,$T2
 477         psrlq           \$1,$Xi
 478         pxor            $T2,$Xhi                #
 479         pxor            $Xi,$T2
 480         psrlq           \$5,$Xi
 481         pxor            $T2,$Xi                 #
 482         psrlq           \$1,$Xi                 #
 483         pxor            $Xhi,$Xi                #
 484 ___
 485 }
 486 \f
 487 { my ($Htbl,$Xip)=@_4args;
 488   my $HK="%xmm6";
 489
 490 $code.=<<___;
 491 .globl  gcm_init_clmul
 492 .type   gcm_init_clmul,\@abi-omnipotent
 493 .align  16
 494 gcm_init_clmul:
 495 .L_init_clmul:
 496 ___
 497 $code.=<<___ if ($win64);
 498 .LSEH_begin_gcm_init_clmul:
 499         # I can't trust assembler to use specific encoding:-(
 500         .byte   0x48,0x83,0xec,0x18             #sub    $0x18,%rsp
 501         .byte   0x0f,0x29,0x34,0x24             #movaps %xmm6,(%rsp)
 502 ___
 503 $code.=<<___;
 504         movdqu          ($Xip),$Hkey
 505         pshufd          \$0b01001110,$Hkey,$Hkey        # dword swap
 506
 507         # <<1 twist
 508         pshufd          \$0b11111111,$Hkey,$T2  # broadcast uppermost dword
 509         movdqa          $Hkey,$T1
 510         psllq           \$1,$Hkey
 511         pxor            $T3,$T3                 #
 512         psrlq           \$63,$T1
 513         pcmpgtd         $T2,$T3                 # broadcast carry bit
 514         pslldq          \$8,$T1
 515         por             $T1,$Hkey               # H<<=1
 516
 517         # magic reduction
 518         pand            .L0x1c2_polynomial(%rip),$T3
 519         pxor            $T3,$Hkey               # if(carry) H^=0x1c2_polynomial
 520
 521         # calculate H^2
 522         pshufd          \$0b01001110,$Hkey,$HK
 523         movdqa          $Hkey,$Xi
 524         pxor            $Hkey,$HK
 525 ___
 526         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$HK);
 527         &reduction_alg9 ($Xhi,$Xi);
 528 $code.=<<___;
 529         pshufd          \$0b01001110,$Hkey,$T1
 530         pshufd          \$0b01001110,$Xi,$T2
 531         pxor            $Hkey,$T1               # Karatsuba pre-processing
 532         movdqu          $Hkey,0x00($Htbl)       # save H
 533         pxor            $Xi,$T2                 # Karatsuba pre-processing
 534         movdqu          $Xi,0x10($Htbl)         # save H^2
 535         palignr         \$8,$T1,$T2             # low part is H.lo^H.hi...
 536         movdqu          $T2,0x20($Htbl)         # save Karatsuba "salt"
 537 ___
 538 if ($do4xaggr) {
 539         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$HK);   # H^3
 540         &reduction_alg9 ($Xhi,$Xi);
 541 $code.=<<___;
 542         movdqa          $Xi,$T3
 543 ___
 544         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$HK);   # H^4
 545         &reduction_alg9 ($Xhi,$Xi);
 546 $code.=<<___;
 547         pshufd          \$0b01001110,$T3,$T1
 548         pshufd          \$0b01001110,$Xi,$T2
 549         pxor            $T3,$T1                 # Karatsuba pre-processing
 550         movdqu          $T3,0x30($Htbl)         # save H^3
 551         pxor            $Xi,$T2                 # Karatsuba pre-processing
 552         movdqu          $Xi,0x40($Htbl)         # save H^4
 553         palignr         \$8,$T1,$T2             # low part is H^3.lo^H^3.hi...
 554         movdqu          $T2,0x50($Htbl)         # save Karatsuba "salt"
 555 ___
 556 }
 557 $code.=<<___ if ($win64);
 558         movaps  (%rsp),%xmm6
 559         lea     0x18(%rsp),%rsp
 560 .LSEH_end_gcm_init_clmul:
 561 ___
 562 $code.=<<___;
 563         ret
 564 .size   gcm_init_clmul,.-gcm_init_clmul
 565 ___
 566 }
 567
 568 { my ($Xip,$Htbl)=@_4args;
 569
 570 $code.=<<___;
 571 .globl  gcm_gmult_clmul
 572 .type   gcm_gmult_clmul,\@abi-omnipotent
 573 .align  16
 574 gcm_gmult_clmul:
 575 .L_gmult_clmul:
 576         movdqu          ($Xip),$Xi
 577         movdqa          .Lbswap_mask(%rip),$T3
 578         movdqu          ($Htbl),$Hkey
 579         movdqu          0x20($Htbl),$T2
 580         pshufb          $T3,$Xi
 581 ___
 582         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$T2);
 583 $code.=<<___ if (0 || (&reduction_alg9($Xhi,$Xi)&&0));
 584         # experimental alternative. special thing about is that there
 585         # no dependency between the two multiplications...
 586         mov             \$`0xE1<<1`,%eax
 587         mov             \$0xA040608020C0E000,%r10       # ((7..0)·0xE0)&0xff
 588         mov             \$0x07,%r11d
 589         movq            %rax,$T1
 590         movq            %r10,$T2
 591         movq            %r11,$T3                # borrow $T3
 592         pand            $Xi,$T3
 593         pshufb          $T3,$T2                 # ($Xi&7)·0xE0
 594         movq            %rax,$T3
 595         pclmulqdq       \$0x00,$Xi,$T1          # ·(0xE1<<1)
 596         pxor            $Xi,$T2
 597         pslldq          \$15,$T2
 598         paddd           $T2,$T2                 # <<(64+56+1)
 599         pxor            $T2,$Xi
 600         pclmulqdq       \$0x01,$T3,$Xi
 601         movdqa          .Lbswap_mask(%rip),$T3  # reload $T3
 602         psrldq          \$1,$T1
 603         pxor            $T1,$Xhi
 604         pslldq          \$7,$Xi
 605         pxor            $Xhi,$Xi
 606 ___
 607 $code.=<<___;
 608         pshufb          $T3,$Xi
 609         movdqu          $Xi,($Xip)
 610         ret
 611 .size   gcm_gmult_clmul,.-gcm_gmult_clmul
 612 ___
 613 }
 614 \f
 615 { my ($Xip,$Htbl,$inp,$len)=@_4args;
 616   my ($Xln,$Xmn,$Xhn,$Hkey2,$HK) = map("%xmm$_",(3..7));
 617   my ($T1,$T2,$T3)=map("%xmm$_",(8..10));
 618
 619 $code.=<<___;
 620 .globl  gcm_ghash_clmul
 621 .type   gcm_ghash_clmul,\@abi-omnipotent
 622 .align  32
 623 gcm_ghash_clmul:
 624 .L_ghash_clmul:
 625 ___
 626 $code.=<<___ if ($win64);
 627         lea     -0x88(%rsp),%rax
 628 .LSEH_begin_gcm_ghash_clmul:
 629         # I can't trust assembler to use specific encoding:-(
 630         .byte   0x48,0x8d,0x60,0xe0             #lea    -0x20(%rax),%rsp
 631         .byte   0x0f,0x29,0x70,0xe0             #movaps %xmm6,-0x20(%rax)
 632         .byte   0x0f,0x29,0x78,0xf0             #movaps %xmm7,-0x10(%rax)
 633         .byte   0x44,0x0f,0x29,0x00             #movaps %xmm8,0(%rax)
 634         .byte   0x44,0x0f,0x29,0x48,0x10        #movaps %xmm9,0x10(%rax)
 635         .byte   0x44,0x0f,0x29,0x50,0x20        #movaps %xmm10,0x20(%rax)
 636         .byte   0x44,0x0f,0x29,0x58,0x30        #movaps %xmm11,0x30(%rax)
 637         .byte   0x44,0x0f,0x29,0x60,0x40        #movaps %xmm12,0x40(%rax)
 638         .byte   0x44,0x0f,0x29,0x68,0x50        #movaps %xmm13,0x50(%rax)
 639         .byte   0x44,0x0f,0x29,0x70,0x60        #movaps %xmm14,0x60(%rax)
 640         .byte   0x44,0x0f,0x29,0x78,0x70        #movaps %xmm15,0x70(%rax)
 641 ___
 642 $code.=<<___;
 643         movdqa          .Lbswap_mask(%rip),$T3
 644
 645         movdqu          ($Xip),$Xi
 646         movdqu          ($Htbl),$Hkey
 647         movdqu          0x20($Htbl),$HK
 648         pshufb          $T3,$Xi
 649
 650         sub             \$0x10,$len
 651         jz              .Lodd_tail
 652
 653         movdqu          0x10($Htbl),$Hkey2
 654 ___
 655 if ($do4xaggr) {
 656 my ($Xl,$Xm,$Xh,$Hkey3,$Hkey4)=map("%xmm$_",(11..15));
 657
 658 $code.=<<___;
 659         mov             OPENSSL_ia32cap_P+4(%rip),%eax
 660         cmp             \$0x30,$len
 661         jb              .Lskip4x
 662
 663         and             \$`1<<26|1<<22`,%eax    # isolate MOVBE+XSAVE
 664         cmp             \$`1<<22`,%eax          # check for MOVBE without XSAVE
 665         je              .Lskip4x
 666
 667         sub             \$0x30,$len
 668         mov             \$0xA040608020C0E000,%rax       # ((7..0)·0xE0)&0xff
 669         movdqu          0x30($Htbl),$Hkey3
 670         movdqu          0x40($Htbl),$Hkey4
 671
 672         #######
 673         # Xi+4 =[(H*Ii+3) + (H^2*Ii+2) + (H^3*Ii+1) + H^4*(Ii+Xi)] mod P
 674         #
 675         movdqu          0x30($inp),$Xln
 676          movdqu         0x20($inp),$Xl
 677         pshufb          $T3,$Xln
 678          pshufb         $T3,$Xl
 679         movdqa          $Xln,$Xhn
 680         pshufd          \$0b01001110,$Xln,$Xmn
 681         pxor            $Xln,$Xmn
 682         pclmulqdq       \$0x00,$Hkey,$Xln
 683         pclmulqdq       \$0x11,$Hkey,$Xhn
 684         pclmulqdq       \$0x00,$HK,$Xmn
 685
 686         movdqa          $Xl,$Xh
 687         pshufd          \$0b01001110,$Xl,$Xm
 688         pxor            $Xl,$Xm
 689         pclmulqdq       \$0x00,$Hkey2,$Xl
 690         pclmulqdq       \$0x11,$Hkey2,$Xh
 691         pclmulqdq       \$0x10,$HK,$Xm
 692         xorps           $Xl,$Xln
 693         xorps           $Xh,$Xhn
 694         movups          0x50($Htbl),$HK
 695         xorps           $Xm,$Xmn
 696
 697         movdqu          0x10($inp),$Xl
 698          movdqu         0($inp),$T1
 699         pshufb          $T3,$Xl
 700          pshufb         $T3,$T1
 701         movdqa          $Xl,$Xh
 702         pshufd          \$0b01001110,$Xl,$Xm
 703          pxor           $T1,$Xi
 704         pxor            $Xl,$Xm
 705         pclmulqdq       \$0x00,$Hkey3,$Xl
 706          movdqa         $Xi,$Xhi
 707          pshufd         \$0b01001110,$Xi,$T1
 708          pxor           $Xi,$T1
 709         pclmulqdq       \$0x11,$Hkey3,$Xh
 710         pclmulqdq       \$0x00,$HK,$Xm
 711         xorps           $Xl,$Xln
 712         xorps           $Xh,$Xhn
 713
 714         lea     0x40($inp),$inp
 715         sub     \$0x40,$len
 716         jc      .Ltail4x
 717
 718         jmp     .Lmod4_loop
 719 .align  32
 720 .Lmod4_loop:
 721         pclmulqdq       \$0x00,$Hkey4,$Xi
 722         xorps           $Xm,$Xmn
 723          movdqu         0x30($inp),$Xl
 724          pshufb         $T3,$Xl
 725         pclmulqdq       \$0x11,$Hkey4,$Xhi
 726         xorps           $Xln,$Xi
 727          movdqu         0x20($inp),$Xln
 728          movdqa         $Xl,$Xh
 729         pclmulqdq       \$0x10,$HK,$T1
 730          pshufd         \$0b01001110,$Xl,$Xm
 731         xorps           $Xhn,$Xhi
 732          pxor           $Xl,$Xm
 733          pshufb         $T3,$Xln
 734         movups          0x20($Htbl),$HK
 735         xorps           $Xmn,$T1
 736          pclmulqdq      \$0x00,$Hkey,$Xl
 737          pshufd         \$0b01001110,$Xln,$Xmn
 738
 739         pxor            $Xi,$T1                 # aggregated Karatsuba post-processing
 740          movdqa         $Xln,$Xhn
 741         pxor            $Xhi,$T1                #
 742          pxor           $Xln,$Xmn
 743         movdqa          $T1,$T2                 #
 744          pclmulqdq      \$0x11,$Hkey,$Xh
 745         pslldq          \$8,$T1
 746         psrldq          \$8,$T2                 #
 747         pxor            $T1,$Xi
 748         movdqa          .L7_mask(%rip),$T1
 749         pxor            $T2,$Xhi                #
 750         movq            %rax,$T2
 751
 752         pand            $Xi,$T1                 # 1st phase
 753         pshufb          $T1,$T2                 #
 754         pxor            $Xi,$T2                 #
 755          pclmulqdq      \$0x00,$HK,$Xm
 756         psllq           \$57,$T2                #
 757         movdqa          $T2,$T1                 #
 758         pslldq          \$8,$T2
 759          pclmulqdq      \$0x00,$Hkey2,$Xln
 760         psrldq          \$8,$T1                 #
 761         pxor            $T2,$Xi
 762         pxor            $T1,$Xhi                #
 763         movdqu          0($inp),$T1
 764
 765         movdqa          $Xi,$T2                 # 2nd phase
 766         psrlq           \$1,$Xi
 767          pclmulqdq      \$0x11,$Hkey2,$Xhn
 768          xorps          $Xl,$Xln
 769          movdqu         0x10($inp),$Xl
 770          pshufb         $T3,$Xl
 771          pclmulqdq      \$0x10,$HK,$Xmn
 772          xorps          $Xh,$Xhn
 773          movups         0x50($Htbl),$HK
 774         pshufb          $T3,$T1
 775         pxor            $T2,$Xhi                #
 776         pxor            $Xi,$T2
 777         psrlq           \$5,$Xi
 778
 779          movdqa         $Xl,$Xh
 780          pxor           $Xm,$Xmn
 781          pshufd         \$0b01001110,$Xl,$Xm
 782         pxor            $T2,$Xi                 #
 783         pxor            $T1,$Xhi
 784          pxor           $Xl,$Xm
 785          pclmulqdq      \$0x00,$Hkey3,$Xl
 786         psrlq           \$1,$Xi                 #
 787         pxor            $Xhi,$Xi                #
 788         movdqa          $Xi,$Xhi
 789          pclmulqdq      \$0x11,$Hkey3,$Xh
 790          xorps          $Xl,$Xln
 791         pshufd          \$0b01001110,$Xi,$T1
 792         pxor            $Xi,$T1
 793
 794          pclmulqdq      \$0x00,$HK,$Xm
 795          xorps          $Xh,$Xhn
 796
 797         lea     0x40($inp),$inp
 798         sub     \$0x40,$len
 799         jnc     .Lmod4_loop
 800
 801 .Ltail4x:
 802         pclmulqdq       \$0x00,$Hkey4,$Xi
 803         pclmulqdq       \$0x11,$Hkey4,$Xhi
 804         pclmulqdq       \$0x10,$HK,$T1
 805         xorps           $Xm,$Xmn
 806         xorps           $Xln,$Xi
 807         xorps           $Xhn,$Xhi
 808         pxor            $Xi,$Xhi                # aggregated Karatsuba post-processing
 809         pxor            $Xmn,$T1
 810
 811         pxor            $Xhi,$T1                #
 812         pxor            $Xi,$Xhi
 813
 814         movdqa          $T1,$T2                 #
 815         psrldq          \$8,$T1
 816         pslldq          \$8,$T2                 #
 817         pxor            $T1,$Xhi
 818         pxor            $T2,$Xi                 #
 819 ___
 820         &reduction_alg9($Xhi,$Xi);
 821 $code.=<<___;
 822         add     \$0x40,$len
 823         jz      .Ldone
 824         movdqu  0x20($Htbl),$HK
 825         sub     \$0x10,$len
 826         jz      .Lodd_tail
 827 .Lskip4x:
 828 ___
 829 }
 830 $code.=<<___;
 831         #######
 832         # Xi+2 =[H*(Ii+1 + Xi+1)] mod P =
 833         #       [(H*Ii+1) + (H*Xi+1)] mod P =
 834         #       [(H*Ii+1) + H^2*(Ii+Xi)] mod P
 835         #
 836         movdqu          ($inp),$T1              # Ii
 837         movdqu          16($inp),$Xln           # Ii+1
 838         pshufb          $T3,$T1
 839         pshufb          $T3,$Xln
 840         pxor            $T1,$Xi                 # Ii+Xi
 841
 842         movdqa          $Xln,$Xhn
 843         pshufd          \$0b01001110,$Xln,$Xmn
 844         pxor            $Xln,$Xmn
 845         pclmulqdq       \$0x00,$Hkey,$Xln
 846         pclmulqdq       \$0x11,$Hkey,$Xhn
 847         pclmulqdq       \$0x00,$HK,$Xmn
 848
 849         lea             32($inp),$inp           # i+=2
 850         nop
 851         sub             \$0x20,$len
 852         jbe             .Leven_tail
 853         nop
 854         jmp             .Lmod_loop
 855
 856 .align  32
 857 .Lmod_loop:
 858         movdqa          $Xi,$Xhi
 859         movdqa          $Xmn,$T1
 860         pshufd          \$0b01001110,$Xi,$Xmn   #
 861         pxor            $Xi,$Xmn                #
 862
 863         pclmulqdq       \$0x00,$Hkey2,$Xi
 864         pclmulqdq       \$0x11,$Hkey2,$Xhi
 865         pclmulqdq       \$0x10,$HK,$Xmn
 866
 867         pxor            $Xln,$Xi                # (H*Ii+1) + H^2*(Ii+Xi)
 868         pxor            $Xhn,$Xhi
 869           movdqu        ($inp),$T2              # Ii
 870         pxor            $Xi,$T1                 # aggregated Karatsuba post-processing
 871           pshufb        $T3,$T2
 872           movdqu        16($inp),$Xln           # Ii+1
 873
 874         pxor            $Xhi,$T1
 875           pxor          $T2,$Xhi                # "Ii+Xi", consume early
 876         pxor            $T1,$Xmn
 877          pshufb         $T3,$Xln
 878         movdqa          $Xmn,$T1                #
 879         psrldq          \$8,$T1
 880         pslldq          \$8,$Xmn                #
 881         pxor            $T1,$Xhi
 882         pxor            $Xmn,$Xi                #
 883
 884         movdqa          $Xln,$Xhn               #
 885
 886           movdqa        $Xi,$T2                 # 1st phase
 887           movdqa        $Xi,$T1
 888           psllq         \$5,$Xi
 889           pxor          $Xi,$T1                 #
 890         pclmulqdq       \$0x00,$Hkey,$Xln       #######
 891           psllq         \$1,$Xi
 892           pxor          $T1,$Xi                 #
 893           psllq         \$57,$Xi                #
 894           movdqa        $Xi,$T1                 #
 895           pslldq        \$8,$Xi
 896           psrldq        \$8,$T1                 #
 897           pxor          $T2,$Xi
 898         pshufd          \$0b01001110,$Xhn,$Xmn
 899           pxor          $T1,$Xhi                #
 900         pxor            $Xhn,$Xmn               #
 901
 902           movdqa        $Xi,$T2                 # 2nd phase
 903           psrlq         \$1,$Xi
 904         pclmulqdq       \$0x11,$Hkey,$Xhn       #######
 905           pxor          $T2,$Xhi                #
 906           pxor          $Xi,$T2
 907           psrlq         \$5,$Xi
 908           pxor          $T2,$Xi                 #
 909         lea             32($inp),$inp
 910           psrlq         \$1,$Xi                 #
 911         pclmulqdq       \$0x00,$HK,$Xmn         #######
 912           pxor          $Xhi,$Xi                #
 913
 914         sub             \$0x20,$len
 915         ja              .Lmod_loop
 916
 917 .Leven_tail:
 918          movdqa         $Xi,$Xhi
 919          movdqa         $Xmn,$T1
 920          pshufd         \$0b01001110,$Xi,$Xmn   #
 921          pxor           $Xi,$Xmn                #
 922
 923         pclmulqdq       \$0x00,$Hkey2,$Xi
 924         pclmulqdq       \$0x11,$Hkey2,$Xhi
 925         pclmulqdq       \$0x10,$HK,$Xmn
 926
 927         pxor            $Xln,$Xi                # (H*Ii+1) + H^2*(Ii+Xi)
 928         pxor            $Xhn,$Xhi
 929         pxor            $Xi,$T1
 930         pxor            $Xhi,$T1
 931         pxor            $T1,$Xmn
 932         movdqa          $Xmn,$T1                #
 933         psrldq          \$8,$T1
 934         pslldq          \$8,$Xmn                #
 935         pxor            $T1,$Xhi
 936         pxor            $Xmn,$Xi                #
 937 ___
 938         &reduction_alg9 ($Xhi,$Xi);
 939 $code.=<<___;
 940         test            $len,$len
 941         jnz             .Ldone
 942
 943 .Lodd_tail:
 944         movdqu          ($inp),$T1              # Ii
 945         pshufb          $T3,$T1
 946         pxor            $T1,$Xi                 # Ii+Xi
 947 ___
 948         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$HK);   # H*(Ii+Xi)
 949         &reduction_alg9 ($Xhi,$Xi);
 950 $code.=<<___;
 951 .Ldone:
 952         pshufb          $T3,$Xi
 953         movdqu          $Xi,($Xip)
 954 ___
 955 $code.=<<___ if ($win64);
 956         movaps  (%rsp),%xmm6
 957         movaps  0x10(%rsp),%xmm7
 958         movaps  0x20(%rsp),%xmm8
 959         movaps  0x30(%rsp),%xmm9
 960         movaps  0x40(%rsp),%xmm10
 961         movaps  0x50(%rsp),%xmm11
 962         movaps  0x60(%rsp),%xmm12
 963         movaps  0x70(%rsp),%xmm13
 964         movaps  0x80(%rsp),%xmm14
 965         movaps  0x90(%rsp),%xmm15
 966         lea     0xa8(%rsp),%rsp
 967 .LSEH_end_gcm_ghash_clmul:
 968 ___
 969 $code.=<<___;
 970         ret
 971 .size   gcm_ghash_clmul,.-gcm_ghash_clmul
 972 ___
 973 }
 974 \f
 975 $code.=<<___;
 976 .globl  gcm_init_avx
 977 .type   gcm_init_avx,\@abi-omnipotent
 978 .align  32
 979 gcm_init_avx:
 980 ___
 981 if ($avx) {
 982 my ($Htbl,$Xip)=@_4args;
 983 my $HK="%xmm6";
 984
 985 $code.=<<___ if ($win64);
 986 .LSEH_begin_gcm_init_avx:
 987         # I can't trust assembler to use specific encoding:-(
 988         .byte   0x48,0x83,0xec,0x18             #sub    $0x18,%rsp
 989         .byte   0x0f,0x29,0x34,0x24             #movaps %xmm6,(%rsp)
 990 ___
 991 $code.=<<___;
 992         vzeroupper
 993
 994         vmovdqu         ($Xip),$Hkey
 995         vpshufd         \$0b01001110,$Hkey,$Hkey        # dword swap
 996
 997         # <<1 twist
 998         vpshufd         \$0b11111111,$Hkey,$T2  # broadcast uppermost dword
 999         vpsrlq          \$63,$Hkey,$T1
1000         vpsllq          \$1,$Hkey,$Hkey
1001         vpxor           $T3,$T3,$T3             #
1002         vpcmpgtd        $T2,$T3,$T3             # broadcast carry bit
1003         vpslldq         \$8,$T1,$T1
1004         vpor            $T1,$Hkey,$Hkey         # H<<=1
1005
1006         # magic reduction
1007         vpand           .L0x1c2_polynomial(%rip),$T3,$T3
1008         vpxor           $T3,$Hkey,$Hkey         # if(carry) H^=0x1c2_polynomial
1009
1010         vpunpckhqdq     $Hkey,$Hkey,$HK
1011         vmovdqa         $Hkey,$Xi
1012         vpxor           $Hkey,$HK,$HK
1013         mov             \$4,%r10                # up to H^8
1014         jmp             .Linit_start_avx
1015 ___
1016
1017 sub clmul64x64_avx {
1018 my ($Xhi,$Xi,$Hkey,$HK)=@_;
1019
1020 if (!defined($HK)) {    $HK = $T2;
1021 $code.=<<___;
1022         vpunpckhqdq     $Xi,$Xi,$T1
1023         vpunpckhqdq     $Hkey,$Hkey,$T2
1024         vpxor           $Xi,$T1,$T1             #
1025         vpxor           $Hkey,$T2,$T2
1026 ___
1027 } else {
1028 $code.=<<___;
1029         vpunpckhqdq     $Xi,$Xi,$T1
1030         vpxor           $Xi,$T1,$T1             #
1031 ___
1032 }
1033 $code.=<<___;
1034         vpclmulqdq      \$0x11,$Hkey,$Xi,$Xhi   #######
1035         vpclmulqdq      \$0x00,$Hkey,$Xi,$Xi    #######
1036         vpclmulqdq      \$0x00,$HK,$T1,$T1      #######
1037         vpxor           $Xi,$Xhi,$T2            #
1038         vpxor           $T2,$T1,$T1             #
1039
1040         vpslldq         \$8,$T1,$T2             #
1041         vpsrldq         \$8,$T1,$T1
1042         vpxor           $T2,$Xi,$Xi             #
1043         vpxor           $T1,$Xhi,$Xhi
1044 ___
1045 }
1046
1047 sub reduction_avx {
1048 my ($Xhi,$Xi) = @_;
1049
1050 $code.=<<___;
1051         vpsllq          \$57,$Xi,$T1            # 1st phase
1052         vpsllq          \$62,$Xi,$T2
1053         vpxor           $T1,$T2,$T2             #
1054         vpsllq          \$63,$Xi,$T1
1055         vpxor           $T1,$T2,$T2             #
1056         vpslldq         \$8,$T2,$T1             #
1057         vpsrldq         \$8,$T2,$T2
1058         vpxor           $T1,$Xi,$Xi             #
1059         vpxor           $T2,$Xhi,$Xhi
1060
1061         vpsrlq          \$1,$Xi,$T2             # 2nd phase
1062         vpxor           $Xi,$Xhi,$Xhi
1063         vpxor           $T2,$Xi,$Xi             #
1064         vpsrlq          \$5,$T2,$T2
1065         vpxor           $T2,$Xi,$Xi             #
1066         vpsrlq          \$1,$Xi,$Xi             #
1067         vpxor           $Xhi,$Xi,$Xi            #
1068 ___
1069 }
1070
1071 $code.=<<___;
1072 .align  32
1073 .Linit_loop_avx:
1074         vpalignr        \$8,$T1,$T2,$T3         # low part is H.lo^H.hi...
1075         vmovdqu         $T3,-0x10($Htbl)        # save Karatsuba "salt"
1076 ___
1077         &clmul64x64_avx ($Xhi,$Xi,$Hkey,$HK);   # calculate H^3,5,7
1078         &reduction_avx  ($Xhi,$Xi);
1079 $code.=<<___;
1080 .Linit_start_avx:
1081         vmovdqa         $Xi,$T3
1082 ___
1083         &clmul64x64_avx ($Xhi,$Xi,$Hkey,$HK);   # calculate H^2,4,6,8
1084         &reduction_avx  ($Xhi,$Xi);
1085 $code.=<<___;
1086         vpshufd         \$0b01001110,$T3,$T1
1087         vpshufd         \$0b01001110,$Xi,$T2
1088         vpxor           $T3,$T1,$T1             # Karatsuba pre-processing
1089         vmovdqu         $T3,0x00($Htbl)         # save H^1,3,5,7
1090         vpxor           $Xi,$T2,$T2             # Karatsuba pre-processing
1091         vmovdqu         $Xi,0x10($Htbl)         # save H^2,4,6,8
1092         lea             0x30($Htbl),$Htbl
1093         sub             \$1,%r10
1094         jnz             .Linit_loop_avx
1095
1096         vpalignr        \$8,$T2,$T1,$T3         # last "salt" is flipped
1097         vmovdqu         $T3,-0x10($Htbl)
1098
1099         vzeroupper
1100 ___
1101 $code.=<<___ if ($win64);
1102         movaps  (%rsp),%xmm6
1103         lea     0x18(%rsp),%rsp
1104 .LSEH_end_gcm_init_avx:
1105 ___
1106 $code.=<<___;
1107         ret
1108 .size   gcm_init_avx,.-gcm_init_avx
1109 ___
1110 } else {
1111 $code.=<<___;
1112         jmp     .L_init_clmul
1113 .size   gcm_init_avx,.-gcm_init_avx
1114 ___
1115 }
1116
1117 $code.=<<___;
1118 .globl  gcm_gmult_avx
1119 .type   gcm_gmult_avx,\@abi-omnipotent
1120 .align  32
1121 gcm_gmult_avx:
1122         jmp     .L_gmult_clmul
1123 .size   gcm_gmult_avx,.-gcm_gmult_avx
1124 ___
1125 \f
1126 $code.=<<___;
1127 .globl  gcm_ghash_avx
1128 .type   gcm_ghash_avx,\@abi-omnipotent
1129 .align  32
1130 gcm_ghash_avx:
1131 ___
1132 if ($avx) {
1133 my ($Xip,$Htbl,$inp,$len)=@_4args;
1134 my ($Xlo,$Xhi,$Xmi,
1135     $Zlo,$Zhi,$Zmi,
1136     $Hkey,$HK,$T1,$T2,
1137     $Xi,$Xo,$Tred,$bswap,$Ii,$Ij) = map("%xmm$_",(0..15));
1138
1139 $code.=<<___ if ($win64);
1140         lea     -0x88(%rsp),%rax
1141 .LSEH_begin_gcm_ghash_avx:
1142         # I can't trust assembler to use specific encoding:-(
1143         .byte   0x48,0x8d,0x60,0xe0             #lea    -0x20(%rax),%rsp
1144         .byte   0x0f,0x29,0x70,0xe0             #movaps %xmm6,-0x20(%rax)
1145         .byte   0x0f,0x29,0x78,0xf0             #movaps %xmm7,-0x10(%rax)
1146         .byte   0x44,0x0f,0x29,0x00             #movaps %xmm8,0(%rax)
1147         .byte   0x44,0x0f,0x29,0x48,0x10        #movaps %xmm9,0x10(%rax)
1148         .byte   0x44,0x0f,0x29,0x50,0x20        #movaps %xmm10,0x20(%rax)
1149         .byte   0x44,0x0f,0x29,0x58,0x30        #movaps %xmm11,0x30(%rax)
1150         .byte   0x44,0x0f,0x29,0x60,0x40        #movaps %xmm12,0x40(%rax)
1151         .byte   0x44,0x0f,0x29,0x68,0x50        #movaps %xmm13,0x50(%rax)
1152         .byte   0x44,0x0f,0x29,0x70,0x60        #movaps %xmm14,0x60(%rax)
1153         .byte   0x44,0x0f,0x29,0x78,0x70        #movaps %xmm15,0x70(%rax)
1154 ___
1155 $code.=<<___;
1156         vzeroupper
1157
1158         vmovdqu         ($Xip),$Xi              # load $Xi
1159         lea             .L0x1c2_polynomial(%rip),%r10
1160         lea             0x40($Htbl),$Htbl       # size optimization
1161         vmovdqu         .Lbswap_mask(%rip),$bswap
1162         vpshufb         $bswap,$Xi,$Xi
1163         cmp             \$0x80,$len
1164         jb              .Lshort_avx
1165         sub             \$0x80,$len
1166
1167         vmovdqu         0x70($inp),$Ii          # I[7]
1168         vmovdqu         0x00-0x40($Htbl),$Hkey  # $Hkey^1
1169         vpshufb         $bswap,$Ii,$Ii
1170         vmovdqu         0x20-0x40($Htbl),$HK
1171
1172         vpunpckhqdq     $Ii,$Ii,$T2
1173          vmovdqu        0x60($inp),$Ij          # I[6]
1174         vpclmulqdq      \$0x00,$Hkey,$Ii,$Xlo
1175         vpxor           $Ii,$T2,$T2
1176          vpshufb        $bswap,$Ij,$Ij
1177         vpclmulqdq      \$0x11,$Hkey,$Ii,$Xhi
1178          vmovdqu        0x10-0x40($Htbl),$Hkey  # $Hkey^2
1179          vpunpckhqdq    $Ij,$Ij,$T1
1180          vmovdqu        0x50($inp),$Ii          # I[5]
1181         vpclmulqdq      \$0x00,$HK,$T2,$Xmi
1182          vpxor          $Ij,$T1,$T1
1183
1184          vpshufb        $bswap,$Ii,$Ii
1185         vpclmulqdq      \$0x00,$Hkey,$Ij,$Zlo
1186          vpunpckhqdq    $Ii,$Ii,$T2
1187         vpclmulqdq      \$0x11,$Hkey,$Ij,$Zhi
1188          vmovdqu        0x30-0x40($Htbl),$Hkey  # $Hkey^3
1189          vpxor          $Ii,$T2,$T2
1190          vmovdqu        0x40($inp),$Ij          # I[4]
1191         vpclmulqdq      \$0x10,$HK,$T1,$Zmi
1192          vmovdqu        0x50-0x40($Htbl),$HK
1193
1194          vpshufb        $bswap,$Ij,$Ij
1195         vpxor           $Xlo,$Zlo,$Zlo
1196         vpclmulqdq      \$0x00,$Hkey,$Ii,$Xlo
1197         vpxor           $Xhi,$Zhi,$Zhi
1198          vpunpckhqdq    $Ij,$Ij,$T1
1199         vpclmulqdq      \$0x11,$Hkey,$Ii,$Xhi
1200          vmovdqu        0x40-0x40($Htbl),$Hkey  # $Hkey^4
1201         vpxor           $Xmi,$Zmi,$Zmi
1202         vpclmulqdq      \$0x00,$HK,$T2,$Xmi
1203          vpxor          $Ij,$T1,$T1
1204
1205          vmovdqu        0x30($inp),$Ii          # I[3]
1206         vpxor           $Zlo,$Xlo,$Xlo
1207         vpclmulqdq      \$0x00,$Hkey,$Ij,$Zlo
1208         vpxor           $Zhi,$Xhi,$Xhi
1209          vpshufb        $bswap,$Ii,$Ii
1210         vpclmulqdq      \$0x11,$Hkey,$Ij,$Zhi
1211          vmovdqu        0x60-0x40($Htbl),$Hkey  # $Hkey^5
1212         vpxor           $Zmi,$Xmi,$Xmi
1213          vpunpckhqdq    $Ii,$Ii,$T2
1214         vpclmulqdq      \$0x10,$HK,$T1,$Zmi
1215          vmovdqu        0x80-0x40($Htbl),$HK
1216          vpxor          $Ii,$T2,$T2
1217
1218          vmovdqu        0x20($inp),$Ij          # I[2]
1219         vpxor           $Xlo,$Zlo,$Zlo
1220         vpclmulqdq      \$0x00,$Hkey,$Ii,$Xlo
1221         vpxor           $Xhi,$Zhi,$Zhi
1222          vpshufb        $bswap,$Ij,$Ij
1223         vpclmulqdq      \$0x11,$Hkey,$Ii,$Xhi
1224          vmovdqu        0x70-0x40($Htbl),$Hkey  # $Hkey^6
1225         vpxor           $Xmi,$Zmi,$Zmi
1226          vpunpckhqdq    $Ij,$Ij,$T1
1227         vpclmulqdq      \$0x00,$HK,$T2,$Xmi
1228          vpxor          $Ij,$T1,$T1
1229
1230          vmovdqu        0x10($inp),$Ii          # I[1]
1231         vpxor           $Zlo,$Xlo,$Xlo
1232         vpclmulqdq      \$0x00,$Hkey,$Ij,$Zlo
1233         vpxor           $Zhi,$Xhi,$Xhi
1234          vpshufb        $bswap,$Ii,$Ii
1235         vpclmulqdq      \$0x11,$Hkey,$Ij,$Zhi
1236          vmovdqu        0x90-0x40($Htbl),$Hkey  # $Hkey^7
1237         vpxor           $Zmi,$Xmi,$Xmi
1238          vpunpckhqdq    $Ii,$Ii,$T2
1239         vpclmulqdq      \$0x10,$HK,$T1,$Zmi
1240          vmovdqu        0xb0-0x40($Htbl),$HK
1241          vpxor          $Ii,$T2,$T2
1242
1243          vmovdqu        ($inp),$Ij              # I[0]
1244         vpxor           $Xlo,$Zlo,$Zlo
1245         vpclmulqdq      \$0x00,$Hkey,$Ii,$Xlo
1246         vpxor           $Xhi,$Zhi,$Zhi
1247          vpshufb        $bswap,$Ij,$Ij
1248         vpclmulqdq      \$0x11,$Hkey,$Ii,$Xhi
1249          vmovdqu        0xa0-0x40($Htbl),$Hkey  # $Hkey^8
1250         vpxor           $Xmi,$Zmi,$Zmi
1251         vpclmulqdq      \$0x10,$HK,$T2,$Xmi
1252
1253         lea             0x80($inp),$inp
1254         cmp             \$0x80,$len
1255         jb              .Ltail_avx
1256
1257         vpxor           $Xi,$Ij,$Ij             # accumulate $Xi
1258         sub             \$0x80,$len
1259         jmp             .Loop8x_avx
1260
1261 .align  32
1262 .Loop8x_avx:
1263         vpunpckhqdq     $Ij,$Ij,$T1
1264          vmovdqu        0x70($inp),$Ii          # I[7]
1265         vpxor           $Xlo,$Zlo,$Zlo
1266         vpxor           $Ij,$T1,$T1
1267         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xi
1268          vpshufb        $bswap,$Ii,$Ii
1269         vpxor           $Xhi,$Zhi,$Zhi
1270         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xo
1271          vmovdqu        0x00-0x40($Htbl),$Hkey  # $Hkey^1
1272          vpunpckhqdq    $Ii,$Ii,$T2
1273         vpxor           $Xmi,$Zmi,$Zmi
1274         vpclmulqdq      \$0x00,$HK,$T1,$Tred
1275          vmovdqu        0x20-0x40($Htbl),$HK
1276          vpxor          $Ii,$T2,$T2
1277
1278           vmovdqu       0x60($inp),$Ij          # I[6]
1279          vpclmulqdq     \$0x00,$Hkey,$Ii,$Xlo
1280         vpxor           $Zlo,$Xi,$Xi            # collect result
1281           vpshufb       $bswap,$Ij,$Ij
1282          vpclmulqdq     \$0x11,$Hkey,$Ii,$Xhi
1283         vxorps          $Zhi,$Xo,$Xo
1284           vmovdqu       0x10-0x40($Htbl),$Hkey  # $Hkey^2
1285          vpunpckhqdq    $Ij,$Ij,$T1
1286          vpclmulqdq     \$0x00,$HK,  $T2,$Xmi
1287         vpxor           $Zmi,$Tred,$Tred
1288          vxorps         $Ij,$T1,$T1
1289
1290           vmovdqu       0x50($inp),$Ii          # I[5]
1291         vpxor           $Xi,$Tred,$Tred         # aggregated Karatsuba post-processing
1292          vpclmulqdq     \$0x00,$Hkey,$Ij,$Zlo
1293         vpxor           $Xo,$Tred,$Tred
1294         vpslldq         \$8,$Tred,$T2
1295          vpxor          $Xlo,$Zlo,$Zlo
1296          vpclmulqdq     \$0x11,$Hkey,$Ij,$Zhi
1297         vpsrldq         \$8,$Tred,$Tred
1298         vpxor           $T2, $Xi, $Xi
1299           vmovdqu       0x30-0x40($Htbl),$Hkey  # $Hkey^3
1300           vpshufb       $bswap,$Ii,$Ii
1301         vxorps          $Tred,$Xo, $Xo
1302          vpxor          $Xhi,$Zhi,$Zhi
1303          vpunpckhqdq    $Ii,$Ii,$T2
1304          vpclmulqdq     \$0x10,$HK,  $T1,$Zmi
1305           vmovdqu       0x50-0x40($Htbl),$HK
1306          vpxor          $Ii,$T2,$T2
1307          vpxor          $Xmi,$Zmi,$Zmi
1308
1309           vmovdqu       0x40($inp),$Ij          # I[4]
1310         vpalignr        \$8,$Xi,$Xi,$Tred       # 1st phase
1311          vpclmulqdq     \$0x00,$Hkey,$Ii,$Xlo
1312           vpshufb       $bswap,$Ij,$Ij
1313          vpxor          $Zlo,$Xlo,$Xlo
1314          vpclmulqdq     \$0x11,$Hkey,$Ii,$Xhi
1315           vmovdqu       0x40-0x40($Htbl),$Hkey  # $Hkey^4
1316          vpunpckhqdq    $Ij,$Ij,$T1
1317          vpxor          $Zhi,$Xhi,$Xhi
1318          vpclmulqdq     \$0x00,$HK,  $T2,$Xmi
1319          vxorps         $Ij,$T1,$T1
1320          vpxor          $Zmi,$Xmi,$Xmi
1321
1322           vmovdqu       0x30($inp),$Ii          # I[3]
1323         vpclmulqdq      \$0x10,(%r10),$Xi,$Xi
1324          vpclmulqdq     \$0x00,$Hkey,$Ij,$Zlo
1325           vpshufb       $bswap,$Ii,$Ii
1326          vpxor          $Xlo,$Zlo,$Zlo
1327          vpclmulqdq     \$0x11,$Hkey,$Ij,$Zhi
1328           vmovdqu       0x60-0x40($Htbl),$Hkey  # $Hkey^5
1329          vpunpckhqdq    $Ii,$Ii,$T2
1330          vpxor          $Xhi,$Zhi,$Zhi
1331          vpclmulqdq     \$0x10,$HK,  $T1,$Zmi
1332           vmovdqu       0x80-0x40($Htbl),$HK
1333          vpxor          $Ii,$T2,$T2
1334          vpxor          $Xmi,$Zmi,$Zmi
1335
1336           vmovdqu       0x20($inp),$Ij          # I[2]
1337          vpclmulqdq     \$0x00,$Hkey,$Ii,$Xlo
1338           vpshufb       $bswap,$Ij,$Ij
1339          vpxor          $Zlo,$Xlo,$Xlo
1340          vpclmulqdq     \$0x11,$Hkey,$Ii,$Xhi
1341           vmovdqu       0x70-0x40($Htbl),$Hkey  # $Hkey^6
1342          vpunpckhqdq    $Ij,$Ij,$T1
1343          vpxor          $Zhi,$Xhi,$Xhi
1344          vpclmulqdq     \$0x00,$HK,  $T2,$Xmi
1345          vpxor          $Ij,$T1,$T1
1346          vpxor          $Zmi,$Xmi,$Xmi
1347         vxorps          $Tred,$Xi,$Xi
1348
1349           vmovdqu       0x10($inp),$Ii          # I[1]
1350         vpalignr        \$8,$Xi,$Xi,$Tred       # 2nd phase
1351          vpclmulqdq     \$0x00,$Hkey,$Ij,$Zlo
1352           vpshufb       $bswap,$Ii,$Ii
1353          vpxor          $Xlo,$Zlo,$Zlo
1354          vpclmulqdq     \$0x11,$Hkey,$Ij,$Zhi
1355           vmovdqu       0x90-0x40($Htbl),$Hkey  # $Hkey^7
1356         vpclmulqdq      \$0x10,(%r10),$Xi,$Xi
1357         vxorps          $Xo,$Tred,$Tred
1358          vpunpckhqdq    $Ii,$Ii,$T2
1359          vpxor          $Xhi,$Zhi,$Zhi
1360          vpclmulqdq     \$0x10,$HK,  $T1,$Zmi
1361           vmovdqu       0xb0-0x40($Htbl),$HK
1362          vpxor          $Ii,$T2,$T2
1363          vpxor          $Xmi,$Zmi,$Zmi
1364
1365           vmovdqu       ($inp),$Ij              # I[0]
1366          vpclmulqdq     \$0x00,$Hkey,$Ii,$Xlo
1367           vpshufb       $bswap,$Ij,$Ij
1368          vpclmulqdq     \$0x11,$Hkey,$Ii,$Xhi
1369           vmovdqu       0xa0-0x40($Htbl),$Hkey  # $Hkey^8
1370         vpxor           $Tred,$Ij,$Ij
1371          vpclmulqdq     \$0x10,$HK,  $T2,$Xmi
1372         vpxor           $Xi,$Ij,$Ij             # accumulate $Xi
1373
1374         lea             0x80($inp),$inp
1375         sub             \$0x80,$len
1376         jnc             .Loop8x_avx
1377
1378         add             \$0x80,$len
1379         jmp             .Ltail_no_xor_avx
1380
1381 .align  32
1382 .Lshort_avx:
1383         vmovdqu         -0x10($inp,$len),$Ii    # very last word
1384         lea             ($inp,$len),$inp
1385         vmovdqu         0x00-0x40($Htbl),$Hkey  # $Hkey^1
1386         vmovdqu         0x20-0x40($Htbl),$HK
1387         vpshufb         $bswap,$Ii,$Ij
1388
1389         vmovdqa         $Xlo,$Zlo               # subtle way to zero $Zlo,
1390         vmovdqa         $Xhi,$Zhi               # $Zhi and
1391         vmovdqa         $Xmi,$Zmi               # $Zmi
1392         sub             \$0x10,$len
1393         jz              .Ltail_avx
1394
1395         vpunpckhqdq     $Ij,$Ij,$T1
1396         vpxor           $Xlo,$Zlo,$Zlo
1397         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1398         vpxor           $Ij,$T1,$T1
1399          vmovdqu        -0x20($inp),$Ii
1400         vpxor           $Xhi,$Zhi,$Zhi
1401         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1402         vmovdqu         0x10-0x40($Htbl),$Hkey  # $Hkey^2
1403          vpshufb        $bswap,$Ii,$Ij
1404         vpxor           $Xmi,$Zmi,$Zmi
1405         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1406         vpsrldq         \$8,$HK,$HK
1407         sub             \$0x10,$len
1408         jz              .Ltail_avx
1409
1410         vpunpckhqdq     $Ij,$Ij,$T1
1411         vpxor           $Xlo,$Zlo,$Zlo
1412         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1413         vpxor           $Ij,$T1,$T1
1414          vmovdqu        -0x30($inp),$Ii
1415         vpxor           $Xhi,$Zhi,$Zhi
1416         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1417         vmovdqu         0x30-0x40($Htbl),$Hkey  # $Hkey^3
1418          vpshufb        $bswap,$Ii,$Ij
1419         vpxor           $Xmi,$Zmi,$Zmi
1420         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1421         vmovdqu         0x50-0x40($Htbl),$HK
1422         sub             \$0x10,$len
1423         jz              .Ltail_avx
1424
1425         vpunpckhqdq     $Ij,$Ij,$T1
1426         vpxor           $Xlo,$Zlo,$Zlo
1427         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1428         vpxor           $Ij,$T1,$T1
1429          vmovdqu        -0x40($inp),$Ii
1430         vpxor           $Xhi,$Zhi,$Zhi
1431         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1432         vmovdqu         0x40-0x40($Htbl),$Hkey  # $Hkey^4
1433          vpshufb        $bswap,$Ii,$Ij
1434         vpxor           $Xmi,$Zmi,$Zmi
1435         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1436         vpsrldq         \$8,$HK,$HK
1437         sub             \$0x10,$len
1438         jz              .Ltail_avx
1439
1440         vpunpckhqdq     $Ij,$Ij,$T1
1441         vpxor           $Xlo,$Zlo,$Zlo
1442         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1443         vpxor           $Ij,$T1,$T1
1444          vmovdqu        -0x50($inp),$Ii
1445         vpxor           $Xhi,$Zhi,$Zhi
1446         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1447         vmovdqu         0x60-0x40($Htbl),$Hkey  # $Hkey^5
1448          vpshufb        $bswap,$Ii,$Ij
1449         vpxor           $Xmi,$Zmi,$Zmi
1450         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1451         vmovdqu         0x80-0x40($Htbl),$HK
1452         sub             \$0x10,$len
1453         jz              .Ltail_avx
1454
1455         vpunpckhqdq     $Ij,$Ij,$T1
1456         vpxor           $Xlo,$Zlo,$Zlo
1457         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1458         vpxor           $Ij,$T1,$T1
1459          vmovdqu        -0x60($inp),$Ii
1460         vpxor           $Xhi,$Zhi,$Zhi
1461         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1462         vmovdqu         0x70-0x40($Htbl),$Hkey  # $Hkey^6
1463          vpshufb        $bswap,$Ii,$Ij
1464         vpxor           $Xmi,$Zmi,$Zmi
1465         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1466         vpsrldq         \$8,$HK,$HK
1467         sub             \$0x10,$len
1468         jz              .Ltail_avx
1469
1470         vpunpckhqdq     $Ij,$Ij,$T1
1471         vpxor           $Xlo,$Zlo,$Zlo
1472         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1473         vpxor           $Ij,$T1,$T1
1474          vmovdqu        -0x70($inp),$Ii
1475         vpxor           $Xhi,$Zhi,$Zhi
1476         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1477         vmovdqu         0x90-0x40($Htbl),$Hkey  # $Hkey^7
1478          vpshufb        $bswap,$Ii,$Ij
1479         vpxor           $Xmi,$Zmi,$Zmi
1480         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1481         vmovq           0xb8-0x40($Htbl),$HK
1482         sub             \$0x10,$len
1483         jmp             .Ltail_avx
1484
1485 .align  32
1486 .Ltail_avx:
1487         vpxor           $Xi,$Ij,$Ij             # accumulate $Xi
1488 .Ltail_no_xor_avx:
1489         vpunpckhqdq     $Ij,$Ij,$T1
1490         vpxor           $Xlo,$Zlo,$Zlo
1491         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1492         vpxor           $Ij,$T1,$T1
1493         vpxor           $Xhi,$Zhi,$Zhi
1494         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1495         vpxor           $Xmi,$Zmi,$Zmi
1496         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1497
1498         vmovdqu         (%r10),$Tred
1499
1500         vpxor           $Xlo,$Zlo,$Xi
1501         vpxor           $Xhi,$Zhi,$Xo
1502         vpxor           $Xmi,$Zmi,$Zmi
1503
1504         vpxor           $Xi, $Zmi,$Zmi          # aggregated Karatsuba post-processing
1505         vpxor           $Xo, $Zmi,$Zmi
1506         vpslldq         \$8, $Zmi,$T2
1507         vpsrldq         \$8, $Zmi,$Zmi
1508         vpxor           $T2, $Xi, $Xi
1509         vpxor           $Zmi,$Xo, $Xo
1510
1511         vpclmulqdq      \$0x10,$Tred,$Xi,$T2    # 1st phase
1512         vpalignr        \$8,$Xi,$Xi,$Xi
1513         vpxor           $T2,$Xi,$Xi
1514
1515         vpclmulqdq      \$0x10,$Tred,$Xi,$T2    # 2nd phase
1516         vpalignr        \$8,$Xi,$Xi,$Xi
1517         vpxor           $Xo,$Xi,$Xi
1518         vpxor           $T2,$Xi,$Xi
1519
1520         cmp             \$0,$len
1521         jne             .Lshort_avx
1522
1523         vpshufb         $bswap,$Xi,$Xi
1524         vmovdqu         $Xi,($Xip)
1525         vzeroupper
1526 ___
1527 $code.=<<___ if ($win64);
1528         movaps  (%rsp),%xmm6
1529         movaps  0x10(%rsp),%xmm7
1530         movaps  0x20(%rsp),%xmm8
1531         movaps  0x30(%rsp),%xmm9
1532         movaps  0x40(%rsp),%xmm10
1533         movaps  0x50(%rsp),%xmm11
1534         movaps  0x60(%rsp),%xmm12
1535         movaps  0x70(%rsp),%xmm13
1536         movaps  0x80(%rsp),%xmm14
1537         movaps  0x90(%rsp),%xmm15
1538         lea     0xa8(%rsp),%rsp
1539 .LSEH_end_gcm_ghash_avx:
1540 ___
1541 $code.=<<___;
1542         ret
1543 .size   gcm_ghash_avx,.-gcm_ghash_avx
1544 ___
1545 } else {
1546 $code.=<<___;
1547         jmp     .L_ghash_clmul
1548 .size   gcm_ghash_avx,.-gcm_ghash_avx
1549 ___
1550 }
1551 \f
1552 $code.=<<___;
1553 .align  64
1554 .Lbswap_mask:
1555         .byte   15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0
1556 .L0x1c2_polynomial:
1557         .byte   1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0xc2
1558 .L7_mask:
1559         .long   7,0,7,0
1560 .L7_mask_poly:
1561         .long   7,0,`0xE1<<1`,0
1562 .align  64
1563 .type   .Lrem_4bit,\@object
1564 .Lrem_4bit:
1565         .long   0,`0x0000<<16`,0,`0x1C20<<16`,0,`0x3840<<16`,0,`0x2460<<16`
1566         .long   0,`0x7080<<16`,0,`0x6CA0<<16`,0,`0x48C0<<16`,0,`0x54E0<<16`
1567         .long   0,`0xE100<<16`,0,`0xFD20<<16`,0,`0xD940<<16`,0,`0xC560<<16`
1568         .long   0,`0x9180<<16`,0,`0x8DA0<<16`,0,`0xA9C0<<16`,0,`0xB5E0<<16`
1569 .type   .Lrem_8bit,\@object
1570 .Lrem_8bit:
1571         .value  0x0000,0x01C2,0x0384,0x0246,0x0708,0x06CA,0x048C,0x054E
1572         .value  0x0E10,0x0FD2,0x0D94,0x0C56,0x0918,0x08DA,0x0A9C,0x0B5E
1573         .value  0x1C20,0x1DE2,0x1FA4,0x1E66,0x1B28,0x1AEA,0x18AC,0x196E
1574         .value  0x1230,0x13F2,0x11B4,0x1076,0x1538,0x14FA,0x16BC,0x177E
1575         .value  0x3840,0x3982,0x3BC4,0x3A06,0x3F48,0x3E8A,0x3CCC,0x3D0E
1576         .value  0x3650,0x3792,0x35D4,0x3416,0x3158,0x309A,0x32DC,0x331E
1577         .value  0x2460,0x25A2,0x27E4,0x2626,0x2368,0x22AA,0x20EC,0x212E
1578         .value  0x2A70,0x2BB2,0x29F4,0x2836,0x2D78,0x2CBA,0x2EFC,0x2F3E
1579         .value  0x7080,0x7142,0x7304,0x72C6,0x7788,0x764A,0x740C,0x75CE
1580         .value  0x7E90,0x7F52,0x7D14,0x7CD6,0x7998,0x785A,0x7A1C,0x7BDE
1581         .value  0x6CA0,0x6D62,0x6F24,0x6EE6,0x6BA8,0x6A6A,0x682C,0x69EE
1582         .value  0x62B0,0x6372,0x6134,0x60F6,0x65B8,0x647A,0x663C,0x67FE
1583         .value  0x48C0,0x4902,0x4B44,0x4A86,0x4FC8,0x4E0A,0x4C4C,0x4D8E
1584         .value  0x46D0,0x4712,0x4554,0x4496,0x41D8,0x401A,0x425C,0x439E
1585         .value  0x54E0,0x5522,0x5764,0x56A6,0x53E8,0x522A,0x506C,0x51AE
1586         .value  0x5AF0,0x5B32,0x5974,0x58B6,0x5DF8,0x5C3A,0x5E7C,0x5FBE
1587         .value  0xE100,0xE0C2,0xE284,0xE346,0xE608,0xE7CA,0xE58C,0xE44E
1588         .value  0xEF10,0xEED2,0xEC94,0xED56,0xE818,0xE9DA,0xEB9C,0xEA5E
1589         .value  0xFD20,0xFCE2,0xFEA4,0xFF66,0xFA28,0xFBEA,0xF9AC,0xF86E
1590         .value  0xF330,0xF2F2,0xF0B4,0xF176,0xF438,0xF5FA,0xF7BC,0xF67E
1591         .value  0xD940,0xD882,0xDAC4,0xDB06,0xDE48,0xDF8A,0xDDCC,0xDC0E
1592         .value  0xD750,0xD692,0xD4D4,0xD516,0xD058,0xD19A,0xD3DC,0xD21E
1593         .value  0xC560,0xC4A2,0xC6E4,0xC726,0xC268,0xC3AA,0xC1EC,0xC02E
1594         .value  0xCB70,0xCAB2,0xC8F4,0xC936,0xCC78,0xCDBA,0xCFFC,0xCE3E
1595         .value  0x9180,0x9042,0x9204,0x93C6,0x9688,0x974A,0x950C,0x94CE
1596         .value  0x9F90,0x9E52,0x9C14,0x9DD6,0x9898,0x995A,0x9B1C,0x9ADE
1597         .value  0x8DA0,0x8C62,0x8E24,0x8FE6,0x8AA8,0x8B6A,0x892C,0x88EE
1598         .value  0x83B0,0x8272,0x8034,0x81F6,0x84B8,0x857A,0x873C,0x86FE
1599         .value  0xA9C0,0xA802,0xAA44,0xAB86,0xAEC8,0xAF0A,0xAD4C,0xAC8E
1600         .value  0xA7D0,0xA612,0xA454,0xA596,0xA0D8,0xA11A,0xA35C,0xA29E
1601         .value  0xB5E0,0xB422,0xB664,0xB7A6,0xB2E8,0xB32A,0xB16C,0xB0AE
1602         .value  0xBBF0,0xBA32,0xB874,0xB9B6,0xBCF8,0xBD3A,0xBF7C,0xBEBE
1603
1604 .asciz  "GHASH for x86_64, CRYPTOGAMS by <appro\@openssl.org>"
1605 .align  64
1606 ___
1607 \f
1608 # EXCEPTION_DISPOSITION handler (EXCEPTION_RECORD *rec,ULONG64 frame,
1609 #               CONTEXT *context,DISPATCHER_CONTEXT *disp)
1610 if ($win64) {
1611 $rec="%rcx";
1612 $frame="%rdx";
1613 $context="%r8";
1614 $disp="%r9";
1615
1616 $code.=<<___;
1617 .extern __imp_RtlVirtualUnwind
1618 .type   se_handler,\@abi-omnipotent
1619 .align  16
1620 se_handler:
1621         push    %rsi
1622         push    %rdi
1623         push    %rbx
1624         push    %rbp
1625         push    %r12
1626         push    %r13
1627         push    %r14
1628         push    %r15
1629         pushfq
1630         sub     \$64,%rsp
1631
1632         mov     120($context),%rax      # pull context->Rax
1633         mov     248($context),%rbx      # pull context->Rip
1634
1635         mov     8($disp),%rsi           # disp->ImageBase
1636         mov     56($disp),%r11          # disp->HandlerData
1637
1638         mov     0(%r11),%r10d           # HandlerData[0]
1639         lea     (%rsi,%r10),%r10        # prologue label
1640         cmp     %r10,%rbx               # context->Rip<prologue label
1641         jb      .Lin_prologue
1642
1643         mov     152($context),%rax      # pull context->Rsp
1644
1645         mov     4(%r11),%r10d           # HandlerData[1]
1646         lea     (%rsi,%r10),%r10        # epilogue label
1647         cmp     %r10,%rbx               # context->Rip>=epilogue label
1648         jae     .Lin_prologue
1649
1650         lea     24(%rax),%rax           # adjust "rsp"
1651
1652         mov     -8(%rax),%rbx
1653         mov     -16(%rax),%rbp
1654         mov     -24(%rax),%r12
1655         mov     %rbx,144($context)      # restore context->Rbx
1656         mov     %rbp,160($context)      # restore context->Rbp
1657         mov     %r12,216($context)      # restore context->R12
1658
1659 .Lin_prologue:
1660         mov     8(%rax),%rdi
1661         mov     16(%rax),%rsi
1662         mov     %rax,152($context)      # restore context->Rsp
1663         mov     %rsi,168($context)      # restore context->Rsi
1664         mov     %rdi,176($context)      # restore context->Rdi
1665
1666         mov     40($disp),%rdi          # disp->ContextRecord
1667         mov     $context,%rsi           # context
1668         mov     \$`1232/8`,%ecx         # sizeof(CONTEXT)
1669         .long   0xa548f3fc              # cld; rep movsq
1670
1671         mov     $disp,%rsi
1672         xor     %rcx,%rcx               # arg1, UNW_FLAG_NHANDLER
1673         mov     8(%rsi),%rdx            # arg2, disp->ImageBase
1674         mov     0(%rsi),%r8             # arg3, disp->ControlPc
1675         mov     16(%rsi),%r9            # arg4, disp->FunctionEntry
1676         mov     40(%rsi),%r10           # disp->ContextRecord
1677         lea     56(%rsi),%r11           # &disp->HandlerData
1678         lea     24(%rsi),%r12           # &disp->EstablisherFrame
1679         mov     %r10,32(%rsp)           # arg5
1680         mov     %r11,40(%rsp)           # arg6
1681         mov     %r12,48(%rsp)           # arg7
1682         mov     %rcx,56(%rsp)           # arg8, (NULL)
1683         call    *__imp_RtlVirtualUnwind(%rip)
1684
1685         mov     \$1,%eax                # ExceptionContinueSearch
1686         add     \$64,%rsp
1687         popfq
1688         pop     %r15
1689         pop     %r14
1690         pop     %r13
1691         pop     %r12
1692         pop     %rbp
1693         pop     %rbx
1694         pop     %rdi
1695         pop     %rsi
1696         ret
1697 .size   se_handler,.-se_handler
1698
1699 .section        .pdata
1700 .align  4
1701         .rva    .LSEH_begin_gcm_gmult_4bit
1702         .rva    .LSEH_end_gcm_gmult_4bit
1703         .rva    .LSEH_info_gcm_gmult_4bit
1704
1705         .rva    .LSEH_begin_gcm_ghash_4bit
1706         .rva    .LSEH_end_gcm_ghash_4bit
1707         .rva    .LSEH_info_gcm_ghash_4bit
1708
1709         .rva    .LSEH_begin_gcm_init_clmul
1710         .rva    .LSEH_end_gcm_init_clmul
1711         .rva    .LSEH_info_gcm_init_clmul
1712
1713         .rva    .LSEH_begin_gcm_ghash_clmul
1714         .rva    .LSEH_end_gcm_ghash_clmul
1715         .rva    .LSEH_info_gcm_ghash_clmul
1716 ___
1717 $code.=<<___    if ($avx);
1718         .rva    .LSEH_begin_gcm_init_avx
1719         .rva    .LSEH_end_gcm_init_avx
1720         .rva    .LSEH_info_gcm_init_clmul
1721
1722         .rva    .LSEH_begin_gcm_ghash_avx
1723         .rva    .LSEH_end_gcm_ghash_avx
1724         .rva    .LSEH_info_gcm_ghash_clmul
1725 ___
1726 $code.=<<___;
1727 .section        .xdata
1728 .align  8
1729 .LSEH_info_gcm_gmult_4bit:
1730         .byte   9,0,0,0
1731         .rva    se_handler
1732         .rva    .Lgmult_prologue,.Lgmult_epilogue       # HandlerData
1733 .LSEH_info_gcm_ghash_4bit:
1734         .byte   9,0,0,0
1735         .rva    se_handler
1736         .rva    .Lghash_prologue,.Lghash_epilogue       # HandlerData
1737 .LSEH_info_gcm_init_clmul:
1738         .byte   0x01,0x08,0x03,0x00
1739         .byte   0x08,0x68,0x00,0x00     #movaps 0x00(rsp),xmm6
1740         .byte   0x04,0x22,0x00,0x00     #sub    rsp,0x18
1741 .LSEH_info_gcm_ghash_clmul:
1742         .byte   0x01,0x33,0x16,0x00
1743         .byte   0x33,0xf8,0x09,0x00     #movaps 0x90(rsp),xmm15
1744         .byte   0x2e,0xe8,0x08,0x00     #movaps 0x80(rsp),xmm14
1745         .byte   0x29,0xd8,0x07,0x00     #movaps 0x70(rsp),xmm13
1746         .byte   0x24,0xc8,0x06,0x00     #movaps 0x60(rsp),xmm12
1747         .byte   0x1f,0xb8,0x05,0x00     #movaps 0x50(rsp),xmm11
1748         .byte   0x1a,0xa8,0x04,0x00     #movaps 0x40(rsp),xmm10
1749         .byte   0x15,0x98,0x03,0x00     #movaps 0x30(rsp),xmm9
1750         .byte   0x10,0x88,0x02,0x00     #movaps 0x20(rsp),xmm8
1751         .byte   0x0c,0x78,0x01,0x00     #movaps 0x10(rsp),xmm7
1752         .byte   0x08,0x68,0x00,0x00     #movaps 0x00(rsp),xmm6
1753         .byte   0x04,0x01,0x15,0x00     #sub    rsp,0xa8
1754 ___
1755 }
1756 \f
1757 $code =~ s/\`([^\`]*)\`/eval($1)/gem;
1758
1759 print $code;
1760
1761 close STDOUT;