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[openssl.git] / crypto / modes / asm / ghash-x86_64.pl
1 #! /usr/bin/env perl
2 # Copyright 2010-2019 The OpenSSL Project Authors. All Rights Reserved.
3 #
4 # Licensed under the OpenSSL license (the "License").  You may not use
5 # this file except in compliance with the License.  You can obtain a copy
6 # in the file LICENSE in the source distribution or at
7 # https://www.openssl.org/source/license.html
8
9 #
10 # ====================================================================
11 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
12 # project. The module is, however, dual licensed under OpenSSL and
13 # CRYPTOGAMS licenses depending on where you obtain it. For further
14 # details see http://www.openssl.org/~appro/cryptogams/.
15 # ====================================================================
16 #
17 # March, June 2010
18 #
19 # The module implements "4-bit" GCM GHASH function and underlying
20 # single multiplication operation in GF(2^128). "4-bit" means that
21 # it uses 256 bytes per-key table [+128 bytes shared table]. GHASH
22 # function features so called "528B" variant utilizing additional
23 # 256+16 bytes of per-key storage [+512 bytes shared table].
24 # Performance results are for this streamed GHASH subroutine and are
25 # expressed in cycles per processed byte, less is better:
26 #
27 #               gcc 3.4.x(*)    assembler
28 #
29 # P4            28.6            14.0            +100%
30 # Opteron       19.3            7.7             +150%
31 # Core2         17.8            8.1(**)         +120%
32 # Atom          31.6            16.8            +88%
33 # VIA Nano      21.8            10.1            +115%
34 #
35 # (*)   comparison is not completely fair, because C results are
36 #       for vanilla "256B" implementation, while assembler results
37 #       are for "528B";-)
38 # (**)  it's mystery [to me] why Core2 result is not same as for
39 #       Opteron;
40
41 # May 2010
42 #
43 # Add PCLMULQDQ version performing at 2.02 cycles per processed byte.
44 # See ghash-x86.pl for background information and details about coding
45 # techniques.
46 #
47 # Special thanks to David Woodhouse for providing access to a
48 # Westmere-based system on behalf of Intel Open Source Technology Centre.
49
50 # December 2012
51 #
52 # Overhaul: aggregate Karatsuba post-processing, improve ILP in
53 # reduction_alg9, increase reduction aggregate factor to 4x. As for
54 # the latter. ghash-x86.pl discusses that it makes lesser sense to
55 # increase aggregate factor. Then why increase here? Critical path
56 # consists of 3 independent pclmulqdq instructions, Karatsuba post-
57 # processing and reduction. "On top" of this we lay down aggregated
58 # multiplication operations, triplets of independent pclmulqdq's. As
59 # issue rate for pclmulqdq is limited, it makes lesser sense to
60 # aggregate more multiplications than it takes to perform remaining
61 # non-multiplication operations. 2x is near-optimal coefficient for
62 # contemporary Intel CPUs (therefore modest improvement coefficient),
63 # but not for Bulldozer. Latter is because logical SIMD operations
64 # are twice as slow in comparison to Intel, so that critical path is
65 # longer. A CPU with higher pclmulqdq issue rate would also benefit
66 # from higher aggregate factor...
67 #
68 # Westmere      1.78(+13%)
69 # Sandy Bridge  1.80(+8%)
70 # Ivy Bridge    1.80(+7%)
71 # Haswell       0.55(+93%) (if system doesn't support AVX)
72 # Broadwell     0.45(+110%)(if system doesn't support AVX)
73 # Skylake       0.44(+110%)(if system doesn't support AVX)
74 # Bulldozer     1.49(+27%)
75 # Silvermont    2.88(+13%)
76 # Knights L     2.12(-)    (if system doesn't support AVX)
77 # Goldmont      1.08(+24%)
78
79 # March 2013
80 #
81 # ... 8x aggregate factor AVX code path is using reduction algorithm
82 # suggested by Shay Gueron[1]. Even though contemporary AVX-capable
83 # CPUs such as Sandy and Ivy Bridge can execute it, the code performs
84 # sub-optimally in comparison to above mentioned version. But thanks
85 # to Ilya Albrekht and Max Locktyukhin of Intel Corp. we knew that
86 # it performs in 0.41 cycles per byte on Haswell processor, in
87 # 0.29 on Broadwell, and in 0.36 on Skylake.
88 #
89 # Knights Landing achieves 1.09 cpb.
90 #
91 # [1] http://rt.openssl.org/Ticket/Display.html?id=2900&user=guest&pass=guest
92
93 $flavour = shift;
94 $output  = shift;
95 if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
96
97 $win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
98
99 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
100 ( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
101 ( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
102 die "can't locate x86_64-xlate.pl";
103
104 if (`$ENV{CC} -Wa,-v -c -o /dev/null -x assembler /dev/null 2>&1`
105                 =~ /GNU assembler version ([2-9]\.[0-9]+)/) {
106         $avx = ($1>=2.20) + ($1>=2.22);
107 }
108
109 if (!$avx && $win64 && ($flavour =~ /nasm/ || $ENV{ASM} =~ /nasm/) &&
110             `nasm -v 2>&1` =~ /NASM version ([2-9]\.[0-9]+)/) {
111         $avx = ($1>=2.09) + ($1>=2.10);
112 }
113
114 if (!$avx && $win64 && ($flavour =~ /masm/ || $ENV{ASM} =~ /ml64/) &&
115             `ml64 2>&1` =~ /Version ([0-9]+)\./) {
116         $avx = ($1>=10) + ($1>=11);
117 }
118
119 if (!$avx && `$ENV{CC} -v 2>&1` =~ /((?:^clang|LLVM) version|.*based on LLVM) ([3-9]\.[0-9]+)/) {
120         $avx = ($2>=3.0) + ($2>3.0);
121 }
122
123 open OUT,"| \"$^X\" \"$xlate\" $flavour \"$output\"";
124 *STDOUT=*OUT;
125
126 $do4xaggr=1;
127
128 # common register layout
129 $nlo="%rax";
130 $nhi="%rbx";
131 $Zlo="%r8";
132 $Zhi="%r9";
133 $tmp="%r10";
134 $rem_4bit = "%r11";
135
136 $Xi="%rdi";
137 $Htbl="%rsi";
138
139 # per-function register layout
140 $cnt="%rcx";
141 $rem="%rdx";
142
143 sub LB() { my $r=shift; $r =~ s/%[er]([a-d])x/%\1l/     or
144                         $r =~ s/%[er]([sd]i)/%\1l/      or
145                         $r =~ s/%[er](bp)/%\1l/         or
146                         $r =~ s/%(r[0-9]+)[d]?/%\1b/;   $r; }
147
148 sub AUTOLOAD()          # thunk [simplified] 32-bit style perlasm
149 { my $opcode = $AUTOLOAD; $opcode =~ s/.*:://;
150   my $arg = pop;
151     $arg = "\$$arg" if ($arg*1 eq $arg);
152     $code .= "\t$opcode\t".join(',',$arg,reverse @_)."\n";
153 }
154 \f
155 { my $N;
156   sub loop() {
157   my $inp = shift;
158
159         $N++;
160 $code.=<<___;
161         xor     $nlo,$nlo
162         xor     $nhi,$nhi
163         mov     `&LB("$Zlo")`,`&LB("$nlo")`
164         mov     `&LB("$Zlo")`,`&LB("$nhi")`
165         shl     \$4,`&LB("$nlo")`
166         mov     \$14,$cnt
167         mov     8($Htbl,$nlo),$Zlo
168         mov     ($Htbl,$nlo),$Zhi
169         and     \$0xf0,`&LB("$nhi")`
170         mov     $Zlo,$rem
171         jmp     .Loop$N
172
173 .align  16
174 .Loop$N:
175         shr     \$4,$Zlo
176         and     \$0xf,$rem
177         mov     $Zhi,$tmp
178         mov     ($inp,$cnt),`&LB("$nlo")`
179         shr     \$4,$Zhi
180         xor     8($Htbl,$nhi),$Zlo
181         shl     \$60,$tmp
182         xor     ($Htbl,$nhi),$Zhi
183         mov     `&LB("$nlo")`,`&LB("$nhi")`
184         xor     ($rem_4bit,$rem,8),$Zhi
185         mov     $Zlo,$rem
186         shl     \$4,`&LB("$nlo")`
187         xor     $tmp,$Zlo
188         dec     $cnt
189         js      .Lbreak$N
190
191         shr     \$4,$Zlo
192         and     \$0xf,$rem
193         mov     $Zhi,$tmp
194         shr     \$4,$Zhi
195         xor     8($Htbl,$nlo),$Zlo
196         shl     \$60,$tmp
197         xor     ($Htbl,$nlo),$Zhi
198         and     \$0xf0,`&LB("$nhi")`
199         xor     ($rem_4bit,$rem,8),$Zhi
200         mov     $Zlo,$rem
201         xor     $tmp,$Zlo
202         jmp     .Loop$N
203
204 .align  16
205 .Lbreak$N:
206         shr     \$4,$Zlo
207         and     \$0xf,$rem
208         mov     $Zhi,$tmp
209         shr     \$4,$Zhi
210         xor     8($Htbl,$nlo),$Zlo
211         shl     \$60,$tmp
212         xor     ($Htbl,$nlo),$Zhi
213         and     \$0xf0,`&LB("$nhi")`
214         xor     ($rem_4bit,$rem,8),$Zhi
215         mov     $Zlo,$rem
216         xor     $tmp,$Zlo
217
218         shr     \$4,$Zlo
219         and     \$0xf,$rem
220         mov     $Zhi,$tmp
221         shr     \$4,$Zhi
222         xor     8($Htbl,$nhi),$Zlo
223         shl     \$60,$tmp
224         xor     ($Htbl,$nhi),$Zhi
225         xor     $tmp,$Zlo
226         xor     ($rem_4bit,$rem,8),$Zhi
227
228         bswap   $Zlo
229         bswap   $Zhi
230 ___
231 }}
232
233 $code=<<___;
234 .text
235 .extern OPENSSL_ia32cap_P
236
237 .globl  gcm_gmult_4bit
238 .type   gcm_gmult_4bit,\@function,2
239 .align  16
240 gcm_gmult_4bit:
241 .cfi_startproc
242         push    %rbx
243 .cfi_push       %rbx
244         push    %rbp            # %rbp and others are pushed exclusively in
245 .cfi_push       %rbp
246         push    %r12            # order to reuse Win64 exception handler...
247 .cfi_push       %r12
248         push    %r13
249 .cfi_push       %r13
250         push    %r14
251 .cfi_push       %r14
252         push    %r15
253 .cfi_push       %r15
254         sub     \$280,%rsp
255 .cfi_adjust_cfa_offset  280
256 .Lgmult_prologue:
257
258         movzb   15($Xi),$Zlo
259         lea     .Lrem_4bit(%rip),$rem_4bit
260 ___
261         &loop   ($Xi);
262 $code.=<<___;
263         mov     $Zlo,8($Xi)
264         mov     $Zhi,($Xi)
265
266         lea     280+48(%rsp),%rsi
267 .cfi_def_cfa    %rsi,8
268         mov     -8(%rsi),%rbx
269 .cfi_restore    %rbx
270         lea     (%rsi),%rsp
271 .cfi_def_cfa_register   %rsp
272 .Lgmult_epilogue:
273         ret
274 .cfi_endproc
275 .size   gcm_gmult_4bit,.-gcm_gmult_4bit
276 ___
277 \f
278 # per-function register layout
279 $inp="%rdx";
280 $len="%rcx";
281 $rem_8bit=$rem_4bit;
282
283 $code.=<<___;
284 .globl  gcm_ghash_4bit
285 .type   gcm_ghash_4bit,\@function,4
286 .align  16
287 gcm_ghash_4bit:
288 .cfi_startproc
289         push    %rbx
290 .cfi_push       %rbx
291         push    %rbp
292 .cfi_push       %rbp
293         push    %r12
294 .cfi_push       %r12
295         push    %r13
296 .cfi_push       %r13
297         push    %r14
298 .cfi_push       %r14
299         push    %r15
300 .cfi_push       %r15
301         sub     \$280,%rsp
302 .cfi_adjust_cfa_offset  280
303 .Lghash_prologue:
304         mov     $inp,%r14               # reassign couple of args
305         mov     $len,%r15
306 ___
307 { my $inp="%r14";
308   my $dat="%edx";
309   my $len="%r15";
310   my @nhi=("%ebx","%ecx");
311   my @rem=("%r12","%r13");
312   my $Hshr4="%rbp";
313
314         &sub    ($Htbl,-128);           # size optimization
315         &lea    ($Hshr4,"16+128(%rsp)");
316         { my @lo =($nlo,$nhi);
317           my @hi =($Zlo,$Zhi);
318
319           &xor  ($dat,$dat);
320           for ($i=0,$j=-2;$i<18;$i++,$j++) {
321             &mov        ("$j(%rsp)",&LB($dat))          if ($i>1);
322             &or         ($lo[0],$tmp)                   if ($i>1);
323             &mov        (&LB($dat),&LB($lo[1]))         if ($i>0 && $i<17);
324             &shr        ($lo[1],4)                      if ($i>0 && $i<17);
325             &mov        ($tmp,$hi[1])                   if ($i>0 && $i<17);
326             &shr        ($hi[1],4)                      if ($i>0 && $i<17);
327             &mov        ("8*$j($Hshr4)",$hi[0])         if ($i>1);
328             &mov        ($hi[0],"16*$i+0-128($Htbl)")   if ($i<16);
329             &shl        (&LB($dat),4)                   if ($i>0 && $i<17);
330             &mov        ("8*$j-128($Hshr4)",$lo[0])     if ($i>1);
331             &mov        ($lo[0],"16*$i+8-128($Htbl)")   if ($i<16);
332             &shl        ($tmp,60)                       if ($i>0 && $i<17);
333
334             push        (@lo,shift(@lo));
335             push        (@hi,shift(@hi));
336           }
337         }
338         &add    ($Htbl,-128);
339         &mov    ($Zlo,"8($Xi)");
340         &mov    ($Zhi,"0($Xi)");
341         &add    ($len,$inp);            # pointer to the end of data
342         &lea    ($rem_8bit,".Lrem_8bit(%rip)");
343         &jmp    (".Louter_loop");
344
345 $code.=".align  16\n.Louter_loop:\n";
346         &xor    ($Zhi,"($inp)");
347         &mov    ("%rdx","8($inp)");
348         &lea    ($inp,"16($inp)");
349         &xor    ("%rdx",$Zlo);
350         &mov    ("($Xi)",$Zhi);
351         &mov    ("8($Xi)","%rdx");
352         &shr    ("%rdx",32);
353
354         &xor    ($nlo,$nlo);
355         &rol    ($dat,8);
356         &mov    (&LB($nlo),&LB($dat));
357         &movz   ($nhi[0],&LB($dat));
358         &shl    (&LB($nlo),4);
359         &shr    ($nhi[0],4);
360
361         for ($j=11,$i=0;$i<15;$i++) {
362             &rol        ($dat,8);
363             &xor        ($Zlo,"8($Htbl,$nlo)")                  if ($i>0);
364             &xor        ($Zhi,"($Htbl,$nlo)")                   if ($i>0);
365             &mov        ($Zlo,"8($Htbl,$nlo)")                  if ($i==0);
366             &mov        ($Zhi,"($Htbl,$nlo)")                   if ($i==0);
367
368             &mov        (&LB($nlo),&LB($dat));
369             &xor        ($Zlo,$tmp)                             if ($i>0);
370             &movzw      ($rem[1],"($rem_8bit,$rem[1],2)")       if ($i>0);
371
372             &movz       ($nhi[1],&LB($dat));
373             &shl        (&LB($nlo),4);
374             &movzb      ($rem[0],"(%rsp,$nhi[0])");
375
376             &shr        ($nhi[1],4)                             if ($i<14);
377             &and        ($nhi[1],0xf0)                          if ($i==14);
378             &shl        ($rem[1],48)                            if ($i>0);
379             &xor        ($rem[0],$Zlo);
380
381             &mov        ($tmp,$Zhi);
382             &xor        ($Zhi,$rem[1])                          if ($i>0);
383             &shr        ($Zlo,8);
384
385             &movz       ($rem[0],&LB($rem[0]));
386             &mov        ($dat,"$j($Xi)")                        if (--$j%4==0);
387             &shr        ($Zhi,8);
388
389             &xor        ($Zlo,"-128($Hshr4,$nhi[0],8)");
390             &shl        ($tmp,56);
391             &xor        ($Zhi,"($Hshr4,$nhi[0],8)");
392
393             unshift     (@nhi,pop(@nhi));               # "rotate" registers
394             unshift     (@rem,pop(@rem));
395         }
396         &movzw  ($rem[1],"($rem_8bit,$rem[1],2)");
397         &xor    ($Zlo,"8($Htbl,$nlo)");
398         &xor    ($Zhi,"($Htbl,$nlo)");
399
400         &shl    ($rem[1],48);
401         &xor    ($Zlo,$tmp);
402
403         &xor    ($Zhi,$rem[1]);
404         &movz   ($rem[0],&LB($Zlo));
405         &shr    ($Zlo,4);
406
407         &mov    ($tmp,$Zhi);
408         &shl    (&LB($rem[0]),4);
409         &shr    ($Zhi,4);
410
411         &xor    ($Zlo,"8($Htbl,$nhi[0])");
412         &movzw  ($rem[0],"($rem_8bit,$rem[0],2)");
413         &shl    ($tmp,60);
414
415         &xor    ($Zhi,"($Htbl,$nhi[0])");
416         &xor    ($Zlo,$tmp);
417         &shl    ($rem[0],48);
418
419         &bswap  ($Zlo);
420         &xor    ($Zhi,$rem[0]);
421
422         &bswap  ($Zhi);
423         &cmp    ($inp,$len);
424         &jb     (".Louter_loop");
425 }
426 $code.=<<___;
427         mov     $Zlo,8($Xi)
428         mov     $Zhi,($Xi)
429
430         lea     280+48(%rsp),%rsi
431 .cfi_def_cfa    %rsi,8
432         mov     -48(%rsi),%r15
433 .cfi_restore    %r15
434         mov     -40(%rsi),%r14
435 .cfi_restore    %r14
436         mov     -32(%rsi),%r13
437 .cfi_restore    %r13
438         mov     -24(%rsi),%r12
439 .cfi_restore    %r12
440         mov     -16(%rsi),%rbp
441 .cfi_restore    %rbp
442         mov     -8(%rsi),%rbx
443 .cfi_restore    %rbx
444         lea     0(%rsi),%rsp
445 .cfi_def_cfa_register   %rsp
446 .Lghash_epilogue:
447         ret
448 .cfi_endproc
449 .size   gcm_ghash_4bit,.-gcm_ghash_4bit
450 ___
451 \f
452 ######################################################################
453 # PCLMULQDQ version.
454
455 @_4args=$win64? ("%rcx","%rdx","%r8", "%r9") :  # Win64 order
456                 ("%rdi","%rsi","%rdx","%rcx");  # Unix order
457
458 ($Xi,$Xhi)=("%xmm0","%xmm1");   $Hkey="%xmm2";
459 ($T1,$T2,$T3)=("%xmm3","%xmm4","%xmm5");
460
461 sub clmul64x64_T2 {     # minimal register pressure
462 my ($Xhi,$Xi,$Hkey,$HK)=@_;
463
464 if (!defined($HK)) {    $HK = $T2;
465 $code.=<<___;
466         movdqa          $Xi,$Xhi                #
467         pshufd          \$0b01001110,$Xi,$T1
468         pshufd          \$0b01001110,$Hkey,$T2
469         pxor            $Xi,$T1                 #
470         pxor            $Hkey,$T2
471 ___
472 } else {
473 $code.=<<___;
474         movdqa          $Xi,$Xhi                #
475         pshufd          \$0b01001110,$Xi,$T1
476         pxor            $Xi,$T1                 #
477 ___
478 }
479 $code.=<<___;
480         pclmulqdq       \$0x00,$Hkey,$Xi        #######
481         pclmulqdq       \$0x11,$Hkey,$Xhi       #######
482         pclmulqdq       \$0x00,$HK,$T1          #######
483         pxor            $Xi,$T1                 #
484         pxor            $Xhi,$T1                #
485
486         movdqa          $T1,$T2                 #
487         psrldq          \$8,$T1
488         pslldq          \$8,$T2                 #
489         pxor            $T1,$Xhi
490         pxor            $T2,$Xi                 #
491 ___
492 }
493
494 sub reduction_alg9 {    # 17/11 times faster than Intel version
495 my ($Xhi,$Xi) = @_;
496
497 $code.=<<___;
498         # 1st phase
499         movdqa          $Xi,$T2                 #
500         movdqa          $Xi,$T1
501         psllq           \$5,$Xi
502         pxor            $Xi,$T1                 #
503         psllq           \$1,$Xi
504         pxor            $T1,$Xi                 #
505         psllq           \$57,$Xi                #
506         movdqa          $Xi,$T1                 #
507         pslldq          \$8,$Xi
508         psrldq          \$8,$T1                 #
509         pxor            $T2,$Xi
510         pxor            $T1,$Xhi                #
511
512         # 2nd phase
513         movdqa          $Xi,$T2
514         psrlq           \$1,$Xi
515         pxor            $T2,$Xhi                #
516         pxor            $Xi,$T2
517         psrlq           \$5,$Xi
518         pxor            $T2,$Xi                 #
519         psrlq           \$1,$Xi                 #
520         pxor            $Xhi,$Xi                #
521 ___
522 }
523 \f
524 { my ($Htbl,$Xip)=@_4args;
525   my $HK="%xmm6";
526
527 $code.=<<___;
528 .globl  gcm_init_clmul
529 .type   gcm_init_clmul,\@abi-omnipotent
530 .align  16
531 gcm_init_clmul:
532 .cfi_startproc
533 .L_init_clmul:
534 ___
535 $code.=<<___ if ($win64);
536 .LSEH_begin_gcm_init_clmul:
537         # I can't trust assembler to use specific encoding:-(
538         .byte   0x48,0x83,0xec,0x18             #sub    $0x18,%rsp
539         .byte   0x0f,0x29,0x34,0x24             #movaps %xmm6,(%rsp)
540 ___
541 $code.=<<___;
542         movdqu          ($Xip),$Hkey
543         pshufd          \$0b01001110,$Hkey,$Hkey        # dword swap
544
545         # <<1 twist
546         pshufd          \$0b11111111,$Hkey,$T2  # broadcast uppermost dword
547         movdqa          $Hkey,$T1
548         psllq           \$1,$Hkey
549         pxor            $T3,$T3                 #
550         psrlq           \$63,$T1
551         pcmpgtd         $T2,$T3                 # broadcast carry bit
552         pslldq          \$8,$T1
553         por             $T1,$Hkey               # H<<=1
554
555         # magic reduction
556         pand            .L0x1c2_polynomial(%rip),$T3
557         pxor            $T3,$Hkey               # if(carry) H^=0x1c2_polynomial
558
559         # calculate H^2
560         pshufd          \$0b01001110,$Hkey,$HK
561         movdqa          $Hkey,$Xi
562         pxor            $Hkey,$HK
563 ___
564         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$HK);
565         &reduction_alg9 ($Xhi,$Xi);
566 $code.=<<___;
567         pshufd          \$0b01001110,$Hkey,$T1
568         pshufd          \$0b01001110,$Xi,$T2
569         pxor            $Hkey,$T1               # Karatsuba pre-processing
570         movdqu          $Hkey,0x00($Htbl)       # save H
571         pxor            $Xi,$T2                 # Karatsuba pre-processing
572         movdqu          $Xi,0x10($Htbl)         # save H^2
573         palignr         \$8,$T1,$T2             # low part is H.lo^H.hi...
574         movdqu          $T2,0x20($Htbl)         # save Karatsuba "salt"
575 ___
576 if ($do4xaggr) {
577         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$HK);   # H^3
578         &reduction_alg9 ($Xhi,$Xi);
579 $code.=<<___;
580         movdqa          $Xi,$T3
581 ___
582         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$HK);   # H^4
583         &reduction_alg9 ($Xhi,$Xi);
584 $code.=<<___;
585         pshufd          \$0b01001110,$T3,$T1
586         pshufd          \$0b01001110,$Xi,$T2
587         pxor            $T3,$T1                 # Karatsuba pre-processing
588         movdqu          $T3,0x30($Htbl)         # save H^3
589         pxor            $Xi,$T2                 # Karatsuba pre-processing
590         movdqu          $Xi,0x40($Htbl)         # save H^4
591         palignr         \$8,$T1,$T2             # low part is H^3.lo^H^3.hi...
592         movdqu          $T2,0x50($Htbl)         # save Karatsuba "salt"
593 ___
594 }
595 $code.=<<___ if ($win64);
596         movaps  (%rsp),%xmm6
597         lea     0x18(%rsp),%rsp
598 .LSEH_end_gcm_init_clmul:
599 ___
600 $code.=<<___;
601         ret
602 .cfi_endproc
603 .size   gcm_init_clmul,.-gcm_init_clmul
604 ___
605 }
606
607 { my ($Xip,$Htbl)=@_4args;
608
609 $code.=<<___;
610 .globl  gcm_gmult_clmul
611 .type   gcm_gmult_clmul,\@abi-omnipotent
612 .align  16
613 gcm_gmult_clmul:
614 .cfi_startproc
615 .L_gmult_clmul:
616         movdqu          ($Xip),$Xi
617         movdqa          .Lbswap_mask(%rip),$T3
618         movdqu          ($Htbl),$Hkey
619         movdqu          0x20($Htbl),$T2
620         pshufb          $T3,$Xi
621 ___
622         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$T2);
623 $code.=<<___ if (0 || (&reduction_alg9($Xhi,$Xi)&&0));
624         # experimental alternative. special thing about is that there
625         # no dependency between the two multiplications...
626         mov             \$`0xE1<<1`,%eax
627         mov             \$0xA040608020C0E000,%r10       # ((7..0)·0xE0)&0xff
628         mov             \$0x07,%r11d
629         movq            %rax,$T1
630         movq            %r10,$T2
631         movq            %r11,$T3                # borrow $T3
632         pand            $Xi,$T3
633         pshufb          $T3,$T2                 # ($Xi&7)·0xE0
634         movq            %rax,$T3
635         pclmulqdq       \$0x00,$Xi,$T1          # ·(0xE1<<1)
636         pxor            $Xi,$T2
637         pslldq          \$15,$T2
638         paddd           $T2,$T2                 # <<(64+56+1)
639         pxor            $T2,$Xi
640         pclmulqdq       \$0x01,$T3,$Xi
641         movdqa          .Lbswap_mask(%rip),$T3  # reload $T3
642         psrldq          \$1,$T1
643         pxor            $T1,$Xhi
644         pslldq          \$7,$Xi
645         pxor            $Xhi,$Xi
646 ___
647 $code.=<<___;
648         pshufb          $T3,$Xi
649         movdqu          $Xi,($Xip)
650         ret
651 .cfi_endproc
652 .size   gcm_gmult_clmul,.-gcm_gmult_clmul
653 ___
654 }
655 \f
656 { my ($Xip,$Htbl,$inp,$len)=@_4args;
657   my ($Xln,$Xmn,$Xhn,$Hkey2,$HK) = map("%xmm$_",(3..7));
658   my ($T1,$T2,$T3)=map("%xmm$_",(8..10));
659
660 $code.=<<___;
661 .globl  gcm_ghash_clmul
662 .type   gcm_ghash_clmul,\@abi-omnipotent
663 .align  32
664 gcm_ghash_clmul:
665 .cfi_startproc
666 .L_ghash_clmul:
667 ___
668 $code.=<<___ if ($win64);
669         lea     -0x88(%rsp),%rax
670 .LSEH_begin_gcm_ghash_clmul:
671         # I can't trust assembler to use specific encoding:-(
672         .byte   0x48,0x8d,0x60,0xe0             #lea    -0x20(%rax),%rsp
673         .byte   0x0f,0x29,0x70,0xe0             #movaps %xmm6,-0x20(%rax)
674         .byte   0x0f,0x29,0x78,0xf0             #movaps %xmm7,-0x10(%rax)
675         .byte   0x44,0x0f,0x29,0x00             #movaps %xmm8,0(%rax)
676         .byte   0x44,0x0f,0x29,0x48,0x10        #movaps %xmm9,0x10(%rax)
677         .byte   0x44,0x0f,0x29,0x50,0x20        #movaps %xmm10,0x20(%rax)
678         .byte   0x44,0x0f,0x29,0x58,0x30        #movaps %xmm11,0x30(%rax)
679         .byte   0x44,0x0f,0x29,0x60,0x40        #movaps %xmm12,0x40(%rax)
680         .byte   0x44,0x0f,0x29,0x68,0x50        #movaps %xmm13,0x50(%rax)
681         .byte   0x44,0x0f,0x29,0x70,0x60        #movaps %xmm14,0x60(%rax)
682         .byte   0x44,0x0f,0x29,0x78,0x70        #movaps %xmm15,0x70(%rax)
683 ___
684 $code.=<<___;
685         movdqa          .Lbswap_mask(%rip),$T3
686
687         movdqu          ($Xip),$Xi
688         movdqu          ($Htbl),$Hkey
689         movdqu          0x20($Htbl),$HK
690         pshufb          $T3,$Xi
691
692         sub             \$0x10,$len
693         jz              .Lodd_tail
694
695         movdqu          0x10($Htbl),$Hkey2
696 ___
697 if ($do4xaggr) {
698 my ($Xl,$Xm,$Xh,$Hkey3,$Hkey4)=map("%xmm$_",(11..15));
699
700 $code.=<<___;
701         mov             OPENSSL_ia32cap_P+4(%rip),%eax
702         cmp             \$0x30,$len
703         jb              .Lskip4x
704
705         and             \$`1<<26|1<<22`,%eax    # isolate MOVBE+XSAVE
706         cmp             \$`1<<22`,%eax          # check for MOVBE without XSAVE
707         je              .Lskip4x
708
709         sub             \$0x30,$len
710         mov             \$0xA040608020C0E000,%rax       # ((7..0)·0xE0)&0xff
711         movdqu          0x30($Htbl),$Hkey3
712         movdqu          0x40($Htbl),$Hkey4
713
714         #######
715         # Xi+4 =[(H*Ii+3) + (H^2*Ii+2) + (H^3*Ii+1) + H^4*(Ii+Xi)] mod P
716         #
717         movdqu          0x30($inp),$Xln
718          movdqu         0x20($inp),$Xl
719         pshufb          $T3,$Xln
720          pshufb         $T3,$Xl
721         movdqa          $Xln,$Xhn
722         pshufd          \$0b01001110,$Xln,$Xmn
723         pxor            $Xln,$Xmn
724         pclmulqdq       \$0x00,$Hkey,$Xln
725         pclmulqdq       \$0x11,$Hkey,$Xhn
726         pclmulqdq       \$0x00,$HK,$Xmn
727
728         movdqa          $Xl,$Xh
729         pshufd          \$0b01001110,$Xl,$Xm
730         pxor            $Xl,$Xm
731         pclmulqdq       \$0x00,$Hkey2,$Xl
732         pclmulqdq       \$0x11,$Hkey2,$Xh
733         pclmulqdq       \$0x10,$HK,$Xm
734         xorps           $Xl,$Xln
735         xorps           $Xh,$Xhn
736         movups          0x50($Htbl),$HK
737         xorps           $Xm,$Xmn
738
739         movdqu          0x10($inp),$Xl
740          movdqu         0($inp),$T1
741         pshufb          $T3,$Xl
742          pshufb         $T3,$T1
743         movdqa          $Xl,$Xh
744         pshufd          \$0b01001110,$Xl,$Xm
745          pxor           $T1,$Xi
746         pxor            $Xl,$Xm
747         pclmulqdq       \$0x00,$Hkey3,$Xl
748          movdqa         $Xi,$Xhi
749          pshufd         \$0b01001110,$Xi,$T1
750          pxor           $Xi,$T1
751         pclmulqdq       \$0x11,$Hkey3,$Xh
752         pclmulqdq       \$0x00,$HK,$Xm
753         xorps           $Xl,$Xln
754         xorps           $Xh,$Xhn
755
756         lea     0x40($inp),$inp
757         sub     \$0x40,$len
758         jc      .Ltail4x
759
760         jmp     .Lmod4_loop
761 .align  32
762 .Lmod4_loop:
763         pclmulqdq       \$0x00,$Hkey4,$Xi
764         xorps           $Xm,$Xmn
765          movdqu         0x30($inp),$Xl
766          pshufb         $T3,$Xl
767         pclmulqdq       \$0x11,$Hkey4,$Xhi
768         xorps           $Xln,$Xi
769          movdqu         0x20($inp),$Xln
770          movdqa         $Xl,$Xh
771         pclmulqdq       \$0x10,$HK,$T1
772          pshufd         \$0b01001110,$Xl,$Xm
773         xorps           $Xhn,$Xhi
774          pxor           $Xl,$Xm
775          pshufb         $T3,$Xln
776         movups          0x20($Htbl),$HK
777         xorps           $Xmn,$T1
778          pclmulqdq      \$0x00,$Hkey,$Xl
779          pshufd         \$0b01001110,$Xln,$Xmn
780
781         pxor            $Xi,$T1                 # aggregated Karatsuba post-processing
782          movdqa         $Xln,$Xhn
783         pxor            $Xhi,$T1                #
784          pxor           $Xln,$Xmn
785         movdqa          $T1,$T2                 #
786          pclmulqdq      \$0x11,$Hkey,$Xh
787         pslldq          \$8,$T1
788         psrldq          \$8,$T2                 #
789         pxor            $T1,$Xi
790         movdqa          .L7_mask(%rip),$T1
791         pxor            $T2,$Xhi                #
792         movq            %rax,$T2
793
794         pand            $Xi,$T1                 # 1st phase
795         pshufb          $T1,$T2                 #
796         pxor            $Xi,$T2                 #
797          pclmulqdq      \$0x00,$HK,$Xm
798         psllq           \$57,$T2                #
799         movdqa          $T2,$T1                 #
800         pslldq          \$8,$T2
801          pclmulqdq      \$0x00,$Hkey2,$Xln
802         psrldq          \$8,$T1                 #
803         pxor            $T2,$Xi
804         pxor            $T1,$Xhi                #
805         movdqu          0($inp),$T1
806
807         movdqa          $Xi,$T2                 # 2nd phase
808         psrlq           \$1,$Xi
809          pclmulqdq      \$0x11,$Hkey2,$Xhn
810          xorps          $Xl,$Xln
811          movdqu         0x10($inp),$Xl
812          pshufb         $T3,$Xl
813          pclmulqdq      \$0x10,$HK,$Xmn
814          xorps          $Xh,$Xhn
815          movups         0x50($Htbl),$HK
816         pshufb          $T3,$T1
817         pxor            $T2,$Xhi                #
818         pxor            $Xi,$T2
819         psrlq           \$5,$Xi
820
821          movdqa         $Xl,$Xh
822          pxor           $Xm,$Xmn
823          pshufd         \$0b01001110,$Xl,$Xm
824         pxor            $T2,$Xi                 #
825         pxor            $T1,$Xhi
826          pxor           $Xl,$Xm
827          pclmulqdq      \$0x00,$Hkey3,$Xl
828         psrlq           \$1,$Xi                 #
829         pxor            $Xhi,$Xi                #
830         movdqa          $Xi,$Xhi
831          pclmulqdq      \$0x11,$Hkey3,$Xh
832          xorps          $Xl,$Xln
833         pshufd          \$0b01001110,$Xi,$T1
834         pxor            $Xi,$T1
835
836          pclmulqdq      \$0x00,$HK,$Xm
837          xorps          $Xh,$Xhn
838
839         lea     0x40($inp),$inp
840         sub     \$0x40,$len
841         jnc     .Lmod4_loop
842
843 .Ltail4x:
844         pclmulqdq       \$0x00,$Hkey4,$Xi
845         pclmulqdq       \$0x11,$Hkey4,$Xhi
846         pclmulqdq       \$0x10,$HK,$T1
847         xorps           $Xm,$Xmn
848         xorps           $Xln,$Xi
849         xorps           $Xhn,$Xhi
850         pxor            $Xi,$Xhi                # aggregated Karatsuba post-processing
851         pxor            $Xmn,$T1
852
853         pxor            $Xhi,$T1                #
854         pxor            $Xi,$Xhi
855
856         movdqa          $T1,$T2                 #
857         psrldq          \$8,$T1
858         pslldq          \$8,$T2                 #
859         pxor            $T1,$Xhi
860         pxor            $T2,$Xi                 #
861 ___
862         &reduction_alg9($Xhi,$Xi);
863 $code.=<<___;
864         add     \$0x40,$len
865         jz      .Ldone
866         movdqu  0x20($Htbl),$HK
867         sub     \$0x10,$len
868         jz      .Lodd_tail
869 .Lskip4x:
870 ___
871 }
872 $code.=<<___;
873         #######
874         # Xi+2 =[H*(Ii+1 + Xi+1)] mod P =
875         #       [(H*Ii+1) + (H*Xi+1)] mod P =
876         #       [(H*Ii+1) + H^2*(Ii+Xi)] mod P
877         #
878         movdqu          ($inp),$T1              # Ii
879         movdqu          16($inp),$Xln           # Ii+1
880         pshufb          $T3,$T1
881         pshufb          $T3,$Xln
882         pxor            $T1,$Xi                 # Ii+Xi
883
884         movdqa          $Xln,$Xhn
885         pshufd          \$0b01001110,$Xln,$Xmn
886         pxor            $Xln,$Xmn
887         pclmulqdq       \$0x00,$Hkey,$Xln
888         pclmulqdq       \$0x11,$Hkey,$Xhn
889         pclmulqdq       \$0x00,$HK,$Xmn
890
891         lea             32($inp),$inp           # i+=2
892         nop
893         sub             \$0x20,$len
894         jbe             .Leven_tail
895         nop
896         jmp             .Lmod_loop
897
898 .align  32
899 .Lmod_loop:
900         movdqa          $Xi,$Xhi
901         movdqa          $Xmn,$T1
902         pshufd          \$0b01001110,$Xi,$Xmn   #
903         pxor            $Xi,$Xmn                #
904
905         pclmulqdq       \$0x00,$Hkey2,$Xi
906         pclmulqdq       \$0x11,$Hkey2,$Xhi
907         pclmulqdq       \$0x10,$HK,$Xmn
908
909         pxor            $Xln,$Xi                # (H*Ii+1) + H^2*(Ii+Xi)
910         pxor            $Xhn,$Xhi
911           movdqu        ($inp),$T2              # Ii
912         pxor            $Xi,$T1                 # aggregated Karatsuba post-processing
913           pshufb        $T3,$T2
914           movdqu        16($inp),$Xln           # Ii+1
915
916         pxor            $Xhi,$T1
917           pxor          $T2,$Xhi                # "Ii+Xi", consume early
918         pxor            $T1,$Xmn
919          pshufb         $T3,$Xln
920         movdqa          $Xmn,$T1                #
921         psrldq          \$8,$T1
922         pslldq          \$8,$Xmn                #
923         pxor            $T1,$Xhi
924         pxor            $Xmn,$Xi                #
925
926         movdqa          $Xln,$Xhn               #
927
928           movdqa        $Xi,$T2                 # 1st phase
929           movdqa        $Xi,$T1
930           psllq         \$5,$Xi
931           pxor          $Xi,$T1                 #
932         pclmulqdq       \$0x00,$Hkey,$Xln       #######
933           psllq         \$1,$Xi
934           pxor          $T1,$Xi                 #
935           psllq         \$57,$Xi                #
936           movdqa        $Xi,$T1                 #
937           pslldq        \$8,$Xi
938           psrldq        \$8,$T1                 #
939           pxor          $T2,$Xi
940         pshufd          \$0b01001110,$Xhn,$Xmn
941           pxor          $T1,$Xhi                #
942         pxor            $Xhn,$Xmn               #
943
944           movdqa        $Xi,$T2                 # 2nd phase
945           psrlq         \$1,$Xi
946         pclmulqdq       \$0x11,$Hkey,$Xhn       #######
947           pxor          $T2,$Xhi                #
948           pxor          $Xi,$T2
949           psrlq         \$5,$Xi
950           pxor          $T2,$Xi                 #
951         lea             32($inp),$inp
952           psrlq         \$1,$Xi                 #
953         pclmulqdq       \$0x00,$HK,$Xmn         #######
954           pxor          $Xhi,$Xi                #
955
956         sub             \$0x20,$len
957         ja              .Lmod_loop
958
959 .Leven_tail:
960          movdqa         $Xi,$Xhi
961          movdqa         $Xmn,$T1
962          pshufd         \$0b01001110,$Xi,$Xmn   #
963          pxor           $Xi,$Xmn                #
964
965         pclmulqdq       \$0x00,$Hkey2,$Xi
966         pclmulqdq       \$0x11,$Hkey2,$Xhi
967         pclmulqdq       \$0x10,$HK,$Xmn
968
969         pxor            $Xln,$Xi                # (H*Ii+1) + H^2*(Ii+Xi)
970         pxor            $Xhn,$Xhi
971         pxor            $Xi,$T1
972         pxor            $Xhi,$T1
973         pxor            $T1,$Xmn
974         movdqa          $Xmn,$T1                #
975         psrldq          \$8,$T1
976         pslldq          \$8,$Xmn                #
977         pxor            $T1,$Xhi
978         pxor            $Xmn,$Xi                #
979 ___
980         &reduction_alg9 ($Xhi,$Xi);
981 $code.=<<___;
982         test            $len,$len
983         jnz             .Ldone
984
985 .Lodd_tail:
986         movdqu          ($inp),$T1              # Ii
987         pshufb          $T3,$T1
988         pxor            $T1,$Xi                 # Ii+Xi
989 ___
990         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$HK);   # H*(Ii+Xi)
991         &reduction_alg9 ($Xhi,$Xi);
992 $code.=<<___;
993 .Ldone:
994         pshufb          $T3,$Xi
995         movdqu          $Xi,($Xip)
996 ___
997 $code.=<<___ if ($win64);
998         movaps  (%rsp),%xmm6
999         movaps  0x10(%rsp),%xmm7
1000         movaps  0x20(%rsp),%xmm8
1001         movaps  0x30(%rsp),%xmm9
1002         movaps  0x40(%rsp),%xmm10
1003         movaps  0x50(%rsp),%xmm11
1004         movaps  0x60(%rsp),%xmm12
1005         movaps  0x70(%rsp),%xmm13
1006         movaps  0x80(%rsp),%xmm14
1007         movaps  0x90(%rsp),%xmm15
1008         lea     0xa8(%rsp),%rsp
1009 .LSEH_end_gcm_ghash_clmul:
1010 ___
1011 $code.=<<___;
1012         ret
1013 .cfi_endproc
1014 .size   gcm_ghash_clmul,.-gcm_ghash_clmul
1015 ___
1016 }
1017 \f
1018 $code.=<<___;
1019 .globl  gcm_init_avx
1020 .type   gcm_init_avx,\@abi-omnipotent
1021 .align  32
1022 gcm_init_avx:
1023 .cfi_startproc
1024 ___
1025 if ($avx) {
1026 my ($Htbl,$Xip)=@_4args;
1027 my $HK="%xmm6";
1028
1029 $code.=<<___ if ($win64);
1030 .LSEH_begin_gcm_init_avx:
1031         # I can't trust assembler to use specific encoding:-(
1032         .byte   0x48,0x83,0xec,0x18             #sub    $0x18,%rsp
1033         .byte   0x0f,0x29,0x34,0x24             #movaps %xmm6,(%rsp)
1034 ___
1035 $code.=<<___;
1036         vzeroupper
1037
1038         vmovdqu         ($Xip),$Hkey
1039         vpshufd         \$0b01001110,$Hkey,$Hkey        # dword swap
1040
1041         # <<1 twist
1042         vpshufd         \$0b11111111,$Hkey,$T2  # broadcast uppermost dword
1043         vpsrlq          \$63,$Hkey,$T1
1044         vpsllq          \$1,$Hkey,$Hkey
1045         vpxor           $T3,$T3,$T3             #
1046         vpcmpgtd        $T2,$T3,$T3             # broadcast carry bit
1047         vpslldq         \$8,$T1,$T1
1048         vpor            $T1,$Hkey,$Hkey         # H<<=1
1049
1050         # magic reduction
1051         vpand           .L0x1c2_polynomial(%rip),$T3,$T3
1052         vpxor           $T3,$Hkey,$Hkey         # if(carry) H^=0x1c2_polynomial
1053
1054         vpunpckhqdq     $Hkey,$Hkey,$HK
1055         vmovdqa         $Hkey,$Xi
1056         vpxor           $Hkey,$HK,$HK
1057         mov             \$4,%r10                # up to H^8
1058         jmp             .Linit_start_avx
1059 ___
1060
1061 sub clmul64x64_avx {
1062 my ($Xhi,$Xi,$Hkey,$HK)=@_;
1063
1064 if (!defined($HK)) {    $HK = $T2;
1065 $code.=<<___;
1066         vpunpckhqdq     $Xi,$Xi,$T1
1067         vpunpckhqdq     $Hkey,$Hkey,$T2
1068         vpxor           $Xi,$T1,$T1             #
1069         vpxor           $Hkey,$T2,$T2
1070 ___
1071 } else {
1072 $code.=<<___;
1073         vpunpckhqdq     $Xi,$Xi,$T1
1074         vpxor           $Xi,$T1,$T1             #
1075 ___
1076 }
1077 $code.=<<___;
1078         vpclmulqdq      \$0x11,$Hkey,$Xi,$Xhi   #######
1079         vpclmulqdq      \$0x00,$Hkey,$Xi,$Xi    #######
1080         vpclmulqdq      \$0x00,$HK,$T1,$T1      #######
1081         vpxor           $Xi,$Xhi,$T2            #
1082         vpxor           $T2,$T1,$T1             #
1083
1084         vpslldq         \$8,$T1,$T2             #
1085         vpsrldq         \$8,$T1,$T1
1086         vpxor           $T2,$Xi,$Xi             #
1087         vpxor           $T1,$Xhi,$Xhi
1088 ___
1089 }
1090
1091 sub reduction_avx {
1092 my ($Xhi,$Xi) = @_;
1093
1094 $code.=<<___;
1095         vpsllq          \$57,$Xi,$T1            # 1st phase
1096         vpsllq          \$62,$Xi,$T2
1097         vpxor           $T1,$T2,$T2             #
1098         vpsllq          \$63,$Xi,$T1
1099         vpxor           $T1,$T2,$T2             #
1100         vpslldq         \$8,$T2,$T1             #
1101         vpsrldq         \$8,$T2,$T2
1102         vpxor           $T1,$Xi,$Xi             #
1103         vpxor           $T2,$Xhi,$Xhi
1104
1105         vpsrlq          \$1,$Xi,$T2             # 2nd phase
1106         vpxor           $Xi,$Xhi,$Xhi
1107         vpxor           $T2,$Xi,$Xi             #
1108         vpsrlq          \$5,$T2,$T2
1109         vpxor           $T2,$Xi,$Xi             #
1110         vpsrlq          \$1,$Xi,$Xi             #
1111         vpxor           $Xhi,$Xi,$Xi            #
1112 ___
1113 }
1114
1115 $code.=<<___;
1116 .align  32
1117 .Linit_loop_avx:
1118         vpalignr        \$8,$T1,$T2,$T3         # low part is H.lo^H.hi...
1119         vmovdqu         $T3,-0x10($Htbl)        # save Karatsuba "salt"
1120 ___
1121         &clmul64x64_avx ($Xhi,$Xi,$Hkey,$HK);   # calculate H^3,5,7
1122         &reduction_avx  ($Xhi,$Xi);
1123 $code.=<<___;
1124 .Linit_start_avx:
1125         vmovdqa         $Xi,$T3
1126 ___
1127         &clmul64x64_avx ($Xhi,$Xi,$Hkey,$HK);   # calculate H^2,4,6,8
1128         &reduction_avx  ($Xhi,$Xi);
1129 $code.=<<___;
1130         vpshufd         \$0b01001110,$T3,$T1
1131         vpshufd         \$0b01001110,$Xi,$T2
1132         vpxor           $T3,$T1,$T1             # Karatsuba pre-processing
1133         vmovdqu         $T3,0x00($Htbl)         # save H^1,3,5,7
1134         vpxor           $Xi,$T2,$T2             # Karatsuba pre-processing
1135         vmovdqu         $Xi,0x10($Htbl)         # save H^2,4,6,8
1136         lea             0x30($Htbl),$Htbl
1137         sub             \$1,%r10
1138         jnz             .Linit_loop_avx
1139
1140         vpalignr        \$8,$T2,$T1,$T3         # last "salt" is flipped
1141         vmovdqu         $T3,-0x10($Htbl)
1142
1143         vzeroupper
1144 ___
1145 $code.=<<___ if ($win64);
1146         movaps  (%rsp),%xmm6
1147         lea     0x18(%rsp),%rsp
1148 .LSEH_end_gcm_init_avx:
1149 ___
1150 $code.=<<___;
1151         ret
1152 .cfi_endproc
1153 .size   gcm_init_avx,.-gcm_init_avx
1154 ___
1155 } else {
1156 $code.=<<___;
1157         jmp     .L_init_clmul
1158 .size   gcm_init_avx,.-gcm_init_avx
1159 ___
1160 }
1161
1162 $code.=<<___;
1163 .globl  gcm_gmult_avx
1164 .type   gcm_gmult_avx,\@abi-omnipotent
1165 .align  32
1166 gcm_gmult_avx:
1167 .cfi_startproc
1168         jmp     .L_gmult_clmul
1169 .cfi_endproc
1170 .size   gcm_gmult_avx,.-gcm_gmult_avx
1171 ___
1172 \f
1173 $code.=<<___;
1174 .globl  gcm_ghash_avx
1175 .type   gcm_ghash_avx,\@abi-omnipotent
1176 .align  32
1177 gcm_ghash_avx:
1178 .cfi_startproc
1179 ___
1180 if ($avx) {
1181 my ($Xip,$Htbl,$inp,$len)=@_4args;
1182 my ($Xlo,$Xhi,$Xmi,
1183     $Zlo,$Zhi,$Zmi,
1184     $Hkey,$HK,$T1,$T2,
1185     $Xi,$Xo,$Tred,$bswap,$Ii,$Ij) = map("%xmm$_",(0..15));
1186
1187 $code.=<<___ if ($win64);
1188         lea     -0x88(%rsp),%rax
1189 .LSEH_begin_gcm_ghash_avx:
1190         # I can't trust assembler to use specific encoding:-(
1191         .byte   0x48,0x8d,0x60,0xe0             #lea    -0x20(%rax),%rsp
1192         .byte   0x0f,0x29,0x70,0xe0             #movaps %xmm6,-0x20(%rax)
1193         .byte   0x0f,0x29,0x78,0xf0             #movaps %xmm7,-0x10(%rax)
1194         .byte   0x44,0x0f,0x29,0x00             #movaps %xmm8,0(%rax)
1195         .byte   0x44,0x0f,0x29,0x48,0x10        #movaps %xmm9,0x10(%rax)
1196         .byte   0x44,0x0f,0x29,0x50,0x20        #movaps %xmm10,0x20(%rax)
1197         .byte   0x44,0x0f,0x29,0x58,0x30        #movaps %xmm11,0x30(%rax)
1198         .byte   0x44,0x0f,0x29,0x60,0x40        #movaps %xmm12,0x40(%rax)
1199         .byte   0x44,0x0f,0x29,0x68,0x50        #movaps %xmm13,0x50(%rax)
1200         .byte   0x44,0x0f,0x29,0x70,0x60        #movaps %xmm14,0x60(%rax)
1201         .byte   0x44,0x0f,0x29,0x78,0x70        #movaps %xmm15,0x70(%rax)
1202 ___
1203 $code.=<<___;
1204         vzeroupper
1205
1206         vmovdqu         ($Xip),$Xi              # load $Xi
1207         lea             .L0x1c2_polynomial(%rip),%r10
1208         lea             0x40($Htbl),$Htbl       # size optimization
1209         vmovdqu         .Lbswap_mask(%rip),$bswap
1210         vpshufb         $bswap,$Xi,$Xi
1211         cmp             \$0x80,$len
1212         jb              .Lshort_avx
1213         sub             \$0x80,$len
1214
1215         vmovdqu         0x70($inp),$Ii          # I[7]
1216         vmovdqu         0x00-0x40($Htbl),$Hkey  # $Hkey^1
1217         vpshufb         $bswap,$Ii,$Ii
1218         vmovdqu         0x20-0x40($Htbl),$HK
1219
1220         vpunpckhqdq     $Ii,$Ii,$T2
1221          vmovdqu        0x60($inp),$Ij          # I[6]
1222         vpclmulqdq      \$0x00,$Hkey,$Ii,$Xlo
1223         vpxor           $Ii,$T2,$T2
1224          vpshufb        $bswap,$Ij,$Ij
1225         vpclmulqdq      \$0x11,$Hkey,$Ii,$Xhi
1226          vmovdqu        0x10-0x40($Htbl),$Hkey  # $Hkey^2
1227          vpunpckhqdq    $Ij,$Ij,$T1
1228          vmovdqu        0x50($inp),$Ii          # I[5]
1229         vpclmulqdq      \$0x00,$HK,$T2,$Xmi
1230          vpxor          $Ij,$T1,$T1
1231
1232          vpshufb        $bswap,$Ii,$Ii
1233         vpclmulqdq      \$0x00,$Hkey,$Ij,$Zlo
1234          vpunpckhqdq    $Ii,$Ii,$T2
1235         vpclmulqdq      \$0x11,$Hkey,$Ij,$Zhi
1236          vmovdqu        0x30-0x40($Htbl),$Hkey  # $Hkey^3
1237          vpxor          $Ii,$T2,$T2
1238          vmovdqu        0x40($inp),$Ij          # I[4]
1239         vpclmulqdq      \$0x10,$HK,$T1,$Zmi
1240          vmovdqu        0x50-0x40($Htbl),$HK
1241
1242          vpshufb        $bswap,$Ij,$Ij
1243         vpxor           $Xlo,$Zlo,$Zlo
1244         vpclmulqdq      \$0x00,$Hkey,$Ii,$Xlo
1245         vpxor           $Xhi,$Zhi,$Zhi
1246          vpunpckhqdq    $Ij,$Ij,$T1
1247         vpclmulqdq      \$0x11,$Hkey,$Ii,$Xhi
1248          vmovdqu        0x40-0x40($Htbl),$Hkey  # $Hkey^4
1249         vpxor           $Xmi,$Zmi,$Zmi
1250         vpclmulqdq      \$0x00,$HK,$T2,$Xmi
1251          vpxor          $Ij,$T1,$T1
1252
1253          vmovdqu        0x30($inp),$Ii          # I[3]
1254         vpxor           $Zlo,$Xlo,$Xlo
1255         vpclmulqdq      \$0x00,$Hkey,$Ij,$Zlo
1256         vpxor           $Zhi,$Xhi,$Xhi
1257          vpshufb        $bswap,$Ii,$Ii
1258         vpclmulqdq      \$0x11,$Hkey,$Ij,$Zhi
1259          vmovdqu        0x60-0x40($Htbl),$Hkey  # $Hkey^5
1260         vpxor           $Zmi,$Xmi,$Xmi
1261          vpunpckhqdq    $Ii,$Ii,$T2
1262         vpclmulqdq      \$0x10,$HK,$T1,$Zmi
1263          vmovdqu        0x80-0x40($Htbl),$HK
1264          vpxor          $Ii,$T2,$T2
1265
1266          vmovdqu        0x20($inp),$Ij          # I[2]
1267         vpxor           $Xlo,$Zlo,$Zlo
1268         vpclmulqdq      \$0x00,$Hkey,$Ii,$Xlo
1269         vpxor           $Xhi,$Zhi,$Zhi
1270          vpshufb        $bswap,$Ij,$Ij
1271         vpclmulqdq      \$0x11,$Hkey,$Ii,$Xhi
1272          vmovdqu        0x70-0x40($Htbl),$Hkey  # $Hkey^6
1273         vpxor           $Xmi,$Zmi,$Zmi
1274          vpunpckhqdq    $Ij,$Ij,$T1
1275         vpclmulqdq      \$0x00,$HK,$T2,$Xmi
1276          vpxor          $Ij,$T1,$T1
1277
1278          vmovdqu        0x10($inp),$Ii          # I[1]
1279         vpxor           $Zlo,$Xlo,$Xlo
1280         vpclmulqdq      \$0x00,$Hkey,$Ij,$Zlo
1281         vpxor           $Zhi,$Xhi,$Xhi
1282          vpshufb        $bswap,$Ii,$Ii
1283         vpclmulqdq      \$0x11,$Hkey,$Ij,$Zhi
1284          vmovdqu        0x90-0x40($Htbl),$Hkey  # $Hkey^7
1285         vpxor           $Zmi,$Xmi,$Xmi
1286          vpunpckhqdq    $Ii,$Ii,$T2
1287         vpclmulqdq      \$0x10,$HK,$T1,$Zmi
1288          vmovdqu        0xb0-0x40($Htbl),$HK
1289          vpxor          $Ii,$T2,$T2
1290
1291          vmovdqu        ($inp),$Ij              # I[0]
1292         vpxor           $Xlo,$Zlo,$Zlo
1293         vpclmulqdq      \$0x00,$Hkey,$Ii,$Xlo
1294         vpxor           $Xhi,$Zhi,$Zhi
1295          vpshufb        $bswap,$Ij,$Ij
1296         vpclmulqdq      \$0x11,$Hkey,$Ii,$Xhi
1297          vmovdqu        0xa0-0x40($Htbl),$Hkey  # $Hkey^8
1298         vpxor           $Xmi,$Zmi,$Zmi
1299         vpclmulqdq      \$0x10,$HK,$T2,$Xmi
1300
1301         lea             0x80($inp),$inp
1302         cmp             \$0x80,$len
1303         jb              .Ltail_avx
1304
1305         vpxor           $Xi,$Ij,$Ij             # accumulate $Xi
1306         sub             \$0x80,$len
1307         jmp             .Loop8x_avx
1308
1309 .align  32
1310 .Loop8x_avx:
1311         vpunpckhqdq     $Ij,$Ij,$T1
1312          vmovdqu        0x70($inp),$Ii          # I[7]
1313         vpxor           $Xlo,$Zlo,$Zlo
1314         vpxor           $Ij,$T1,$T1
1315         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xi
1316          vpshufb        $bswap,$Ii,$Ii
1317         vpxor           $Xhi,$Zhi,$Zhi
1318         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xo
1319          vmovdqu        0x00-0x40($Htbl),$Hkey  # $Hkey^1
1320          vpunpckhqdq    $Ii,$Ii,$T2
1321         vpxor           $Xmi,$Zmi,$Zmi
1322         vpclmulqdq      \$0x00,$HK,$T1,$Tred
1323          vmovdqu        0x20-0x40($Htbl),$HK
1324          vpxor          $Ii,$T2,$T2
1325
1326           vmovdqu       0x60($inp),$Ij          # I[6]
1327          vpclmulqdq     \$0x00,$Hkey,$Ii,$Xlo
1328         vpxor           $Zlo,$Xi,$Xi            # collect result
1329           vpshufb       $bswap,$Ij,$Ij
1330          vpclmulqdq     \$0x11,$Hkey,$Ii,$Xhi
1331         vxorps          $Zhi,$Xo,$Xo
1332           vmovdqu       0x10-0x40($Htbl),$Hkey  # $Hkey^2
1333          vpunpckhqdq    $Ij,$Ij,$T1
1334          vpclmulqdq     \$0x00,$HK,  $T2,$Xmi
1335         vpxor           $Zmi,$Tred,$Tred
1336          vxorps         $Ij,$T1,$T1
1337
1338           vmovdqu       0x50($inp),$Ii          # I[5]
1339         vpxor           $Xi,$Tred,$Tred         # aggregated Karatsuba post-processing
1340          vpclmulqdq     \$0x00,$Hkey,$Ij,$Zlo
1341         vpxor           $Xo,$Tred,$Tred
1342         vpslldq         \$8,$Tred,$T2
1343          vpxor          $Xlo,$Zlo,$Zlo
1344          vpclmulqdq     \$0x11,$Hkey,$Ij,$Zhi
1345         vpsrldq         \$8,$Tred,$Tred
1346         vpxor           $T2, $Xi, $Xi
1347           vmovdqu       0x30-0x40($Htbl),$Hkey  # $Hkey^3
1348           vpshufb       $bswap,$Ii,$Ii
1349         vxorps          $Tred,$Xo, $Xo
1350          vpxor          $Xhi,$Zhi,$Zhi
1351          vpunpckhqdq    $Ii,$Ii,$T2
1352          vpclmulqdq     \$0x10,$HK,  $T1,$Zmi
1353           vmovdqu       0x50-0x40($Htbl),$HK
1354          vpxor          $Ii,$T2,$T2
1355          vpxor          $Xmi,$Zmi,$Zmi
1356
1357           vmovdqu       0x40($inp),$Ij          # I[4]
1358         vpalignr        \$8,$Xi,$Xi,$Tred       # 1st phase
1359          vpclmulqdq     \$0x00,$Hkey,$Ii,$Xlo
1360           vpshufb       $bswap,$Ij,$Ij
1361          vpxor          $Zlo,$Xlo,$Xlo
1362          vpclmulqdq     \$0x11,$Hkey,$Ii,$Xhi
1363           vmovdqu       0x40-0x40($Htbl),$Hkey  # $Hkey^4
1364          vpunpckhqdq    $Ij,$Ij,$T1
1365          vpxor          $Zhi,$Xhi,$Xhi
1366          vpclmulqdq     \$0x00,$HK,  $T2,$Xmi
1367          vxorps         $Ij,$T1,$T1
1368          vpxor          $Zmi,$Xmi,$Xmi
1369
1370           vmovdqu       0x30($inp),$Ii          # I[3]
1371         vpclmulqdq      \$0x10,(%r10),$Xi,$Xi
1372          vpclmulqdq     \$0x00,$Hkey,$Ij,$Zlo
1373           vpshufb       $bswap,$Ii,$Ii
1374          vpxor          $Xlo,$Zlo,$Zlo
1375          vpclmulqdq     \$0x11,$Hkey,$Ij,$Zhi
1376           vmovdqu       0x60-0x40($Htbl),$Hkey  # $Hkey^5
1377          vpunpckhqdq    $Ii,$Ii,$T2
1378          vpxor          $Xhi,$Zhi,$Zhi
1379          vpclmulqdq     \$0x10,$HK,  $T1,$Zmi
1380           vmovdqu       0x80-0x40($Htbl),$HK
1381          vpxor          $Ii,$T2,$T2
1382          vpxor          $Xmi,$Zmi,$Zmi
1383
1384           vmovdqu       0x20($inp),$Ij          # I[2]
1385          vpclmulqdq     \$0x00,$Hkey,$Ii,$Xlo
1386           vpshufb       $bswap,$Ij,$Ij
1387          vpxor          $Zlo,$Xlo,$Xlo
1388          vpclmulqdq     \$0x11,$Hkey,$Ii,$Xhi
1389           vmovdqu       0x70-0x40($Htbl),$Hkey  # $Hkey^6
1390          vpunpckhqdq    $Ij,$Ij,$T1
1391          vpxor          $Zhi,$Xhi,$Xhi
1392          vpclmulqdq     \$0x00,$HK,  $T2,$Xmi
1393          vpxor          $Ij,$T1,$T1
1394          vpxor          $Zmi,$Xmi,$Xmi
1395         vxorps          $Tred,$Xi,$Xi
1396
1397           vmovdqu       0x10($inp),$Ii          # I[1]
1398         vpalignr        \$8,$Xi,$Xi,$Tred       # 2nd phase
1399          vpclmulqdq     \$0x00,$Hkey,$Ij,$Zlo
1400           vpshufb       $bswap,$Ii,$Ii
1401          vpxor          $Xlo,$Zlo,$Zlo
1402          vpclmulqdq     \$0x11,$Hkey,$Ij,$Zhi
1403           vmovdqu       0x90-0x40($Htbl),$Hkey  # $Hkey^7
1404         vpclmulqdq      \$0x10,(%r10),$Xi,$Xi
1405         vxorps          $Xo,$Tred,$Tred
1406          vpunpckhqdq    $Ii,$Ii,$T2
1407          vpxor          $Xhi,$Zhi,$Zhi
1408          vpclmulqdq     \$0x10,$HK,  $T1,$Zmi
1409           vmovdqu       0xb0-0x40($Htbl),$HK
1410          vpxor          $Ii,$T2,$T2
1411          vpxor          $Xmi,$Zmi,$Zmi
1412
1413           vmovdqu       ($inp),$Ij              # I[0]
1414          vpclmulqdq     \$0x00,$Hkey,$Ii,$Xlo
1415           vpshufb       $bswap,$Ij,$Ij
1416          vpclmulqdq     \$0x11,$Hkey,$Ii,$Xhi
1417           vmovdqu       0xa0-0x40($Htbl),$Hkey  # $Hkey^8
1418         vpxor           $Tred,$Ij,$Ij
1419          vpclmulqdq     \$0x10,$HK,  $T2,$Xmi
1420         vpxor           $Xi,$Ij,$Ij             # accumulate $Xi
1421
1422         lea             0x80($inp),$inp
1423         sub             \$0x80,$len
1424         jnc             .Loop8x_avx
1425
1426         add             \$0x80,$len
1427         jmp             .Ltail_no_xor_avx
1428
1429 .align  32
1430 .Lshort_avx:
1431         vmovdqu         -0x10($inp,$len),$Ii    # very last word
1432         lea             ($inp,$len),$inp
1433         vmovdqu         0x00-0x40($Htbl),$Hkey  # $Hkey^1
1434         vmovdqu         0x20-0x40($Htbl),$HK
1435         vpshufb         $bswap,$Ii,$Ij
1436
1437         vmovdqa         $Xlo,$Zlo               # subtle way to zero $Zlo,
1438         vmovdqa         $Xhi,$Zhi               # $Zhi and
1439         vmovdqa         $Xmi,$Zmi               # $Zmi
1440         sub             \$0x10,$len
1441         jz              .Ltail_avx
1442
1443         vpunpckhqdq     $Ij,$Ij,$T1
1444         vpxor           $Xlo,$Zlo,$Zlo
1445         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1446         vpxor           $Ij,$T1,$T1
1447          vmovdqu        -0x20($inp),$Ii
1448         vpxor           $Xhi,$Zhi,$Zhi
1449         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1450         vmovdqu         0x10-0x40($Htbl),$Hkey  # $Hkey^2
1451          vpshufb        $bswap,$Ii,$Ij
1452         vpxor           $Xmi,$Zmi,$Zmi
1453         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1454         vpsrldq         \$8,$HK,$HK
1455         sub             \$0x10,$len
1456         jz              .Ltail_avx
1457
1458         vpunpckhqdq     $Ij,$Ij,$T1
1459         vpxor           $Xlo,$Zlo,$Zlo
1460         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1461         vpxor           $Ij,$T1,$T1
1462          vmovdqu        -0x30($inp),$Ii
1463         vpxor           $Xhi,$Zhi,$Zhi
1464         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1465         vmovdqu         0x30-0x40($Htbl),$Hkey  # $Hkey^3
1466          vpshufb        $bswap,$Ii,$Ij
1467         vpxor           $Xmi,$Zmi,$Zmi
1468         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1469         vmovdqu         0x50-0x40($Htbl),$HK
1470         sub             \$0x10,$len
1471         jz              .Ltail_avx
1472
1473         vpunpckhqdq     $Ij,$Ij,$T1
1474         vpxor           $Xlo,$Zlo,$Zlo
1475         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1476         vpxor           $Ij,$T1,$T1
1477          vmovdqu        -0x40($inp),$Ii
1478         vpxor           $Xhi,$Zhi,$Zhi
1479         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1480         vmovdqu         0x40-0x40($Htbl),$Hkey  # $Hkey^4
1481          vpshufb        $bswap,$Ii,$Ij
1482         vpxor           $Xmi,$Zmi,$Zmi
1483         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1484         vpsrldq         \$8,$HK,$HK
1485         sub             \$0x10,$len
1486         jz              .Ltail_avx
1487
1488         vpunpckhqdq     $Ij,$Ij,$T1
1489         vpxor           $Xlo,$Zlo,$Zlo
1490         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1491         vpxor           $Ij,$T1,$T1
1492          vmovdqu        -0x50($inp),$Ii
1493         vpxor           $Xhi,$Zhi,$Zhi
1494         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1495         vmovdqu         0x60-0x40($Htbl),$Hkey  # $Hkey^5
1496          vpshufb        $bswap,$Ii,$Ij
1497         vpxor           $Xmi,$Zmi,$Zmi
1498         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1499         vmovdqu         0x80-0x40($Htbl),$HK
1500         sub             \$0x10,$len
1501         jz              .Ltail_avx
1502
1503         vpunpckhqdq     $Ij,$Ij,$T1
1504         vpxor           $Xlo,$Zlo,$Zlo
1505         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1506         vpxor           $Ij,$T1,$T1
1507          vmovdqu        -0x60($inp),$Ii
1508         vpxor           $Xhi,$Zhi,$Zhi
1509         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1510         vmovdqu         0x70-0x40($Htbl),$Hkey  # $Hkey^6
1511          vpshufb        $bswap,$Ii,$Ij
1512         vpxor           $Xmi,$Zmi,$Zmi
1513         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1514         vpsrldq         \$8,$HK,$HK
1515         sub             \$0x10,$len
1516         jz              .Ltail_avx
1517
1518         vpunpckhqdq     $Ij,$Ij,$T1
1519         vpxor           $Xlo,$Zlo,$Zlo
1520         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1521         vpxor           $Ij,$T1,$T1
1522          vmovdqu        -0x70($inp),$Ii
1523         vpxor           $Xhi,$Zhi,$Zhi
1524         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1525         vmovdqu         0x90-0x40($Htbl),$Hkey  # $Hkey^7
1526          vpshufb        $bswap,$Ii,$Ij
1527         vpxor           $Xmi,$Zmi,$Zmi
1528         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1529         vmovq           0xb8-0x40($Htbl),$HK
1530         sub             \$0x10,$len
1531         jmp             .Ltail_avx
1532
1533 .align  32
1534 .Ltail_avx:
1535         vpxor           $Xi,$Ij,$Ij             # accumulate $Xi
1536 .Ltail_no_xor_avx:
1537         vpunpckhqdq     $Ij,$Ij,$T1
1538         vpxor           $Xlo,$Zlo,$Zlo
1539         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1540         vpxor           $Ij,$T1,$T1
1541         vpxor           $Xhi,$Zhi,$Zhi
1542         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1543         vpxor           $Xmi,$Zmi,$Zmi
1544         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1545
1546         vmovdqu         (%r10),$Tred
1547
1548         vpxor           $Xlo,$Zlo,$Xi
1549         vpxor           $Xhi,$Zhi,$Xo
1550         vpxor           $Xmi,$Zmi,$Zmi
1551
1552         vpxor           $Xi, $Zmi,$Zmi          # aggregated Karatsuba post-processing
1553         vpxor           $Xo, $Zmi,$Zmi
1554         vpslldq         \$8, $Zmi,$T2
1555         vpsrldq         \$8, $Zmi,$Zmi
1556         vpxor           $T2, $Xi, $Xi
1557         vpxor           $Zmi,$Xo, $Xo
1558
1559         vpclmulqdq      \$0x10,$Tred,$Xi,$T2    # 1st phase
1560         vpalignr        \$8,$Xi,$Xi,$Xi
1561         vpxor           $T2,$Xi,$Xi
1562
1563         vpclmulqdq      \$0x10,$Tred,$Xi,$T2    # 2nd phase
1564         vpalignr        \$8,$Xi,$Xi,$Xi
1565         vpxor           $Xo,$Xi,$Xi
1566         vpxor           $T2,$Xi,$Xi
1567
1568         cmp             \$0,$len
1569         jne             .Lshort_avx
1570
1571         vpshufb         $bswap,$Xi,$Xi
1572         vmovdqu         $Xi,($Xip)
1573         vzeroupper
1574 ___
1575 $code.=<<___ if ($win64);
1576         movaps  (%rsp),%xmm6
1577         movaps  0x10(%rsp),%xmm7
1578         movaps  0x20(%rsp),%xmm8
1579         movaps  0x30(%rsp),%xmm9
1580         movaps  0x40(%rsp),%xmm10
1581         movaps  0x50(%rsp),%xmm11
1582         movaps  0x60(%rsp),%xmm12
1583         movaps  0x70(%rsp),%xmm13
1584         movaps  0x80(%rsp),%xmm14
1585         movaps  0x90(%rsp),%xmm15
1586         lea     0xa8(%rsp),%rsp
1587 .LSEH_end_gcm_ghash_avx:
1588 ___
1589 $code.=<<___;
1590         ret
1591 .cfi_endproc
1592 .size   gcm_ghash_avx,.-gcm_ghash_avx
1593 ___
1594 } else {
1595 $code.=<<___;
1596         jmp     .L_ghash_clmul
1597 .size   gcm_ghash_avx,.-gcm_ghash_avx
1598 ___
1599 }
1600 \f
1601 $code.=<<___;
1602 .align  64
1603 .Lbswap_mask:
1604         .byte   15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0
1605 .L0x1c2_polynomial:
1606         .byte   1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0xc2
1607 .L7_mask:
1608         .long   7,0,7,0
1609 .L7_mask_poly:
1610         .long   7,0,`0xE1<<1`,0
1611 .align  64
1612 .type   .Lrem_4bit,\@object
1613 .Lrem_4bit:
1614         .long   0,`0x0000<<16`,0,`0x1C20<<16`,0,`0x3840<<16`,0,`0x2460<<16`
1615         .long   0,`0x7080<<16`,0,`0x6CA0<<16`,0,`0x48C0<<16`,0,`0x54E0<<16`
1616         .long   0,`0xE100<<16`,0,`0xFD20<<16`,0,`0xD940<<16`,0,`0xC560<<16`
1617         .long   0,`0x9180<<16`,0,`0x8DA0<<16`,0,`0xA9C0<<16`,0,`0xB5E0<<16`
1618 .type   .Lrem_8bit,\@object
1619 .Lrem_8bit:
1620         .value  0x0000,0x01C2,0x0384,0x0246,0x0708,0x06CA,0x048C,0x054E
1621         .value  0x0E10,0x0FD2,0x0D94,0x0C56,0x0918,0x08DA,0x0A9C,0x0B5E
1622         .value  0x1C20,0x1DE2,0x1FA4,0x1E66,0x1B28,0x1AEA,0x18AC,0x196E
1623         .value  0x1230,0x13F2,0x11B4,0x1076,0x1538,0x14FA,0x16BC,0x177E
1624         .value  0x3840,0x3982,0x3BC4,0x3A06,0x3F48,0x3E8A,0x3CCC,0x3D0E
1625         .value  0x3650,0x3792,0x35D4,0x3416,0x3158,0x309A,0x32DC,0x331E
1626         .value  0x2460,0x25A2,0x27E4,0x2626,0x2368,0x22AA,0x20EC,0x212E
1627         .value  0x2A70,0x2BB2,0x29F4,0x2836,0x2D78,0x2CBA,0x2EFC,0x2F3E
1628         .value  0x7080,0x7142,0x7304,0x72C6,0x7788,0x764A,0x740C,0x75CE
1629         .value  0x7E90,0x7F52,0x7D14,0x7CD6,0x7998,0x785A,0x7A1C,0x7BDE
1630         .value  0x6CA0,0x6D62,0x6F24,0x6EE6,0x6BA8,0x6A6A,0x682C,0x69EE
1631         .value  0x62B0,0x6372,0x6134,0x60F6,0x65B8,0x647A,0x663C,0x67FE
1632         .value  0x48C0,0x4902,0x4B44,0x4A86,0x4FC8,0x4E0A,0x4C4C,0x4D8E
1633         .value  0x46D0,0x4712,0x4554,0x4496,0x41D8,0x401A,0x425C,0x439E
1634         .value  0x54E0,0x5522,0x5764,0x56A6,0x53E8,0x522A,0x506C,0x51AE
1635         .value  0x5AF0,0x5B32,0x5974,0x58B6,0x5DF8,0x5C3A,0x5E7C,0x5FBE
1636         .value  0xE100,0xE0C2,0xE284,0xE346,0xE608,0xE7CA,0xE58C,0xE44E
1637         .value  0xEF10,0xEED2,0xEC94,0xED56,0xE818,0xE9DA,0xEB9C,0xEA5E
1638         .value  0xFD20,0xFCE2,0xFEA4,0xFF66,0xFA28,0xFBEA,0xF9AC,0xF86E
1639         .value  0xF330,0xF2F2,0xF0B4,0xF176,0xF438,0xF5FA,0xF7BC,0xF67E
1640         .value  0xD940,0xD882,0xDAC4,0xDB06,0xDE48,0xDF8A,0xDDCC,0xDC0E
1641         .value  0xD750,0xD692,0xD4D4,0xD516,0xD058,0xD19A,0xD3DC,0xD21E
1642         .value  0xC560,0xC4A2,0xC6E4,0xC726,0xC268,0xC3AA,0xC1EC,0xC02E
1643         .value  0xCB70,0xCAB2,0xC8F4,0xC936,0xCC78,0xCDBA,0xCFFC,0xCE3E
1644         .value  0x9180,0x9042,0x9204,0x93C6,0x9688,0x974A,0x950C,0x94CE
1645         .value  0x9F90,0x9E52,0x9C14,0x9DD6,0x9898,0x995A,0x9B1C,0x9ADE
1646         .value  0x8DA0,0x8C62,0x8E24,0x8FE6,0x8AA8,0x8B6A,0x892C,0x88EE
1647         .value  0x83B0,0x8272,0x8034,0x81F6,0x84B8,0x857A,0x873C,0x86FE
1648         .value  0xA9C0,0xA802,0xAA44,0xAB86,0xAEC8,0xAF0A,0xAD4C,0xAC8E
1649         .value  0xA7D0,0xA612,0xA454,0xA596,0xA0D8,0xA11A,0xA35C,0xA29E
1650         .value  0xB5E0,0xB422,0xB664,0xB7A6,0xB2E8,0xB32A,0xB16C,0xB0AE
1651         .value  0xBBF0,0xBA32,0xB874,0xB9B6,0xBCF8,0xBD3A,0xBF7C,0xBEBE
1652
1653 .asciz  "GHASH for x86_64, CRYPTOGAMS by <appro\@openssl.org>"
1654 .align  64
1655 ___
1656 \f
1657 # EXCEPTION_DISPOSITION handler (EXCEPTION_RECORD *rec,ULONG64 frame,
1658 #               CONTEXT *context,DISPATCHER_CONTEXT *disp)
1659 if ($win64) {
1660 $rec="%rcx";
1661 $frame="%rdx";
1662 $context="%r8";
1663 $disp="%r9";
1664
1665 $code.=<<___;
1666 .extern __imp_RtlVirtualUnwind
1667 .type   se_handler,\@abi-omnipotent
1668 .align  16
1669 se_handler:
1670         push    %rsi
1671         push    %rdi
1672         push    %rbx
1673         push    %rbp
1674         push    %r12
1675         push    %r13
1676         push    %r14
1677         push    %r15
1678         pushfq
1679         sub     \$64,%rsp
1680
1681         mov     120($context),%rax      # pull context->Rax
1682         mov     248($context),%rbx      # pull context->Rip
1683
1684         mov     8($disp),%rsi           # disp->ImageBase
1685         mov     56($disp),%r11          # disp->HandlerData
1686
1687         mov     0(%r11),%r10d           # HandlerData[0]
1688         lea     (%rsi,%r10),%r10        # prologue label
1689         cmp     %r10,%rbx               # context->Rip<prologue label
1690         jb      .Lin_prologue
1691
1692         mov     152($context),%rax      # pull context->Rsp
1693
1694         mov     4(%r11),%r10d           # HandlerData[1]
1695         lea     (%rsi,%r10),%r10        # epilogue label
1696         cmp     %r10,%rbx               # context->Rip>=epilogue label
1697         jae     .Lin_prologue
1698
1699         lea     48+280(%rax),%rax       # adjust "rsp"
1700
1701         mov     -8(%rax),%rbx
1702         mov     -16(%rax),%rbp
1703         mov     -24(%rax),%r12
1704         mov     -32(%rax),%r13
1705         mov     -40(%rax),%r14
1706         mov     -48(%rax),%r15
1707         mov     %rbx,144($context)      # restore context->Rbx
1708         mov     %rbp,160($context)      # restore context->Rbp
1709         mov     %r12,216($context)      # restore context->R12
1710         mov     %r13,224($context)      # restore context->R13
1711         mov     %r14,232($context)      # restore context->R14
1712         mov     %r15,240($context)      # restore context->R15
1713
1714 .Lin_prologue:
1715         mov     8(%rax),%rdi
1716         mov     16(%rax),%rsi
1717         mov     %rax,152($context)      # restore context->Rsp
1718         mov     %rsi,168($context)      # restore context->Rsi
1719         mov     %rdi,176($context)      # restore context->Rdi
1720
1721         mov     40($disp),%rdi          # disp->ContextRecord
1722         mov     $context,%rsi           # context
1723         mov     \$`1232/8`,%ecx         # sizeof(CONTEXT)
1724         .long   0xa548f3fc              # cld; rep movsq
1725
1726         mov     $disp,%rsi
1727         xor     %rcx,%rcx               # arg1, UNW_FLAG_NHANDLER
1728         mov     8(%rsi),%rdx            # arg2, disp->ImageBase
1729         mov     0(%rsi),%r8             # arg3, disp->ControlPc
1730         mov     16(%rsi),%r9            # arg4, disp->FunctionEntry
1731         mov     40(%rsi),%r10           # disp->ContextRecord
1732         lea     56(%rsi),%r11           # &disp->HandlerData
1733         lea     24(%rsi),%r12           # &disp->EstablisherFrame
1734         mov     %r10,32(%rsp)           # arg5
1735         mov     %r11,40(%rsp)           # arg6
1736         mov     %r12,48(%rsp)           # arg7
1737         mov     %rcx,56(%rsp)           # arg8, (NULL)
1738         call    *__imp_RtlVirtualUnwind(%rip)
1739
1740         mov     \$1,%eax                # ExceptionContinueSearch
1741         add     \$64,%rsp
1742         popfq
1743         pop     %r15
1744         pop     %r14
1745         pop     %r13
1746         pop     %r12
1747         pop     %rbp
1748         pop     %rbx
1749         pop     %rdi
1750         pop     %rsi
1751         ret
1752 .size   se_handler,.-se_handler
1753
1754 .section        .pdata
1755 .align  4
1756         .rva    .LSEH_begin_gcm_gmult_4bit
1757         .rva    .LSEH_end_gcm_gmult_4bit
1758         .rva    .LSEH_info_gcm_gmult_4bit
1759
1760         .rva    .LSEH_begin_gcm_ghash_4bit
1761         .rva    .LSEH_end_gcm_ghash_4bit
1762         .rva    .LSEH_info_gcm_ghash_4bit
1763
1764         .rva    .LSEH_begin_gcm_init_clmul
1765         .rva    .LSEH_end_gcm_init_clmul
1766         .rva    .LSEH_info_gcm_init_clmul
1767
1768         .rva    .LSEH_begin_gcm_ghash_clmul
1769         .rva    .LSEH_end_gcm_ghash_clmul
1770         .rva    .LSEH_info_gcm_ghash_clmul
1771 ___
1772 $code.=<<___    if ($avx);
1773         .rva    .LSEH_begin_gcm_init_avx
1774         .rva    .LSEH_end_gcm_init_avx
1775         .rva    .LSEH_info_gcm_init_clmul
1776
1777         .rva    .LSEH_begin_gcm_ghash_avx
1778         .rva    .LSEH_end_gcm_ghash_avx
1779         .rva    .LSEH_info_gcm_ghash_clmul
1780 ___
1781 $code.=<<___;
1782 .section        .xdata
1783 .align  8
1784 .LSEH_info_gcm_gmult_4bit:
1785         .byte   9,0,0,0
1786         .rva    se_handler
1787         .rva    .Lgmult_prologue,.Lgmult_epilogue       # HandlerData
1788 .LSEH_info_gcm_ghash_4bit:
1789         .byte   9,0,0,0
1790         .rva    se_handler
1791         .rva    .Lghash_prologue,.Lghash_epilogue       # HandlerData
1792 .LSEH_info_gcm_init_clmul:
1793         .byte   0x01,0x08,0x03,0x00
1794         .byte   0x08,0x68,0x00,0x00     #movaps 0x00(rsp),xmm6
1795         .byte   0x04,0x22,0x00,0x00     #sub    rsp,0x18
1796 .LSEH_info_gcm_ghash_clmul:
1797         .byte   0x01,0x33,0x16,0x00
1798         .byte   0x33,0xf8,0x09,0x00     #movaps 0x90(rsp),xmm15
1799         .byte   0x2e,0xe8,0x08,0x00     #movaps 0x80(rsp),xmm14
1800         .byte   0x29,0xd8,0x07,0x00     #movaps 0x70(rsp),xmm13
1801         .byte   0x24,0xc8,0x06,0x00     #movaps 0x60(rsp),xmm12
1802         .byte   0x1f,0xb8,0x05,0x00     #movaps 0x50(rsp),xmm11
1803         .byte   0x1a,0xa8,0x04,0x00     #movaps 0x40(rsp),xmm10
1804         .byte   0x15,0x98,0x03,0x00     #movaps 0x30(rsp),xmm9
1805         .byte   0x10,0x88,0x02,0x00     #movaps 0x20(rsp),xmm8
1806         .byte   0x0c,0x78,0x01,0x00     #movaps 0x10(rsp),xmm7
1807         .byte   0x08,0x68,0x00,0x00     #movaps 0x00(rsp),xmm6
1808         .byte   0x04,0x01,0x15,0x00     #sub    rsp,0xa8
1809 ___
1810 }
1811 \f
1812 $code =~ s/\`([^\`]*)\`/eval($1)/gem;
1813
1814 print $code;
1815
1816 close STDOUT;