fca19e41f0849da914eb65f356e34ab3811ff320
[openssl.git] / crypto / modes / asm / ghash-x86.pl
1 #!/usr/bin/env perl
2 #
3 # ====================================================================
4 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
5 # project. The module is, however, dual licensed under OpenSSL and
6 # CRYPTOGAMS licenses depending on where you obtain it. For further
7 # details see http://www.openssl.org/~appro/cryptogams/.
8 # ====================================================================
9 #
10 # March, May, June 2010
11 #
12 # The module implements "4-bit" GCM GHASH function and underlying
13 # single multiplication operation in GF(2^128). "4-bit" means that it
14 # uses 256 bytes per-key table [+64/128 bytes fixed table]. It has two
15 # code paths: vanilla x86 and vanilla MMX. Former will be executed on
16 # 486 and Pentium, latter on all others. MMX GHASH features so called
17 # "528B" variant of "4-bit" method utilizing additional 256+16 bytes
18 # of per-key storage [+512 bytes shared table]. Performance results
19 # are for streamed GHASH subroutine and are expressed in cycles per
20 # processed byte, less is better:
21 #
22 #               gcc 2.95.3(*)   MMX assembler   x86 assembler
23 #
24 # Pentium       105/111(**)     -               50
25 # PIII          68 /75          12.2            24
26 # P4            125/125         17.8            84(***)
27 # Opteron       66 /70          10.1            30
28 # Core2         54 /67          8.4             18
29 #
30 # (*)   gcc 3.4.x was observed to generate few percent slower code,
31 #       which is one of reasons why 2.95.3 results were chosen,
32 #       another reason is lack of 3.4.x results for older CPUs;
33 #       comparison with MMX results is not completely fair, because C
34 #       results are for vanilla "256B" implementation, while
35 #       assembler results are for "528B";-)
36 # (**)  second number is result for code compiled with -fPIC flag,
37 #       which is actually more relevant, because assembler code is
38 #       position-independent;
39 # (***) see comment in non-MMX routine for further details;
40 #
41 # To summarize, it's >2-5 times faster than gcc-generated code. To
42 # anchor it to something else SHA1 assembler processes one byte in
43 # 11-13 cycles on contemporary x86 cores. As for choice of MMX in
44 # particular, see comment at the end of the file...
45
46 # May 2010
47 #
48 # Add PCLMULQDQ version performing at 2.10 cycles per processed byte.
49 # The question is how close is it to theoretical limit? The pclmulqdq
50 # instruction latency appears to be 14 cycles and there can't be more
51 # than 2 of them executing at any given time. This means that single
52 # Karatsuba multiplication would take 28 cycles *plus* few cycles for
53 # pre- and post-processing. Then multiplication has to be followed by
54 # modulo-reduction. Given that aggregated reduction method [see
55 # "Carry-less Multiplication and Its Usage for Computing the GCM Mode"
56 # white paper by Intel] allows you to perform reduction only once in
57 # a while we can assume that asymptotic performance can be estimated
58 # as (28+Tmod/Naggr)/16, where Tmod is time to perform reduction
59 # and Naggr is the aggregation factor.
60 #
61 # Before we proceed to this implementation let's have closer look at
62 # the best-performing code suggested by Intel in their white paper.
63 # By tracing inter-register dependencies Tmod is estimated as ~19
64 # cycles and Naggr chosen by Intel is 4, resulting in 2.05 cycles per
65 # processed byte. As implied, this is quite optimistic estimate,
66 # because it does not account for Karatsuba pre- and post-processing,
67 # which for a single multiplication is ~5 cycles. Unfortunately Intel
68 # does not provide performance data for GHASH alone. But benchmarking
69 # AES_GCM_encrypt ripped out of Fig. 15 of the white paper with aadt
70 # alone resulted in 2.46 cycles per byte of out 16KB buffer. Note that
71 # the result accounts even for pre-computing of degrees of the hash
72 # key H, but its portion is negligible at 16KB buffer size.
73 #
74 # Moving on to the implementation in question. Tmod is estimated as
75 # ~13 cycles and Naggr is 2, giving asymptotic performance of ...
76 # 2.16. How is it possible that measured performance is better than
77 # optimistic theoretical estimate? There is one thing Intel failed
78 # to recognize. By serializing GHASH with CTR in same subroutine
79 # former's performance is really limited to above (Tmul + Tmod/Naggr)
80 # equation. But if GHASH procedure is detached, the modulo-reduction
81 # can be interleaved with Naggr-1 multiplications at instruction level
82 # and under ideal conditions even disappear from the equation. So that
83 # optimistic theoretical estimate for this implementation is ...
84 # 28/16=1.75, and not 2.16. Well, it's probably way too optimistic,
85 # at least for such small Naggr. I'd argue that (28+Tproc/Naggr),
86 # where Tproc is time required for Karatsuba pre- and post-processing,
87 # is more realistic estimate. In this case it gives ... 1.91 cycles.
88 # Or in other words, depending on how well we can interleave reduction
89 # and one of the two multiplications the performance should be betwen
90 # 1.91 and 2.16. As already mentioned, this implementation processes
91 # one byte out of 8KB buffer in 2.10 cycles, while x86_64 counterpart
92 # - in 2.02. x86_64 performance is better, because larger register
93 # bank allows to interleave reduction and multiplication better.
94 #
95 # Does it make sense to increase Naggr? To start with it's virtually
96 # impossible in 32-bit mode, because of limited register bank
97 # capacity. Otherwise improvement has to be weighed agiainst slower
98 # setup, as well as code size and complexity increase. As even
99 # optimistic estimate doesn't promise 30% performance improvement,
100 # there are currently no plans to increase Naggr.
101 #
102 # Special thanks to David Woodhouse <dwmw2@infradead.org> for
103 # providing access to a Westmere-based system on behalf of Intel
104 # Open Source Technology Centre.
105
106 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
107 push(@INC,"${dir}","${dir}../../perlasm");
108 require "x86asm.pl";
109
110 &asm_init($ARGV[0],"ghash-x86.pl",$x86only = $ARGV[$#ARGV] eq "386");
111
112 $sse2=0;
113 for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
114
115 ($Zhh,$Zhl,$Zlh,$Zll) = ("ebp","edx","ecx","ebx");
116 $inp  = "edi";
117 $Htbl = "esi";
118 \f
119 $unroll = 0;    # Affects x86 loop. Folded loop performs ~7% worse
120                 # than unrolled, which has to be weighted against
121                 # 2.5x x86-specific code size reduction.
122
123 sub x86_loop {
124     my $off = shift;
125     my $rem = "eax";
126
127         &mov    ($Zhh,&DWP(4,$Htbl,$Zll));
128         &mov    ($Zhl,&DWP(0,$Htbl,$Zll));
129         &mov    ($Zlh,&DWP(12,$Htbl,$Zll));
130         &mov    ($Zll,&DWP(8,$Htbl,$Zll));
131         &xor    ($rem,$rem);    # avoid partial register stalls on PIII
132
133         # shrd practically kills P4, 2.5x deterioration, but P4 has
134         # MMX code-path to execute. shrd runs tad faster [than twice
135         # the shifts, move's and or's] on pre-MMX Pentium (as well as
136         # PIII and Core2), *but* minimizes code size, spares register
137         # and thus allows to fold the loop...
138         if (!$unroll) {
139         my $cnt = $inp;
140         &mov    ($cnt,15);
141         &jmp    (&label("x86_loop"));
142         &set_label("x86_loop",16);
143             for($i=1;$i<=2;$i++) {
144                 &mov    (&LB($rem),&LB($Zll));
145                 &shrd   ($Zll,$Zlh,4);
146                 &and    (&LB($rem),0xf);
147                 &shrd   ($Zlh,$Zhl,4);
148                 &shrd   ($Zhl,$Zhh,4);
149                 &shr    ($Zhh,4);
150                 &xor    ($Zhh,&DWP($off+16,"esp",$rem,4));
151
152                 &mov    (&LB($rem),&BP($off,"esp",$cnt));
153                 if ($i&1) {
154                         &and    (&LB($rem),0xf0);
155                 } else {
156                         &shl    (&LB($rem),4);
157                 }
158
159                 &xor    ($Zll,&DWP(8,$Htbl,$rem));
160                 &xor    ($Zlh,&DWP(12,$Htbl,$rem));
161                 &xor    ($Zhl,&DWP(0,$Htbl,$rem));
162                 &xor    ($Zhh,&DWP(4,$Htbl,$rem));
163
164                 if ($i&1) {
165                         &dec    ($cnt);
166                         &js     (&label("x86_break"));
167                 } else {
168                         &jmp    (&label("x86_loop"));
169                 }
170             }
171         &set_label("x86_break",16);
172         } else {
173             for($i=1;$i<32;$i++) {
174                 &comment($i);
175                 &mov    (&LB($rem),&LB($Zll));
176                 &shrd   ($Zll,$Zlh,4);
177                 &and    (&LB($rem),0xf);
178                 &shrd   ($Zlh,$Zhl,4);
179                 &shrd   ($Zhl,$Zhh,4);
180                 &shr    ($Zhh,4);
181                 &xor    ($Zhh,&DWP($off+16,"esp",$rem,4));
182
183                 if ($i&1) {
184                         &mov    (&LB($rem),&BP($off+15-($i>>1),"esp"));
185                         &and    (&LB($rem),0xf0);
186                 } else {
187                         &mov    (&LB($rem),&BP($off+15-($i>>1),"esp"));
188                         &shl    (&LB($rem),4);
189                 }
190
191                 &xor    ($Zll,&DWP(8,$Htbl,$rem));
192                 &xor    ($Zlh,&DWP(12,$Htbl,$rem));
193                 &xor    ($Zhl,&DWP(0,$Htbl,$rem));
194                 &xor    ($Zhh,&DWP(4,$Htbl,$rem));
195             }
196         }
197         &bswap  ($Zll);
198         &bswap  ($Zlh);
199         &bswap  ($Zhl);
200         if (!$x86only) {
201                 &bswap  ($Zhh);
202         } else {
203                 &mov    ("eax",$Zhh);
204                 &bswap  ("eax");
205                 &mov    ($Zhh,"eax");
206         }
207 }
208
209 if ($unroll) {
210     &function_begin_B("_x86_gmult_4bit_inner");
211         &x86_loop(4);
212         &ret    ();
213     &function_end_B("_x86_gmult_4bit_inner");
214 }
215
216 sub deposit_rem_4bit {
217     my $bias = shift;
218
219         &mov    (&DWP($bias+0, "esp"),0x0000<<16);
220         &mov    (&DWP($bias+4, "esp"),0x1C20<<16);
221         &mov    (&DWP($bias+8, "esp"),0x3840<<16);
222         &mov    (&DWP($bias+12,"esp"),0x2460<<16);
223         &mov    (&DWP($bias+16,"esp"),0x7080<<16);
224         &mov    (&DWP($bias+20,"esp"),0x6CA0<<16);
225         &mov    (&DWP($bias+24,"esp"),0x48C0<<16);
226         &mov    (&DWP($bias+28,"esp"),0x54E0<<16);
227         &mov    (&DWP($bias+32,"esp"),0xE100<<16);
228         &mov    (&DWP($bias+36,"esp"),0xFD20<<16);
229         &mov    (&DWP($bias+40,"esp"),0xD940<<16);
230         &mov    (&DWP($bias+44,"esp"),0xC560<<16);
231         &mov    (&DWP($bias+48,"esp"),0x9180<<16);
232         &mov    (&DWP($bias+52,"esp"),0x8DA0<<16);
233         &mov    (&DWP($bias+56,"esp"),0xA9C0<<16);
234         &mov    (&DWP($bias+60,"esp"),0xB5E0<<16);
235 }
236 \f
237 $suffix = $x86only ? "" : "_x86";
238
239 &function_begin("gcm_gmult_4bit".$suffix);
240         &stack_push(16+4+1);                    # +1 for stack alignment
241         &mov    ($inp,&wparam(0));              # load Xi
242         &mov    ($Htbl,&wparam(1));             # load Htable
243
244         &mov    ($Zhh,&DWP(0,$inp));            # load Xi[16]
245         &mov    ($Zhl,&DWP(4,$inp));
246         &mov    ($Zlh,&DWP(8,$inp));
247         &mov    ($Zll,&DWP(12,$inp));
248
249         &deposit_rem_4bit(16);
250
251         &mov    (&DWP(0,"esp"),$Zhh);           # copy Xi[16] on stack
252         &mov    (&DWP(4,"esp"),$Zhl);
253         &mov    (&DWP(8,"esp"),$Zlh);
254         &mov    (&DWP(12,"esp"),$Zll);
255         &shr    ($Zll,20);
256         &and    ($Zll,0xf0);
257
258         if ($unroll) {
259                 &call   ("_x86_gmult_4bit_inner");
260         } else {
261                 &x86_loop(0);
262                 &mov    ($inp,&wparam(0));
263         }
264
265         &mov    (&DWP(12,$inp),$Zll);
266         &mov    (&DWP(8,$inp),$Zlh);
267         &mov    (&DWP(4,$inp),$Zhl);
268         &mov    (&DWP(0,$inp),$Zhh);
269         &stack_pop(16+4+1);
270 &function_end("gcm_gmult_4bit".$suffix);
271
272 &function_begin("gcm_ghash_4bit".$suffix);
273         &stack_push(16+4+1);                    # +1 for 64-bit alignment
274         &mov    ($Zll,&wparam(0));              # load Xi
275         &mov    ($Htbl,&wparam(1));             # load Htable
276         &mov    ($inp,&wparam(2));              # load in
277         &mov    ("ecx",&wparam(3));             # load len
278         &add    ("ecx",$inp);
279         &mov    (&wparam(3),"ecx");
280
281         &mov    ($Zhh,&DWP(0,$Zll));            # load Xi[16]
282         &mov    ($Zhl,&DWP(4,$Zll));
283         &mov    ($Zlh,&DWP(8,$Zll));
284         &mov    ($Zll,&DWP(12,$Zll));
285
286         &deposit_rem_4bit(16);
287
288     &set_label("x86_outer_loop",16);
289         &xor    ($Zll,&DWP(12,$inp));           # xor with input
290         &xor    ($Zlh,&DWP(8,$inp));
291         &xor    ($Zhl,&DWP(4,$inp));
292         &xor    ($Zhh,&DWP(0,$inp));
293         &mov    (&DWP(12,"esp"),$Zll);          # dump it on stack
294         &mov    (&DWP(8,"esp"),$Zlh);
295         &mov    (&DWP(4,"esp"),$Zhl);
296         &mov    (&DWP(0,"esp"),$Zhh);
297
298         &shr    ($Zll,20);
299         &and    ($Zll,0xf0);
300
301         if ($unroll) {
302                 &call   ("_x86_gmult_4bit_inner");
303         } else {
304                 &x86_loop(0);
305                 &mov    ($inp,&wparam(2));
306         }
307         &lea    ($inp,&DWP(16,$inp));
308         &cmp    ($inp,&wparam(3));
309         &mov    (&wparam(2),$inp)       if (!$unroll);
310         &jb     (&label("x86_outer_loop"));
311
312         &mov    ($inp,&wparam(0));      # load Xi
313         &mov    (&DWP(12,$inp),$Zll);
314         &mov    (&DWP(8,$inp),$Zlh);
315         &mov    (&DWP(4,$inp),$Zhl);
316         &mov    (&DWP(0,$inp),$Zhh);
317         &stack_pop(16+4+1);
318 &function_end("gcm_ghash_4bit".$suffix);
319 \f
320 if (!$x86only) {{{
321
322 &static_label("rem_4bit");
323
324 if (0) {{       # "May" MMX version is kept for reference...
325
326 $S=12;          # shift factor for rem_4bit
327
328 &function_begin_B("_mmx_gmult_4bit_inner");
329 # MMX version performs 3.5 times better on P4 (see comment in non-MMX
330 # routine for further details), 100% better on Opteron, ~70% better
331 # on Core2 and PIII... In other words effort is considered to be well
332 # spent... Since initial release the loop was unrolled in order to
333 # "liberate" register previously used as loop counter. Instead it's
334 # used to optimize critical path in 'Z.hi ^= rem_4bit[Z.lo&0xf]'.
335 # The path involves move of Z.lo from MMX to integer register,
336 # effective address calculation and finally merge of value to Z.hi.
337 # Reference to rem_4bit is scheduled so late that I had to >>4
338 # rem_4bit elements. This resulted in 20-45% procent improvement
339 # on contemporary ยต-archs.
340 {
341     my $cnt;
342     my $rem_4bit = "eax";
343     my @rem = ($Zhh,$Zll);
344     my $nhi = $Zhl;
345     my $nlo = $Zlh;
346
347     my ($Zlo,$Zhi) = ("mm0","mm1");
348     my $tmp = "mm2";
349
350         &xor    ($nlo,$nlo);    # avoid partial register stalls on PIII
351         &mov    ($nhi,$Zll);
352         &mov    (&LB($nlo),&LB($nhi));
353         &shl    (&LB($nlo),4);
354         &and    ($nhi,0xf0);
355         &movq   ($Zlo,&QWP(8,$Htbl,$nlo));
356         &movq   ($Zhi,&QWP(0,$Htbl,$nlo));
357         &movd   ($rem[0],$Zlo);
358
359         for ($cnt=28;$cnt>=-2;$cnt--) {
360             my $odd = $cnt&1;
361             my $nix = $odd ? $nlo : $nhi;
362
363                 &shl    (&LB($nlo),4)                   if ($odd);
364                 &psrlq  ($Zlo,4);
365                 &movq   ($tmp,$Zhi);
366                 &psrlq  ($Zhi,4);
367                 &pxor   ($Zlo,&QWP(8,$Htbl,$nix));
368                 &mov    (&LB($nlo),&BP($cnt/2,$inp))    if (!$odd && $cnt>=0);
369                 &psllq  ($tmp,60);
370                 &and    ($nhi,0xf0)                     if ($odd);
371                 &pxor   ($Zhi,&QWP(0,$rem_4bit,$rem[1],8)) if ($cnt<28);
372                 &and    ($rem[0],0xf);
373                 &pxor   ($Zhi,&QWP(0,$Htbl,$nix));
374                 &mov    ($nhi,$nlo)                     if (!$odd && $cnt>=0);
375                 &movd   ($rem[1],$Zlo);
376                 &pxor   ($Zlo,$tmp);
377
378                 push    (@rem,shift(@rem));             # "rotate" registers
379         }
380
381         &mov    ($inp,&DWP(4,$rem_4bit,$rem[1],8));     # last rem_4bit[rem]
382
383         &psrlq  ($Zlo,32);      # lower part of Zlo is already there
384         &movd   ($Zhl,$Zhi);
385         &psrlq  ($Zhi,32);
386         &movd   ($Zlh,$Zlo);
387         &movd   ($Zhh,$Zhi);
388         &shl    ($inp,4);       # compensate for rem_4bit[i] being >>4
389
390         &bswap  ($Zll);
391         &bswap  ($Zhl);
392         &bswap  ($Zlh);
393         &xor    ($Zhh,$inp);
394         &bswap  ($Zhh);
395
396         &ret    ();
397 }
398 &function_end_B("_mmx_gmult_4bit_inner");
399
400 &function_begin("gcm_gmult_4bit_mmx");
401         &mov    ($inp,&wparam(0));      # load Xi
402         &mov    ($Htbl,&wparam(1));     # load Htable
403
404         &call   (&label("pic_point"));
405         &set_label("pic_point");
406         &blindpop("eax");
407         &lea    ("eax",&DWP(&label("rem_4bit")."-".&label("pic_point"),"eax"));
408
409         &movz   ($Zll,&BP(15,$inp));
410
411         &call   ("_mmx_gmult_4bit_inner");
412
413         &mov    ($inp,&wparam(0));      # load Xi
414         &emms   ();
415         &mov    (&DWP(12,$inp),$Zll);
416         &mov    (&DWP(4,$inp),$Zhl);
417         &mov    (&DWP(8,$inp),$Zlh);
418         &mov    (&DWP(0,$inp),$Zhh);
419 &function_end("gcm_gmult_4bit_mmx");
420 \f
421 # Streamed version performs 20% better on P4, 7% on Opteron,
422 # 10% on Core2 and PIII...
423 &function_begin("gcm_ghash_4bit_mmx");
424         &mov    ($Zhh,&wparam(0));      # load Xi
425         &mov    ($Htbl,&wparam(1));     # load Htable
426         &mov    ($inp,&wparam(2));      # load in
427         &mov    ($Zlh,&wparam(3));      # load len
428
429         &call   (&label("pic_point"));
430         &set_label("pic_point");
431         &blindpop("eax");
432         &lea    ("eax",&DWP(&label("rem_4bit")."-".&label("pic_point"),"eax"));
433
434         &add    ($Zlh,$inp);
435         &mov    (&wparam(3),$Zlh);      # len to point at the end of input
436         &stack_push(4+1);               # +1 for stack alignment
437
438         &mov    ($Zll,&DWP(12,$Zhh));   # load Xi[16]
439         &mov    ($Zhl,&DWP(4,$Zhh));
440         &mov    ($Zlh,&DWP(8,$Zhh));
441         &mov    ($Zhh,&DWP(0,$Zhh));
442         &jmp    (&label("mmx_outer_loop"));
443
444     &set_label("mmx_outer_loop",16);
445         &xor    ($Zll,&DWP(12,$inp));
446         &xor    ($Zhl,&DWP(4,$inp));
447         &xor    ($Zlh,&DWP(8,$inp));
448         &xor    ($Zhh,&DWP(0,$inp));
449         &mov    (&wparam(2),$inp);
450         &mov    (&DWP(12,"esp"),$Zll);
451         &mov    (&DWP(4,"esp"),$Zhl);
452         &mov    (&DWP(8,"esp"),$Zlh);
453         &mov    (&DWP(0,"esp"),$Zhh);
454
455         &mov    ($inp,"esp");
456         &shr    ($Zll,24);
457
458         &call   ("_mmx_gmult_4bit_inner");
459
460         &mov    ($inp,&wparam(2));
461         &lea    ($inp,&DWP(16,$inp));
462         &cmp    ($inp,&wparam(3));
463         &jb     (&label("mmx_outer_loop"));
464
465         &mov    ($inp,&wparam(0));      # load Xi
466         &emms   ();
467         &mov    (&DWP(12,$inp),$Zll);
468         &mov    (&DWP(4,$inp),$Zhl);
469         &mov    (&DWP(8,$inp),$Zlh);
470         &mov    (&DWP(0,$inp),$Zhh);
471
472         &stack_pop(4+1);
473 &function_end("gcm_ghash_4bit_mmx");
474 \f
475 }} else {{      # "June" MMX version...
476                 # ... has slower "April" gcm_gmult_4bit_mmx with folded
477                 # loop. This is done to conserve code size...
478 $S=16;          # shift factor for rem_4bit
479
480 sub mmx_loop() {
481 # MMX version performs 2.8 times better on P4 (see comment in non-MMX
482 # routine for further details), 40% better on Opteron and Core2, 50%
483 # better on PIII... In other words effort is considered to be well
484 # spent...
485     my $inp = shift;
486     my $rem_4bit = shift;
487     my $cnt = $Zhh;
488     my $nhi = $Zhl;
489     my $nlo = $Zlh;
490     my $rem = $Zll;
491
492     my ($Zlo,$Zhi) = ("mm0","mm1");
493     my $tmp = "mm2";
494
495         &xor    ($nlo,$nlo);    # avoid partial register stalls on PIII
496         &mov    ($nhi,$Zll);
497         &mov    (&LB($nlo),&LB($nhi));
498         &mov    ($cnt,14);
499         &shl    (&LB($nlo),4);
500         &and    ($nhi,0xf0);
501         &movq   ($Zlo,&QWP(8,$Htbl,$nlo));
502         &movq   ($Zhi,&QWP(0,$Htbl,$nlo));
503         &movd   ($rem,$Zlo);
504         &jmp    (&label("mmx_loop"));
505
506     &set_label("mmx_loop",16);
507         &psrlq  ($Zlo,4);
508         &and    ($rem,0xf);
509         &movq   ($tmp,$Zhi);
510         &psrlq  ($Zhi,4);
511         &pxor   ($Zlo,&QWP(8,$Htbl,$nhi));
512         &mov    (&LB($nlo),&BP(0,$inp,$cnt));
513         &psllq  ($tmp,60);
514         &pxor   ($Zhi,&QWP(0,$rem_4bit,$rem,8));
515         &dec    ($cnt);
516         &movd   ($rem,$Zlo);
517         &pxor   ($Zhi,&QWP(0,$Htbl,$nhi));
518         &mov    ($nhi,$nlo);
519         &pxor   ($Zlo,$tmp);
520         &js     (&label("mmx_break"));
521
522         &shl    (&LB($nlo),4);
523         &and    ($rem,0xf);
524         &psrlq  ($Zlo,4);
525         &and    ($nhi,0xf0);
526         &movq   ($tmp,$Zhi);
527         &psrlq  ($Zhi,4);
528         &pxor   ($Zlo,&QWP(8,$Htbl,$nlo));
529         &psllq  ($tmp,60);
530         &pxor   ($Zhi,&QWP(0,$rem_4bit,$rem,8));
531         &movd   ($rem,$Zlo);
532         &pxor   ($Zhi,&QWP(0,$Htbl,$nlo));
533         &pxor   ($Zlo,$tmp);
534         &jmp    (&label("mmx_loop"));
535
536     &set_label("mmx_break",16);
537         &shl    (&LB($nlo),4);
538         &and    ($rem,0xf);
539         &psrlq  ($Zlo,4);
540         &and    ($nhi,0xf0);
541         &movq   ($tmp,$Zhi);
542         &psrlq  ($Zhi,4);
543         &pxor   ($Zlo,&QWP(8,$Htbl,$nlo));
544         &psllq  ($tmp,60);
545         &pxor   ($Zhi,&QWP(0,$rem_4bit,$rem,8));
546         &movd   ($rem,$Zlo);
547         &pxor   ($Zhi,&QWP(0,$Htbl,$nlo));
548         &pxor   ($Zlo,$tmp);
549
550         &psrlq  ($Zlo,4);
551         &and    ($rem,0xf);
552         &movq   ($tmp,$Zhi);
553         &psrlq  ($Zhi,4);
554         &pxor   ($Zlo,&QWP(8,$Htbl,$nhi));
555         &psllq  ($tmp,60);
556         &pxor   ($Zhi,&QWP(0,$rem_4bit,$rem,8));
557         &movd   ($rem,$Zlo);
558         &pxor   ($Zhi,&QWP(0,$Htbl,$nhi));
559         &pxor   ($Zlo,$tmp);
560
561         &psrlq  ($Zlo,32);      # lower part of Zlo is already there
562         &movd   ($Zhl,$Zhi);
563         &psrlq  ($Zhi,32);
564         &movd   ($Zlh,$Zlo);
565         &movd   ($Zhh,$Zhi);
566
567         &bswap  ($Zll);
568         &bswap  ($Zhl);
569         &bswap  ($Zlh);
570         &bswap  ($Zhh);
571 }
572
573 &function_begin("gcm_gmult_4bit_mmx");
574         &mov    ($inp,&wparam(0));      # load Xi
575         &mov    ($Htbl,&wparam(1));     # load Htable
576
577         &call   (&label("pic_point"));
578         &set_label("pic_point");
579         &blindpop("eax");
580         &lea    ("eax",&DWP(&label("rem_4bit")."-".&label("pic_point"),"eax"));
581
582         &movz   ($Zll,&BP(15,$inp));
583
584         &mmx_loop($inp,"eax");
585
586         &emms   ();
587         &mov    (&DWP(12,$inp),$Zll);
588         &mov    (&DWP(4,$inp),$Zhl);
589         &mov    (&DWP(8,$inp),$Zlh);
590         &mov    (&DWP(0,$inp),$Zhh);
591 &function_end("gcm_gmult_4bit_mmx");
592 \f
593 ######################################################################
594 # Below subroutine is "528B" variant of "4-bit" GCM GHASH function
595 # (see gcm128.c for details). It provides further 20-40% performance
596 # improvement over above mentioned "May" version.
597
598 &static_label("rem_8bit");
599
600 &function_begin("gcm_ghash_4bit_mmx");
601 { my ($Zlo,$Zhi) = ("mm7","mm6");
602   my $rem_8bit = "esi";
603   my $Htbl = "ebx";
604
605     # parameter block
606     &mov        ("eax",&wparam(0));             # Xi
607     &mov        ("ebx",&wparam(1));             # Htable
608     &mov        ("ecx",&wparam(2));             # inp
609     &mov        ("edx",&wparam(3));             # len
610     &mov        ("ebp","esp");                  # original %esp
611     &call       (&label("pic_point"));
612     &set_label  ("pic_point");
613     &blindpop   ($rem_8bit);
614     &lea        ($rem_8bit,&DWP(&label("rem_8bit")."-".&label("pic_point"),$rem_8bit));
615
616     &sub        ("esp",512+16+16);              # allocate stack frame...
617     &and        ("esp",-64);                    # ...and align it
618     &sub        ("esp",16);                     # place for (u8)(H[]<<4)
619
620     &add        ("edx","ecx");                  # pointer to the end of input
621     &mov        (&DWP(528+16+0,"esp"),"eax");   # save Xi
622     &mov        (&DWP(528+16+8,"esp"),"edx");   # save inp+len
623     &mov        (&DWP(528+16+12,"esp"),"ebp");  # save original %esp
624
625     { my @lo  = ("mm0","mm1","mm2");
626       my @hi  = ("mm3","mm4","mm5");
627       my @tmp = ("mm6","mm7");
628       my $off1=0,$off2=0,$i;
629
630       &add      ($Htbl,128);                    # optimize for size
631       &lea      ("edi",&DWP(16+128,"esp"));
632       &lea      ("ebp",&DWP(16+256+128,"esp"));
633
634       # decompose Htable (low and high parts are kept separately),
635       # generate Htable[]>>4, (u8)(Htable[]<<4), save to stack...
636       for ($i=0;$i<18;$i++) {
637
638         &mov    ("edx",&DWP(16*$i+8-128,$Htbl))         if ($i<16);
639         &movq   ($lo[0],&QWP(16*$i+8-128,$Htbl))        if ($i<16);
640         &psllq  ($tmp[1],60)                            if ($i>1);
641         &movq   ($hi[0],&QWP(16*$i+0-128,$Htbl))        if ($i<16);
642         &por    ($lo[2],$tmp[1])                        if ($i>1);
643         &movq   (&QWP($off1-128,"edi"),$lo[1])          if ($i>0 && $i<17);
644         &psrlq  ($lo[1],4)                              if ($i>0 && $i<17);
645         &movq   (&QWP($off1,"edi"),$hi[1])              if ($i>0 && $i<17);
646         &movq   ($tmp[0],$hi[1])                        if ($i>0 && $i<17);
647         &movq   (&QWP($off2-128,"ebp"),$lo[2])          if ($i>1);
648         &psrlq  ($hi[1],4)                              if ($i>0 && $i<17);
649         &movq   (&QWP($off2,"ebp"),$hi[2])              if ($i>1);
650         &shl    ("edx",4)                               if ($i<16);
651         &mov    (&BP($i,"esp"),&LB("edx"))              if ($i<16);
652
653         unshift (@lo,pop(@lo));                 # "rotate" registers
654         unshift (@hi,pop(@hi));
655         unshift (@tmp,pop(@tmp));
656         $off1 += 8      if ($i>0);
657         $off2 += 8      if ($i>1);
658       }
659     }
660
661     &movq       ($Zhi,&QWP(0,"eax"));
662     &mov        ("ebx",&DWP(8,"eax"));
663     &mov        ("edx",&DWP(12,"eax"));         # load Xi
664
665 &set_label("outer",16);
666   { my $nlo = "eax";
667     my $dat = "edx";
668     my @nhi = ("edi","ebp");
669     my @rem = ("ebx","ecx");
670     my @red = ("mm0","mm1","mm2");
671     my $tmp = "mm3";
672
673     &xor        ($dat,&DWP(12,"ecx"));          # merge input data
674     &xor        ("ebx",&DWP(8,"ecx"));
675     &pxor       ($Zhi,&QWP(0,"ecx"));
676     &lea        ("ecx",&DWP(16,"ecx"));         # inp+=16
677     #&mov       (&DWP(528+12,"esp"),$dat);      # save inp^Xi
678     &mov        (&DWP(528+8,"esp"),"ebx");
679     &movq       (&QWP(528+0,"esp"),$Zhi);
680     &mov        (&DWP(528+16+4,"esp"),"ecx");   # save inp
681
682     &xor        ($nlo,$nlo);
683     &rol        ($dat,8);
684     &mov        (&LB($nlo),&LB($dat));
685     &mov        ($nhi[1],$nlo);
686     &and        (&LB($nlo),0x0f);
687     &shr        ($nhi[1],4);
688     &pxor       ($red[0],$red[0]);
689     &rol        ($dat,8);                       # next byte
690     &pxor       ($red[1],$red[1]);
691     &pxor       ($red[2],$red[2]);
692
693     # Just like in "May" verson modulo-schedule for critical path in
694     # 'Z.hi ^= rem_8bit[Z.lo&0xff^((u8)H[nhi]<<4)]<<48'. Final 'pxor'
695     # is scheduled so late that rem_8bit[] has to be shifted *right*
696     # by 16, which is why last argument to pinsrw is 2, which
697     # corresponds to <<32=<<48>>16...
698     for ($j=11,$i=0;$i<15;$i++) {
699
700       if ($i>0) {
701         &pxor   ($Zlo,&QWP(16,"esp",$nlo,8));           # Z^=H[nlo]
702         &rol    ($dat,8);                               # next byte
703         &pxor   ($Zhi,&QWP(16+128,"esp",$nlo,8));
704
705         &pxor   ($Zlo,$tmp);
706         &pxor   ($Zhi,&QWP(16+256+128,"esp",$nhi[0],8));
707         &xor    (&LB($rem[1]),&BP(0,"esp",$nhi[0]));    # rem^(H[nhi]<<4)
708       } else {
709         &movq   ($Zlo,&QWP(16,"esp",$nlo,8));
710         &movq   ($Zhi,&QWP(16+128,"esp",$nlo,8));
711       }
712
713         &mov    (&LB($nlo),&LB($dat));
714         &mov    ($dat,&DWP(528+$j,"esp"))               if (--$j%4==0);
715
716         &movd   ($rem[0],$Zlo);
717         &movz   ($rem[1],&LB($rem[1]))                  if ($i>0);
718         &psrlq  ($Zlo,8);                               # Z>>=8
719
720         &movq   ($tmp,$Zhi);
721         &mov    ($nhi[0],$nlo);
722         &psrlq  ($Zhi,8);
723
724         &pxor   ($Zlo,&QWP(16+256+0,"esp",$nhi[1],8));  # Z^=H[nhi]>>4
725         &and    (&LB($nlo),0x0f);
726         &psllq  ($tmp,56);
727
728         &pxor   ($Zhi,$red[1])                          if ($i>1);
729         &shr    ($nhi[0],4);
730         &pinsrw ($red[0],&WP(0,$rem_8bit,$rem[1],2),2)  if ($i>0);
731
732         unshift (@red,pop(@red));                       # "rotate" registers
733         unshift (@rem,pop(@rem));
734         unshift (@nhi,pop(@nhi));
735     }
736
737     &pxor       ($Zlo,&QWP(16,"esp",$nlo,8));           # Z^=H[nlo]
738     &pxor       ($Zhi,&QWP(16+128,"esp",$nlo,8));
739     &xor        (&LB($rem[1]),&BP(0,"esp",$nhi[0]));    # rem^(H[nhi]<<4)
740
741     &pxor       ($Zlo,$tmp);
742     &pxor       ($Zhi,&QWP(16+256+128,"esp",$nhi[0],8));
743     &movz       ($rem[1],&LB($rem[1]));
744
745     &pxor       ($red[2],$red[2]);                      # clear 2nd word
746     &psllq      ($red[1],4);
747
748     &movd       ($rem[0],$Zlo);
749     &psrlq      ($Zlo,4);                               # Z>>=4
750
751     &movq       ($tmp,$Zhi);
752     &psrlq      ($Zhi,4);
753     &shl        ($rem[0],4);                            # rem<<4
754
755     &pxor       ($Zlo,&QWP(16,"esp",$nhi[1],8));        # Z^=H[nhi]
756     &psllq      ($tmp,60);
757     &movz       ($rem[0],&LB($rem[0]));
758
759     &pxor       ($Zlo,$tmp);
760     &pxor       ($Zhi,&QWP(16+128,"esp",$nhi[1],8));
761
762     &pinsrw     ($red[0],&WP(0,$rem_8bit,$rem[1],2),2);
763     &pxor       ($Zhi,$red[1]);
764
765     &movd       ($dat,$Zlo);
766     &pinsrw     ($red[2],&WP(0,$rem_8bit,$rem[0],2),3); # last is <<48
767
768     &psllq      ($red[0],12);                           # correct by <<16>>4
769     &pxor       ($Zhi,$red[0]);
770     &psrlq      ($Zlo,32);
771     &pxor       ($Zhi,$red[2]);
772
773     &mov        ("ecx",&DWP(528+16+4,"esp"));   # restore inp
774     &movd       ("ebx",$Zlo);
775     &movq       ($tmp,$Zhi);                    # 01234567
776     &psllw      ($Zhi,8);                       # 1.3.5.7.
777     &psrlw      ($tmp,8);                       # .0.2.4.6
778     &por        ($Zhi,$tmp);                    # 10325476
779     &bswap      ($dat);
780     &pshufw     ($Zhi,$Zhi,0b00011011);         # 76543210
781     &bswap      ("ebx");
782     
783     &cmp        ("ecx",&DWP(528+16+8,"esp"));   # are we done?
784     &jne        (&label("outer"));
785   }
786
787     &mov        ("eax",&DWP(528+16+0,"esp"));   # restore Xi
788     &mov        (&DWP(12,"eax"),"edx");
789     &mov        (&DWP(8,"eax"),"ebx");
790     &movq       (&QWP(0,"eax"),$Zhi);
791
792     &mov        ("esp",&DWP(528+16+12,"esp"));  # restore original %esp
793     &emms       ();
794 }
795 &function_end("gcm_ghash_4bit_mmx");
796 }}
797 \f
798 if ($sse2) {{
799 ######################################################################
800 # PCLMULQDQ version.
801
802 $Xip="eax";
803 $Htbl="edx";
804 $const="ecx";
805 $inp="esi";
806 $len="ebx";
807
808 ($Xi,$Xhi)=("xmm0","xmm1");     $Hkey="xmm2";
809 ($T1,$T2,$T3)=("xmm3","xmm4","xmm5");
810 ($Xn,$Xhn)=("xmm6","xmm7");
811
812 &static_label("bswap");
813
814 sub pclmulqdq
815 { my($dst,$src,$imm)=@_;
816     if ("$dst:$src" =~ /xmm([0-7]):xmm([0-7])/)
817     {   &data_byte(0x66,0x0f,0x3a,0x44,0xc0|($1<<3)|$2,$imm);   }
818 }
819
820 sub clmul64x64_T2 {     # minimal "register" pressure
821 my ($Xhi,$Xi,$Hkey)=@_;
822
823         &movdqa         ($Xhi,$Xi);             #
824         &pshufd         ($T1,$Xi,0b01001110);
825         &pshufd         ($T2,$Hkey,0b01001110);
826         &pxor           ($T1,$Xi);              #
827         &pxor           ($T2,$Hkey);
828
829         &pclmulqdq      ($Xi,$Hkey,0x00);       #######
830         &pclmulqdq      ($Xhi,$Hkey,0x11);      #######
831         &pclmulqdq      ($T1,$T2,0x00);         #######
832         &pxor           ($T1,$Xi);              #
833         &pxor           ($T1,$Xhi);             #
834
835         &movdqa         ($T2,$T1);              #
836         &psrldq         ($T1,8);
837         &pslldq         ($T2,8);                #
838         &pxor           ($Xhi,$T1);
839         &pxor           ($Xi,$T2);              #
840 }
841
842 sub clmul64x64_T3 {
843 # Even though this subroutine offers visually better ILP, it
844 # was empirically found to be a tad slower than above version.
845 # At least in gcm_ghash_clmul context. But it's just as well,
846 # because loop modulo-scheduling is possible only thanks to
847 # minimized "register" pressure...
848 my ($Xhi,$Xi,$Hkey)=@_;
849
850         &movdqa         ($T1,$Xi);              #
851         &movdqa         ($Xhi,$Xi);
852         &pclmulqdq      ($Xi,$Hkey,0x00);       #######
853         &pclmulqdq      ($Xhi,$Hkey,0x11);      #######
854         &pshufd         ($T2,$T1,0b01001110);   #
855         &pshufd         ($T3,$Hkey,0b01001110);
856         &pxor           ($T2,$T1);              #
857         &pxor           ($T3,$Hkey);
858         &pclmulqdq      ($T2,$T3,0x00);         #######
859         &pxor           ($T2,$Xi);              #
860         &pxor           ($T2,$Xhi);             #
861
862         &movdqa         ($T3,$T2);              #
863         &psrldq         ($T2,8);
864         &pslldq         ($T3,8);                #
865         &pxor           ($Xhi,$T2);
866         &pxor           ($Xi,$T3);              #
867 }
868 \f
869 if (1) {                # Algorithm 9 with <<1 twist.
870                         # Reduction is shorter and uses only two
871                         # temporary registers, which makes it better
872                         # candidate for interleaving with 64x64
873                         # multiplication. Pre-modulo-scheduled loop
874                         # was found to be ~20% faster than Algorithm 5
875                         # below. Algorithm 9 was therefore chosen for
876                         # further optimization...
877
878 sub reduction_alg9 {    # 17/13 times faster than Intel version
879 my ($Xhi,$Xi) = @_;
880
881         # 1st phase
882         &movdqa         ($T1,$Xi)               #
883         &psllq          ($Xi,1);
884         &pxor           ($Xi,$T1);              #
885         &psllq          ($Xi,5);                #
886         &pxor           ($Xi,$T1);              #
887         &psllq          ($Xi,57);               #
888         &movdqa         ($T2,$Xi);              #
889         &pslldq         ($Xi,8);
890         &psrldq         ($T2,8);                #
891         &pxor           ($Xi,$T1);
892         &pxor           ($Xhi,$T2);             #
893
894         # 2nd phase
895         &movdqa         ($T2,$Xi);
896         &psrlq          ($Xi,5);
897         &pxor           ($Xi,$T2);              #
898         &psrlq          ($Xi,1);                #
899         &pxor           ($Xi,$T2);              #
900         &pxor           ($T2,$Xhi);
901         &psrlq          ($Xi,1);                #
902         &pxor           ($Xi,$T2);              #
903 }
904
905 &function_begin_B("gcm_init_clmul");
906         &mov            ($Htbl,&wparam(0));
907         &mov            ($Xip,&wparam(1));
908
909         &call           (&label("pic"));
910 &set_label("pic");
911         &blindpop       ($const);
912         &lea            ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
913
914         &movdqu         ($Hkey,&QWP(0,$Xip));
915         &pshufd         ($Hkey,$Hkey,0b01001110);# dword swap
916
917         # <<1 twist
918         &pshufd         ($T2,$Hkey,0b11111111); # broadcast uppermost dword
919         &movdqa         ($T1,$Hkey);
920         &psllq          ($Hkey,1);
921         &pxor           ($T3,$T3);              #
922         &psrlq          ($T1,63);
923         &pcmpgtd        ($T3,$T2);              # broadcast carry bit
924         &pslldq         ($T1,8);
925         &por            ($Hkey,$T1);            # H<<=1
926
927         # magic reduction
928         &pand           ($T3,&QWP(16,$const));  # 0x1c2_polynomial
929         &pxor           ($Hkey,$T3);            # if(carry) H^=0x1c2_polynomial
930
931         # calculate H^2
932         &movdqa         ($Xi,$Hkey);
933         &clmul64x64_T2  ($Xhi,$Xi,$Hkey);
934         &reduction_alg9 ($Xhi,$Xi);
935
936         &movdqu         (&QWP(0,$Htbl),$Hkey);  # save H
937         &movdqu         (&QWP(16,$Htbl),$Xi);   # save H^2
938
939         &ret            ();
940 &function_end_B("gcm_init_clmul");
941
942 &function_begin_B("gcm_gmult_clmul");
943         &mov            ($Xip,&wparam(0));
944         &mov            ($Htbl,&wparam(1));
945
946         &call           (&label("pic"));
947 &set_label("pic");
948         &blindpop       ($const);
949         &lea            ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
950
951         &movdqu         ($Xi,&QWP(0,$Xip));
952         &movdqa         ($T3,&QWP(0,$const));
953         &movdqu         ($Hkey,&QWP(0,$Htbl));
954         &pshufb         ($Xi,$T3);
955
956         &clmul64x64_T2  ($Xhi,$Xi,$Hkey);
957         &reduction_alg9 ($Xhi,$Xi);
958
959         &pshufb         ($Xi,$T3);
960         &movdqu         (&QWP(0,$Xip),$Xi);
961
962         &ret    ();
963 &function_end_B("gcm_gmult_clmul");
964
965 &function_begin("gcm_ghash_clmul");
966         &mov            ($Xip,&wparam(0));
967         &mov            ($Htbl,&wparam(1));
968         &mov            ($inp,&wparam(2));
969         &mov            ($len,&wparam(3));
970
971         &call           (&label("pic"));
972 &set_label("pic");
973         &blindpop       ($const);
974         &lea            ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
975
976         &movdqu         ($Xi,&QWP(0,$Xip));
977         &movdqa         ($T3,&QWP(0,$const));
978         &movdqu         ($Hkey,&QWP(0,$Htbl));
979         &pshufb         ($Xi,$T3);
980
981         &sub            ($len,0x10);
982         &jz             (&label("odd_tail"));
983
984         #######
985         # Xi+2 =[H*(Ii+1 + Xi+1)] mod P =
986         #       [(H*Ii+1) + (H*Xi+1)] mod P =
987         #       [(H*Ii+1) + H^2*(Ii+Xi)] mod P
988         #
989         &movdqu         ($T1,&QWP(0,$inp));     # Ii
990         &movdqu         ($Xn,&QWP(16,$inp));    # Ii+1
991         &pshufb         ($T1,$T3);
992         &pshufb         ($Xn,$T3);
993         &pxor           ($Xi,$T1);              # Ii+Xi
994
995         &clmul64x64_T2  ($Xhn,$Xn,$Hkey);       # H*Ii+1
996         &movdqu         ($Hkey,&QWP(16,$Htbl)); # load H^2
997
998         &lea            ($inp,&DWP(32,$inp));   # i+=2
999         &sub            ($len,0x20);
1000         &jbe            (&label("even_tail"));
1001
1002 &set_label("mod_loop");
1003         &clmul64x64_T2  ($Xhi,$Xi,$Hkey);       # H^2*(Ii+Xi)
1004         &movdqu         ($T1,&QWP(0,$inp));     # Ii
1005         &movdqu         ($Hkey,&QWP(0,$Htbl));  # load H
1006
1007         &pxor           ($Xi,$Xn);              # (H*Ii+1) + H^2*(Ii+Xi)
1008         &pxor           ($Xhi,$Xhn);
1009
1010         &movdqu         ($Xn,&QWP(16,$inp));    # Ii+1
1011         &pshufb         ($T1,$T3);
1012         &pshufb         ($Xn,$T3);
1013
1014         &movdqa         ($T3,$Xn);              #&clmul64x64_TX ($Xhn,$Xn,$Hkey); H*Ii+1
1015         &movdqa         ($Xhn,$Xn);
1016          &pxor          ($Xhi,$T1);             # "Ii+Xi", consume early
1017
1018           &movdqa       ($T1,$Xi)               #&reduction_alg9($Xhi,$Xi); 1st phase
1019           &psllq        ($Xi,1);
1020           &pxor         ($Xi,$T1);              #
1021           &psllq        ($Xi,5);                #
1022           &pxor         ($Xi,$T1);              #
1023         &pclmulqdq      ($Xn,$Hkey,0x00);       #######
1024           &psllq        ($Xi,57);               #
1025           &movdqa       ($T2,$Xi);              #
1026           &pslldq       ($Xi,8);
1027           &psrldq       ($T2,8);                #       
1028           &pxor         ($Xi,$T1);
1029         &pshufd         ($T1,$T3,0b01001110);
1030           &pxor         ($Xhi,$T2);             #
1031         &pxor           ($T1,$T3);
1032         &pshufd         ($T3,$Hkey,0b01001110);
1033         &pxor           ($T3,$Hkey);            #
1034
1035         &pclmulqdq      ($Xhn,$Hkey,0x11);      #######
1036           &movdqa       ($T2,$Xi);              # 2nd phase
1037           &psrlq        ($Xi,5);
1038           &pxor         ($Xi,$T2);              #
1039           &psrlq        ($Xi,1);                #
1040           &pxor         ($Xi,$T2);              #
1041           &pxor         ($T2,$Xhi);
1042           &psrlq        ($Xi,1);                #
1043           &pxor         ($Xi,$T2);              #
1044
1045         &pclmulqdq      ($T1,$T3,0x00);         #######
1046         &movdqu         ($Hkey,&QWP(16,$Htbl)); # load H^2
1047         &pxor           ($T1,$Xn);              #
1048         &pxor           ($T1,$Xhn);             #
1049
1050         &movdqa         ($T3,$T1);              #
1051         &psrldq         ($T1,8);
1052         &pslldq         ($T3,8);                #
1053         &pxor           ($Xhn,$T1);
1054         &pxor           ($Xn,$T3);              #
1055         &movdqa         ($T3,&QWP(0,$const));
1056
1057         &lea            ($inp,&DWP(32,$inp));
1058         &sub            ($len,0x20);
1059         &ja             (&label("mod_loop"));
1060
1061 &set_label("even_tail");
1062         &clmul64x64_T2  ($Xhi,$Xi,$Hkey);       # H^2*(Ii+Xi)
1063
1064         &pxor           ($Xi,$Xn);              # (H*Ii+1) + H^2*(Ii+Xi)
1065         &pxor           ($Xhi,$Xhn);
1066
1067         &reduction_alg9 ($Xhi,$Xi);
1068
1069         &test           ($len,$len);
1070         &jnz            (&label("done"));
1071
1072         &movdqu         ($Hkey,&QWP(0,$Htbl));  # load H
1073 &set_label("odd_tail");
1074         &movdqu         ($T1,&QWP(0,$inp));     # Ii
1075         &pshufb         ($T1,$T3);
1076         &pxor           ($Xi,$T1);              # Ii+Xi
1077
1078         &clmul64x64_T2  ($Xhi,$Xi,$Hkey);       # H*(Ii+Xi)
1079         &reduction_alg9 ($Xhi,$Xi);
1080
1081 &set_label("done");
1082         &pshufb         ($Xi,$T3);
1083         &movdqu         (&QWP(0,$Xip),$Xi);
1084 &function_end("gcm_ghash_clmul");
1085 \f
1086 } else {                # Algorith 5. Kept for reference purposes.
1087
1088 sub reduction_alg5 {    # 19/16 times faster than Intel version
1089 my ($Xhi,$Xi)=@_;
1090
1091         # <<1
1092         &movdqa         ($T1,$Xi);              #
1093         &movdqa         ($T2,$Xhi);
1094         &pslld          ($Xi,1);
1095         &pslld          ($Xhi,1);               #
1096         &psrld          ($T1,31);
1097         &psrld          ($T2,31);               #
1098         &movdqa         ($T3,$T1);
1099         &pslldq         ($T1,4);
1100         &psrldq         ($T3,12);               #
1101         &pslldq         ($T2,4);
1102         &por            ($Xhi,$T3);             #
1103         &por            ($Xi,$T1);
1104         &por            ($Xhi,$T2);             #
1105
1106         # 1st phase
1107         &movdqa         ($T1,$Xi);
1108         &movdqa         ($T2,$Xi);
1109         &movdqa         ($T3,$Xi);              #
1110         &pslld          ($T1,31);
1111         &pslld          ($T2,30);
1112         &pslld          ($Xi,25);               #
1113         &pxor           ($T1,$T2);
1114         &pxor           ($T1,$Xi);              #
1115         &movdqa         ($T2,$T1);              #
1116         &pslldq         ($T1,12);
1117         &psrldq         ($T2,4);                #
1118         &pxor           ($T3,$T1);
1119
1120         # 2nd phase
1121         &pxor           ($Xhi,$T3);             #
1122         &movdqa         ($Xi,$T3);
1123         &movdqa         ($T1,$T3);
1124         &psrld          ($Xi,1);                #
1125         &psrld          ($T1,2);
1126         &psrld          ($T3,7);                #
1127         &pxor           ($Xi,$T1);
1128         &pxor           ($Xhi,$T2);
1129         &pxor           ($Xi,$T3);              #
1130         &pxor           ($Xi,$Xhi);             #
1131 }
1132
1133 &function_begin_B("gcm_init_clmul");
1134         &mov            ($Htbl,&wparam(0));
1135         &mov            ($Xip,&wparam(1));
1136
1137         &call           (&label("pic"));
1138 &set_label("pic");
1139         &blindpop       ($const);
1140         &lea            ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
1141
1142         &movdqu         ($Hkey,&QWP(0,$Xip));
1143         &pshufd         ($Hkey,$Hkey,0b01001110);# dword swap
1144
1145         # calculate H^2
1146         &movdqa         ($Xi,$Hkey);
1147         &clmul64x64_T3  ($Xhi,$Xi,$Hkey);
1148         &reduction_alg5 ($Xhi,$Xi);
1149
1150         &movdqu         (&QWP(0,$Htbl),$Hkey);  # save H
1151         &movdqu         (&QWP(16,$Htbl),$Xi);   # save H^2
1152
1153         &ret            ();
1154 &function_end_B("gcm_init_clmul");
1155
1156 &function_begin_B("gcm_gmult_clmul");
1157         &mov            ($Xip,&wparam(0));
1158         &mov            ($Htbl,&wparam(1));
1159
1160         &call           (&label("pic"));
1161 &set_label("pic");
1162         &blindpop       ($const);
1163         &lea            ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
1164
1165         &movdqu         ($Xi,&QWP(0,$Xip));
1166         &movdqa         ($Xn,&QWP(0,$const));
1167         &movdqu         ($Hkey,&QWP(0,$Htbl));
1168         &pshufb         ($Xi,$Xn);
1169
1170         &clmul64x64_T3  ($Xhi,$Xi,$Hkey);
1171         &reduction_alg5 ($Xhi,$Xi);
1172
1173         &pshufb         ($Xi,$Xn);
1174         &movdqu         (&QWP(0,$Xip),$Xi);
1175
1176         &ret    ();
1177 &function_end_B("gcm_gmult_clmul");
1178
1179 &function_begin("gcm_ghash_clmul");
1180         &mov            ($Xip,&wparam(0));
1181         &mov            ($Htbl,&wparam(1));
1182         &mov            ($inp,&wparam(2));
1183         &mov            ($len,&wparam(3));
1184
1185         &call           (&label("pic"));
1186 &set_label("pic");
1187         &blindpop       ($const);
1188         &lea            ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
1189
1190         &movdqu         ($Xi,&QWP(0,$Xip));
1191         &movdqa         ($T3,&QWP(0,$const));
1192         &movdqu         ($Hkey,&QWP(0,$Htbl));
1193         &pshufb         ($Xi,$T3);
1194
1195         &sub            ($len,0x10);
1196         &jz             (&label("odd_tail"));
1197
1198         #######
1199         # Xi+2 =[H*(Ii+1 + Xi+1)] mod P =
1200         #       [(H*Ii+1) + (H*Xi+1)] mod P =
1201         #       [(H*Ii+1) + H^2*(Ii+Xi)] mod P
1202         #
1203         &movdqu         ($T1,&QWP(0,$inp));     # Ii
1204         &movdqu         ($Xn,&QWP(16,$inp));    # Ii+1
1205         &pshufb         ($T1,$T3);
1206         &pshufb         ($Xn,$T3);
1207         &pxor           ($Xi,$T1);              # Ii+Xi
1208
1209         &clmul64x64_T3  ($Xhn,$Xn,$Hkey);       # H*Ii+1
1210         &movdqu         ($Hkey,&QWP(16,$Htbl)); # load H^2
1211
1212         &sub            ($len,0x20);
1213         &lea            ($inp,&DWP(32,$inp));   # i+=2
1214         &jbe            (&label("even_tail"));
1215
1216 &set_label("mod_loop");
1217         &clmul64x64_T3  ($Xhi,$Xi,$Hkey);       # H^2*(Ii+Xi)
1218         &movdqu         ($Hkey,&QWP(0,$Htbl));  # load H
1219
1220         &pxor           ($Xi,$Xn);              # (H*Ii+1) + H^2*(Ii+Xi)
1221         &pxor           ($Xhi,$Xhn);
1222
1223         &reduction_alg5 ($Xhi,$Xi);
1224
1225         #######
1226         &movdqa         ($T3,&QWP(0,$const));
1227         &movdqu         ($T1,&QWP(0,$inp));     # Ii
1228         &movdqu         ($Xn,&QWP(16,$inp));    # Ii+1
1229         &pshufb         ($T1,$T3);
1230         &pshufb         ($Xn,$T3);
1231         &pxor           ($Xi,$T1);              # Ii+Xi
1232
1233         &clmul64x64_T3  ($Xhn,$Xn,$Hkey);       # H*Ii+1
1234         &movdqu         ($Hkey,&QWP(16,$Htbl)); # load H^2
1235
1236         &sub            ($len,0x20);
1237         &lea            ($inp,&DWP(32,$inp));
1238         &ja             (&label("mod_loop"));
1239
1240 &set_label("even_tail");
1241         &clmul64x64_T3  ($Xhi,$Xi,$Hkey);       # H^2*(Ii+Xi)
1242
1243         &pxor           ($Xi,$Xn);              # (H*Ii+1) + H^2*(Ii+Xi)
1244         &pxor           ($Xhi,$Xhn);
1245
1246         &reduction_alg5 ($Xhi,$Xi);
1247
1248         &movdqa         ($T3,&QWP(0,$const));
1249         &test           ($len,$len);
1250         &jnz            (&label("done"));
1251
1252         &movdqu         ($Hkey,&QWP(0,$Htbl));  # load H
1253 &set_label("odd_tail");
1254         &movdqu         ($T1,&QWP(0,$inp));     # Ii
1255         &pshufb         ($T1,$T3);
1256         &pxor           ($Xi,$T1);              # Ii+Xi
1257
1258         &clmul64x64_T3  ($Xhi,$Xi,$Hkey);       # H*(Ii+Xi)
1259         &reduction_alg5 ($Xhi,$Xi);
1260
1261         &movdqa         ($T3,&QWP(0,$const));
1262 &set_label("done");
1263         &pshufb         ($Xi,$T3);
1264         &movdqu         (&QWP(0,$Xip),$Xi);
1265 &function_end("gcm_ghash_clmul");
1266
1267 }
1268 \f
1269 &set_label("bswap",64);
1270         &data_byte(15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0);
1271         &data_byte(1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0xc2); # 0x1c2_polynomial
1272 }}      # $sse2
1273
1274 &set_label("rem_4bit",64);
1275         &data_word(0,0x0000<<$S,0,0x1C20<<$S,0,0x3840<<$S,0,0x2460<<$S);
1276         &data_word(0,0x7080<<$S,0,0x6CA0<<$S,0,0x48C0<<$S,0,0x54E0<<$S);
1277         &data_word(0,0xE100<<$S,0,0xFD20<<$S,0,0xD940<<$S,0,0xC560<<$S);
1278         &data_word(0,0x9180<<$S,0,0x8DA0<<$S,0,0xA9C0<<$S,0,0xB5E0<<$S);
1279 &set_label("rem_8bit",64);
1280         &data_short(0x0000,0x01C2,0x0384,0x0246,0x0708,0x06CA,0x048C,0x054E);
1281         &data_short(0x0E10,0x0FD2,0x0D94,0x0C56,0x0918,0x08DA,0x0A9C,0x0B5E);
1282         &data_short(0x1C20,0x1DE2,0x1FA4,0x1E66,0x1B28,0x1AEA,0x18AC,0x196E);
1283         &data_short(0x1230,0x13F2,0x11B4,0x1076,0x1538,0x14FA,0x16BC,0x177E);
1284         &data_short(0x3840,0x3982,0x3BC4,0x3A06,0x3F48,0x3E8A,0x3CCC,0x3D0E);
1285         &data_short(0x3650,0x3792,0x35D4,0x3416,0x3158,0x309A,0x32DC,0x331E);
1286         &data_short(0x2460,0x25A2,0x27E4,0x2626,0x2368,0x22AA,0x20EC,0x212E);
1287         &data_short(0x2A70,0x2BB2,0x29F4,0x2836,0x2D78,0x2CBA,0x2EFC,0x2F3E);
1288         &data_short(0x7080,0x7142,0x7304,0x72C6,0x7788,0x764A,0x740C,0x75CE);
1289         &data_short(0x7E90,0x7F52,0x7D14,0x7CD6,0x7998,0x785A,0x7A1C,0x7BDE);
1290         &data_short(0x6CA0,0x6D62,0x6F24,0x6EE6,0x6BA8,0x6A6A,0x682C,0x69EE);
1291         &data_short(0x62B0,0x6372,0x6134,0x60F6,0x65B8,0x647A,0x663C,0x67FE);
1292         &data_short(0x48C0,0x4902,0x4B44,0x4A86,0x4FC8,0x4E0A,0x4C4C,0x4D8E);
1293         &data_short(0x46D0,0x4712,0x4554,0x4496,0x41D8,0x401A,0x425C,0x439E);
1294         &data_short(0x54E0,0x5522,0x5764,0x56A6,0x53E8,0x522A,0x506C,0x51AE);
1295         &data_short(0x5AF0,0x5B32,0x5974,0x58B6,0x5DF8,0x5C3A,0x5E7C,0x5FBE);
1296         &data_short(0xE100,0xE0C2,0xE284,0xE346,0xE608,0xE7CA,0xE58C,0xE44E);
1297         &data_short(0xEF10,0xEED2,0xEC94,0xED56,0xE818,0xE9DA,0xEB9C,0xEA5E);
1298         &data_short(0xFD20,0xFCE2,0xFEA4,0xFF66,0xFA28,0xFBEA,0xF9AC,0xF86E);
1299         &data_short(0xF330,0xF2F2,0xF0B4,0xF176,0xF438,0xF5FA,0xF7BC,0xF67E);
1300         &data_short(0xD940,0xD882,0xDAC4,0xDB06,0xDE48,0xDF8A,0xDDCC,0xDC0E);
1301         &data_short(0xD750,0xD692,0xD4D4,0xD516,0xD058,0xD19A,0xD3DC,0xD21E);
1302         &data_short(0xC560,0xC4A2,0xC6E4,0xC726,0xC268,0xC3AA,0xC1EC,0xC02E);
1303         &data_short(0xCB70,0xCAB2,0xC8F4,0xC936,0xCC78,0xCDBA,0xCFFC,0xCE3E);
1304         &data_short(0x9180,0x9042,0x9204,0x93C6,0x9688,0x974A,0x950C,0x94CE);
1305         &data_short(0x9F90,0x9E52,0x9C14,0x9DD6,0x9898,0x995A,0x9B1C,0x9ADE);
1306         &data_short(0x8DA0,0x8C62,0x8E24,0x8FE6,0x8AA8,0x8B6A,0x892C,0x88EE);
1307         &data_short(0x83B0,0x8272,0x8034,0x81F6,0x84B8,0x857A,0x873C,0x86FE);
1308         &data_short(0xA9C0,0xA802,0xAA44,0xAB86,0xAEC8,0xAF0A,0xAD4C,0xAC8E);
1309         &data_short(0xA7D0,0xA612,0xA454,0xA596,0xA0D8,0xA11A,0xA35C,0xA29E);
1310         &data_short(0xB5E0,0xB422,0xB664,0xB7A6,0xB2E8,0xB32A,0xB16C,0xB0AE);
1311         &data_short(0xBBF0,0xBA32,0xB874,0xB9B6,0xBCF8,0xBD3A,0xBF7C,0xBEBE);
1312 }}}     # !$x86only
1313
1314 &asciz("GHASH for x86, CRYPTOGAMS by <appro\@openssl.org>");
1315 &asm_finish();
1316
1317 # A question was risen about choice of vanilla MMX. Or rather why wasn't
1318 # SSE2 chosen instead? In addition to the fact that MMX runs on legacy
1319 # CPUs such as PIII, "4-bit" MMX version was observed to provide better
1320 # performance than *corresponding* SSE2 one even on contemporary CPUs.
1321 # SSE2 results were provided by Peter-Michael Hager. He maintains SSE2
1322 # implementation featuring full range of lookup-table sizes, but with
1323 # per-invocation lookup table setup. Latter means that table size is
1324 # chosen depending on how much data is to be hashed in every given call,
1325 # more data - larger table. Best reported result for Core2 is ~4 cycles
1326 # per processed byte out of 64KB block. This number accounts even for
1327 # 64KB table setup overhead. As discussed in gcm128.c we choose to be
1328 # more conservative in respect to lookup table sizes, but how do the
1329 # results compare? Minimalistic "256B" MMX version delivers ~11 cycles
1330 # on same platform. As also discussed in gcm128.c, next in line "8-bit
1331 # Shoup's" or "4KB" method should deliver twice the performance of
1332 # "256B" one, in other words not worse than ~6 cycles per byte. It
1333 # should be also be noted that in SSE2 case improvement can be "super-
1334 # linear," i.e. more than twice, mostly because >>8 maps to single
1335 # instruction on SSE2 register. This is unlike "4-bit" case when >>4
1336 # maps to same amount of instructions in both MMX and SSE2 cases.
1337 # Bottom line is that switch to SSE2 is considered to be justifiable
1338 # only in case we choose to implement "8-bit" method...