ghash-x86.pl: commentary updates.
[openssl.git] / crypto / modes / asm / ghash-x86.pl
1 #!/usr/bin/env perl
2 #
3 # ====================================================================
4 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
5 # project. The module is, however, dual licensed under OpenSSL and
6 # CRYPTOGAMS licenses depending on where you obtain it. For further
7 # details see http://www.openssl.org/~appro/cryptogams/.
8 # ====================================================================
9 #
10 # March, May, June 2010
11 #
12 # The module implements "4-bit" GCM GHASH function and underlying
13 # single multiplication operation in GF(2^128). "4-bit" means that it
14 # uses 256 bytes per-key table [+64/128 bytes fixed table]. It has two
15 # code paths: vanilla x86 and vanilla MMX. Former will be executed on
16 # 486 and Pentium, latter on all others. MMX GHASH features so called
17 # "528B" variant of "4-bit" method utilizing additional 256+16 bytes
18 # of per-key storage [+512 bytes shared table]. Performance results
19 # are for streamed GHASH subroutine and are expressed in cycles per
20 # processed byte, less is better:
21 #
22 #               gcc 2.95.3(*)   MMX assembler   x86 assembler
23 #
24 # Pentium       100/112(**)     -               50
25 # PIII          63 /77          12.2            24
26 # P4            96 /122         18.0            84(***)
27 # Opteron       50 /71          10.1            30
28 # Core2         54 /68          8.6             18
29 #
30 # (*)   gcc 3.4.x was observed to generate few percent slower code,
31 #       which is one of reasons why 2.95.3 results were chosen,
32 #       another reason is lack of 3.4.x results for older CPUs;
33 #       comparison is not completely fair, because C results are
34 #       for vanilla "256B" implementations, not "528B";-)
35 # (**)  second number is result for code compiled with -fPIC flag,
36 #       which is actually more relevant, because assembler code is
37 #       position-independent;
38 # (***) see comment in non-MMX routine for further details;
39 #
40 # To summarize, it's >2-5 times faster than gcc-generated code. To
41 # anchor it to something else SHA1 assembler processes one byte in
42 # 11-13 cycles on contemporary x86 cores. As for choice of MMX in
43 # particular, see comment at the end of the file...
44
45 # May 2010
46 #
47 # Add PCLMULQDQ version performing at 2.13 cycles per processed byte.
48 # The question is how close is it to theoretical limit? The pclmulqdq
49 # instruction latency appears to be 14 cycles and there can't be more
50 # than 2 of them executing at any given time. This means that single
51 # Karatsuba multiplication would take 28 cycles *plus* few cycles for
52 # pre- and post-processing. Then multiplication has to be followed by
53 # modulo-reduction. Given that aggregated reduction method [see
54 # "Carry-less Multiplication and Its Usage for Computing the GCM Mode"
55 # white paper by Intel] allows you to perform reduction only once in
56 # a while we can assume that asymptotic performance can be estimated
57 # as (28+Tmod/Naggr)/16, where Tmod is time to perform reduction
58 # and Naggr is the aggregation factor.
59 #
60 # Before we proceed to this implementation let's have closer look at
61 # the best-performing code suggested by Intel in their white paper.
62 # By tracing inter-register dependencies Tmod is estimated as ~19
63 # cycles and Naggr is 4, resulting in 2.05 cycles per processed byte.
64 # As implied, this is quite optimistic estimate, because it does not
65 # account for Karatsuba pre- and post-processing, which for a single
66 # multiplication is ~5 cycles. Unfortunately Intel does not provide
67 # performance data for GHASH alone, only for fused GCM mode. But
68 # we can estimate it by subtracting CTR performance result provided
69 # in "AES Instruction Set" white paper: 3.54-1.38=2.16 cycles per
70 # processed byte or 5% off the estimate. It should be noted though
71 # that 3.54 is GCM result for 16KB block size, while 1.38 is CTR for
72 # 1KB block size, meaning that real number is likely to be a bit
73 # further from estimate.
74 #
75 # Moving on to the implementation in question. Tmod is estimated as
76 # ~13 cycles and Naggr is 2, giving asymptotic performance of ...
77 # 2.16. How is it possible that measured performance is better than
78 # optimistic theoretical estimate? There is one thing Intel failed
79 # to recognize. By fusing GHASH with CTR former's performance is
80 # really limited to above (Tmul + Tmod/Naggr) equation. But if GHASH
81 # procedure is detached, the modulo-reduction can be interleaved with
82 # Naggr-1 multiplications and under ideal conditions even disappear
83 # from the equation. So that optimistic theoretical estimate for this
84 # implementation is ... 28/16=1.75, and not 2.16. Well, it's probably
85 # way too optimistic, at least for such small Naggr. I'd argue that
86 # (28+Tproc/Naggr), where Tproc is time required for Karatsuba pre-
87 # and post-processing, is more realistic estimate. In this case it
88 # gives ... 1.91 cycles per processed byte. Or in other words,
89 # depending on how well we can interleave reduction and one of the
90 # two multiplications the performance should be betwen 1.91 and 2.16.
91 # As already mentioned, this implementation processes one byte [out
92 # of 1KB buffer] in 2.13 cycles, while x86_64 counterpart - in 2.07.
93 # x86_64 performance is better, because larger register bank allows
94 # to interleave reduction and multiplication better.
95 #
96 # Does it make sense to increase Naggr? To start with it's virtually
97 # impossible in 32-bit mode, because of limited register bank
98 # capacity. Otherwise improvement has to be weighed agiainst slower
99 # setup, as well as code size and complexity increase. As even
100 # optimistic estimate doesn't promise 30% performance improvement,
101 # there are currently no plans to increase Naggr.
102 #
103 # Special thanks to David Woodhouse <dwmw2@infradead.org> for
104 # providing access to a Westmere-based system on behalf of Intel
105 # Open Source Technology Centre.
106
107 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
108 push(@INC,"${dir}","${dir}../../perlasm");
109 require "x86asm.pl";
110
111 &asm_init($ARGV[0],"ghash-x86.pl",$x86only = $ARGV[$#ARGV] eq "386");
112
113 $sse2=0;
114 for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
115
116 ($Zhh,$Zhl,$Zlh,$Zll) = ("ebp","edx","ecx","ebx");
117 $inp  = "edi";
118 $Htbl = "esi";
119 \f
120 $unroll = 0;    # Affects x86 loop. Folded loop performs ~7% worse
121                 # than unrolled, which has to be weighted against
122                 # 2.5x x86-specific code size reduction.
123
124 sub x86_loop {
125     my $off = shift;
126     my $rem = "eax";
127
128         &mov    ($Zhh,&DWP(4,$Htbl,$Zll));
129         &mov    ($Zhl,&DWP(0,$Htbl,$Zll));
130         &mov    ($Zlh,&DWP(12,$Htbl,$Zll));
131         &mov    ($Zll,&DWP(8,$Htbl,$Zll));
132         &xor    ($rem,$rem);    # avoid partial register stalls on PIII
133
134         # shrd practically kills P4, 2.5x deterioration, but P4 has
135         # MMX code-path to execute. shrd runs tad faster [than twice
136         # the shifts, move's and or's] on pre-MMX Pentium (as well as
137         # PIII and Core2), *but* minimizes code size, spares register
138         # and thus allows to fold the loop...
139         if (!$unroll) {
140         my $cnt = $inp;
141         &mov    ($cnt,15);
142         &jmp    (&label("x86_loop"));
143         &set_label("x86_loop",16);
144             for($i=1;$i<=2;$i++) {
145                 &mov    (&LB($rem),&LB($Zll));
146                 &shrd   ($Zll,$Zlh,4);
147                 &and    (&LB($rem),0xf);
148                 &shrd   ($Zlh,$Zhl,4);
149                 &shrd   ($Zhl,$Zhh,4);
150                 &shr    ($Zhh,4);
151                 &xor    ($Zhh,&DWP($off+16,"esp",$rem,4));
152
153                 &mov    (&LB($rem),&BP($off,"esp",$cnt));
154                 if ($i&1) {
155                         &and    (&LB($rem),0xf0);
156                 } else {
157                         &shl    (&LB($rem),4);
158                 }
159
160                 &xor    ($Zll,&DWP(8,$Htbl,$rem));
161                 &xor    ($Zlh,&DWP(12,$Htbl,$rem));
162                 &xor    ($Zhl,&DWP(0,$Htbl,$rem));
163                 &xor    ($Zhh,&DWP(4,$Htbl,$rem));
164
165                 if ($i&1) {
166                         &dec    ($cnt);
167                         &js     (&label("x86_break"));
168                 } else {
169                         &jmp    (&label("x86_loop"));
170                 }
171             }
172         &set_label("x86_break",16);
173         } else {
174             for($i=1;$i<32;$i++) {
175                 &comment($i);
176                 &mov    (&LB($rem),&LB($Zll));
177                 &shrd   ($Zll,$Zlh,4);
178                 &and    (&LB($rem),0xf);
179                 &shrd   ($Zlh,$Zhl,4);
180                 &shrd   ($Zhl,$Zhh,4);
181                 &shr    ($Zhh,4);
182                 &xor    ($Zhh,&DWP($off+16,"esp",$rem,4));
183
184                 if ($i&1) {
185                         &mov    (&LB($rem),&BP($off+15-($i>>1),"esp"));
186                         &and    (&LB($rem),0xf0);
187                 } else {
188                         &mov    (&LB($rem),&BP($off+15-($i>>1),"esp"));
189                         &shl    (&LB($rem),4);
190                 }
191
192                 &xor    ($Zll,&DWP(8,$Htbl,$rem));
193                 &xor    ($Zlh,&DWP(12,$Htbl,$rem));
194                 &xor    ($Zhl,&DWP(0,$Htbl,$rem));
195                 &xor    ($Zhh,&DWP(4,$Htbl,$rem));
196             }
197         }
198         &bswap  ($Zll);
199         &bswap  ($Zlh);
200         &bswap  ($Zhl);
201         if (!$x86only) {
202                 &bswap  ($Zhh);
203         } else {
204                 &mov    ("eax",$Zhh);
205                 &bswap  ("eax");
206                 &mov    ($Zhh,"eax");
207         }
208 }
209
210 if ($unroll) {
211     &function_begin_B("_x86_gmult_4bit_inner");
212         &x86_loop(4);
213         &ret    ();
214     &function_end_B("_x86_gmult_4bit_inner");
215 }
216
217 sub deposit_rem_4bit {
218     my $bias = shift;
219
220         &mov    (&DWP($bias+0, "esp"),0x0000<<16);
221         &mov    (&DWP($bias+4, "esp"),0x1C20<<16);
222         &mov    (&DWP($bias+8, "esp"),0x3840<<16);
223         &mov    (&DWP($bias+12,"esp"),0x2460<<16);
224         &mov    (&DWP($bias+16,"esp"),0x7080<<16);
225         &mov    (&DWP($bias+20,"esp"),0x6CA0<<16);
226         &mov    (&DWP($bias+24,"esp"),0x48C0<<16);
227         &mov    (&DWP($bias+28,"esp"),0x54E0<<16);
228         &mov    (&DWP($bias+32,"esp"),0xE100<<16);
229         &mov    (&DWP($bias+36,"esp"),0xFD20<<16);
230         &mov    (&DWP($bias+40,"esp"),0xD940<<16);
231         &mov    (&DWP($bias+44,"esp"),0xC560<<16);
232         &mov    (&DWP($bias+48,"esp"),0x9180<<16);
233         &mov    (&DWP($bias+52,"esp"),0x8DA0<<16);
234         &mov    (&DWP($bias+56,"esp"),0xA9C0<<16);
235         &mov    (&DWP($bias+60,"esp"),0xB5E0<<16);
236 }
237 \f
238 $suffix = $x86only ? "" : "_x86";
239
240 &function_begin("gcm_gmult_4bit".$suffix);
241         &stack_push(16+4+1);                    # +1 for stack alignment
242         &mov    ($inp,&wparam(0));              # load Xi
243         &mov    ($Htbl,&wparam(1));             # load Htable
244
245         &mov    ($Zhh,&DWP(0,$inp));            # load Xi[16]
246         &mov    ($Zhl,&DWP(4,$inp));
247         &mov    ($Zlh,&DWP(8,$inp));
248         &mov    ($Zll,&DWP(12,$inp));
249
250         &deposit_rem_4bit(16);
251
252         &mov    (&DWP(0,"esp"),$Zhh);           # copy Xi[16] on stack
253         &mov    (&DWP(4,"esp"),$Zhl);
254         &mov    (&DWP(8,"esp"),$Zlh);
255         &mov    (&DWP(12,"esp"),$Zll);
256         &shr    ($Zll,20);
257         &and    ($Zll,0xf0);
258
259         if ($unroll) {
260                 &call   ("_x86_gmult_4bit_inner");
261         } else {
262                 &x86_loop(0);
263                 &mov    ($inp,&wparam(0));
264         }
265
266         &mov    (&DWP(12,$inp),$Zll);
267         &mov    (&DWP(8,$inp),$Zlh);
268         &mov    (&DWP(4,$inp),$Zhl);
269         &mov    (&DWP(0,$inp),$Zhh);
270         &stack_pop(16+4+1);
271 &function_end("gcm_gmult_4bit".$suffix);
272
273 &function_begin("gcm_ghash_4bit".$suffix);
274         &stack_push(16+4+1);                    # +1 for 64-bit alignment
275         &mov    ($Zll,&wparam(0));              # load Xi
276         &mov    ($Htbl,&wparam(1));             # load Htable
277         &mov    ($inp,&wparam(2));              # load in
278         &mov    ("ecx",&wparam(3));             # load len
279         &add    ("ecx",$inp);
280         &mov    (&wparam(3),"ecx");
281
282         &mov    ($Zhh,&DWP(0,$Zll));            # load Xi[16]
283         &mov    ($Zhl,&DWP(4,$Zll));
284         &mov    ($Zlh,&DWP(8,$Zll));
285         &mov    ($Zll,&DWP(12,$Zll));
286
287         &deposit_rem_4bit(16);
288
289     &set_label("x86_outer_loop",16);
290         &xor    ($Zll,&DWP(12,$inp));           # xor with input
291         &xor    ($Zlh,&DWP(8,$inp));
292         &xor    ($Zhl,&DWP(4,$inp));
293         &xor    ($Zhh,&DWP(0,$inp));
294         &mov    (&DWP(12,"esp"),$Zll);          # dump it on stack
295         &mov    (&DWP(8,"esp"),$Zlh);
296         &mov    (&DWP(4,"esp"),$Zhl);
297         &mov    (&DWP(0,"esp"),$Zhh);
298
299         &shr    ($Zll,20);
300         &and    ($Zll,0xf0);
301
302         if ($unroll) {
303                 &call   ("_x86_gmult_4bit_inner");
304         } else {
305                 &x86_loop(0);
306                 &mov    ($inp,&wparam(2));
307         }
308         &lea    ($inp,&DWP(16,$inp));
309         &cmp    ($inp,&wparam(3));
310         &mov    (&wparam(2),$inp)       if (!$unroll);
311         &jb     (&label("x86_outer_loop"));
312
313         &mov    ($inp,&wparam(0));      # load Xi
314         &mov    (&DWP(12,$inp),$Zll);
315         &mov    (&DWP(8,$inp),$Zlh);
316         &mov    (&DWP(4,$inp),$Zhl);
317         &mov    (&DWP(0,$inp),$Zhh);
318         &stack_pop(16+4+1);
319 &function_end("gcm_ghash_4bit".$suffix);
320 \f
321 if (!$x86only) {{{
322
323 &static_label("rem_4bit");
324
325 if (0) {{       # "May" MMX version is kept for reference...
326
327 $S=12;          # shift factor for rem_4bit
328
329 &function_begin_B("_mmx_gmult_4bit_inner");
330 # MMX version performs 3.5 times better on P4 (see comment in non-MMX
331 # routine for further details), 100% better on Opteron, ~70% better
332 # on Core2 and PIII... In other words effort is considered to be well
333 # spent... Since initial release the loop was unrolled in order to
334 # "liberate" register previously used as loop counter. Instead it's
335 # used to optimize critical path in 'Z.hi ^= rem_4bit[Z.lo&0xf]'.
336 # The path involves move of Z.lo from MMX to integer register,
337 # effective address calculation and finally merge of value to Z.hi.
338 # Reference to rem_4bit is scheduled so late that I had to >>4
339 # rem_4bit elements. This resulted in 20-45% procent improvement
340 # on contemporary ยต-archs.
341 {
342     my $cnt;
343     my $rem_4bit = "eax";
344     my @rem = ($Zhh,$Zll);
345     my $nhi = $Zhl;
346     my $nlo = $Zlh;
347
348     my ($Zlo,$Zhi) = ("mm0","mm1");
349     my $tmp = "mm2";
350
351         &xor    ($nlo,$nlo);    # avoid partial register stalls on PIII
352         &mov    ($nhi,$Zll);
353         &mov    (&LB($nlo),&LB($nhi));
354         &shl    (&LB($nlo),4);
355         &and    ($nhi,0xf0);
356         &movq   ($Zlo,&QWP(8,$Htbl,$nlo));
357         &movq   ($Zhi,&QWP(0,$Htbl,$nlo));
358         &movd   ($rem[0],$Zlo);
359
360         for ($cnt=28;$cnt>=-2;$cnt--) {
361             my $odd = $cnt&1;
362             my $nix = $odd ? $nlo : $nhi;
363
364                 &shl    (&LB($nlo),4)                   if ($odd);
365                 &psrlq  ($Zlo,4);
366                 &movq   ($tmp,$Zhi);
367                 &psrlq  ($Zhi,4);
368                 &pxor   ($Zlo,&QWP(8,$Htbl,$nix));
369                 &mov    (&LB($nlo),&BP($cnt/2,$inp))    if (!$odd && $cnt>=0);
370                 &psllq  ($tmp,60);
371                 &and    ($nhi,0xf0)                     if ($odd);
372                 &pxor   ($Zhi,&QWP(0,$rem_4bit,$rem[1],8)) if ($cnt<28);
373                 &and    ($rem[0],0xf);
374                 &pxor   ($Zhi,&QWP(0,$Htbl,$nix));
375                 &mov    ($nhi,$nlo)                     if (!$odd && $cnt>=0);
376                 &movd   ($rem[1],$Zlo);
377                 &pxor   ($Zlo,$tmp);
378
379                 push    (@rem,shift(@rem));             # "rotate" registers
380         }
381
382         &mov    ($inp,&DWP(4,$rem_4bit,$rem[1],8));     # last rem_4bit[rem]
383
384         &psrlq  ($Zlo,32);      # lower part of Zlo is already there
385         &movd   ($Zhl,$Zhi);
386         &psrlq  ($Zhi,32);
387         &movd   ($Zlh,$Zlo);
388         &movd   ($Zhh,$Zhi);
389         &shl    ($inp,4);       # compensate for rem_4bit[i] being >>4
390
391         &bswap  ($Zll);
392         &bswap  ($Zhl);
393         &bswap  ($Zlh);
394         &xor    ($Zhh,$inp);
395         &bswap  ($Zhh);
396
397         &ret    ();
398 }
399 &function_end_B("_mmx_gmult_4bit_inner");
400
401 &function_begin("gcm_gmult_4bit_mmx");
402         &mov    ($inp,&wparam(0));      # load Xi
403         &mov    ($Htbl,&wparam(1));     # load Htable
404
405         &call   (&label("pic_point"));
406         &set_label("pic_point");
407         &blindpop("eax");
408         &lea    ("eax",&DWP(&label("rem_4bit")."-".&label("pic_point"),"eax"));
409
410         &movz   ($Zll,&BP(15,$inp));
411
412         &call   ("_mmx_gmult_4bit_inner");
413
414         &mov    ($inp,&wparam(0));      # load Xi
415         &emms   ();
416         &mov    (&DWP(12,$inp),$Zll);
417         &mov    (&DWP(4,$inp),$Zhl);
418         &mov    (&DWP(8,$inp),$Zlh);
419         &mov    (&DWP(0,$inp),$Zhh);
420 &function_end("gcm_gmult_4bit_mmx");
421 \f
422 # Streamed version performs 20% better on P4, 7% on Opteron,
423 # 10% on Core2 and PIII...
424 &function_begin("gcm_ghash_4bit_mmx");
425         &mov    ($Zhh,&wparam(0));      # load Xi
426         &mov    ($Htbl,&wparam(1));     # load Htable
427         &mov    ($inp,&wparam(2));      # load in
428         &mov    ($Zlh,&wparam(3));      # load len
429
430         &call   (&label("pic_point"));
431         &set_label("pic_point");
432         &blindpop("eax");
433         &lea    ("eax",&DWP(&label("rem_4bit")."-".&label("pic_point"),"eax"));
434
435         &add    ($Zlh,$inp);
436         &mov    (&wparam(3),$Zlh);      # len to point at the end of input
437         &stack_push(4+1);               # +1 for stack alignment
438
439         &mov    ($Zll,&DWP(12,$Zhh));   # load Xi[16]
440         &mov    ($Zhl,&DWP(4,$Zhh));
441         &mov    ($Zlh,&DWP(8,$Zhh));
442         &mov    ($Zhh,&DWP(0,$Zhh));
443         &jmp    (&label("mmx_outer_loop"));
444
445     &set_label("mmx_outer_loop",16);
446         &xor    ($Zll,&DWP(12,$inp));
447         &xor    ($Zhl,&DWP(4,$inp));
448         &xor    ($Zlh,&DWP(8,$inp));
449         &xor    ($Zhh,&DWP(0,$inp));
450         &mov    (&wparam(2),$inp);
451         &mov    (&DWP(12,"esp"),$Zll);
452         &mov    (&DWP(4,"esp"),$Zhl);
453         &mov    (&DWP(8,"esp"),$Zlh);
454         &mov    (&DWP(0,"esp"),$Zhh);
455
456         &mov    ($inp,"esp");
457         &shr    ($Zll,24);
458
459         &call   ("_mmx_gmult_4bit_inner");
460
461         &mov    ($inp,&wparam(2));
462         &lea    ($inp,&DWP(16,$inp));
463         &cmp    ($inp,&wparam(3));
464         &jb     (&label("mmx_outer_loop"));
465
466         &mov    ($inp,&wparam(0));      # load Xi
467         &emms   ();
468         &mov    (&DWP(12,$inp),$Zll);
469         &mov    (&DWP(4,$inp),$Zhl);
470         &mov    (&DWP(8,$inp),$Zlh);
471         &mov    (&DWP(0,$inp),$Zhh);
472
473         &stack_pop(4+1);
474 &function_end("gcm_ghash_4bit_mmx");
475 \f
476 }} else {{      # "June" MMX version...
477                 # ... has slower "April" gcm_gmult_4bit_mmx with folded
478                 # loop. This is done to conserve code size...
479 $S=16;          # shift factor for rem_4bit
480
481 sub mmx_loop() {
482 # MMX version performs 2.8 times better on P4 (see comment in non-MMX
483 # routine for further details), 40% better on Opteron and Core2, 50%
484 # better on PIII... In other words effort is considered to be well
485 # spent...
486     my $inp = shift;
487     my $rem_4bit = shift;
488     my $cnt = $Zhh;
489     my $nhi = $Zhl;
490     my $nlo = $Zlh;
491     my $rem = $Zll;
492
493     my ($Zlo,$Zhi) = ("mm0","mm1");
494     my $tmp = "mm2";
495
496         &xor    ($nlo,$nlo);    # avoid partial register stalls on PIII
497         &mov    ($nhi,$Zll);
498         &mov    (&LB($nlo),&LB($nhi));
499         &mov    ($cnt,14);
500         &shl    (&LB($nlo),4);
501         &and    ($nhi,0xf0);
502         &movq   ($Zlo,&QWP(8,$Htbl,$nlo));
503         &movq   ($Zhi,&QWP(0,$Htbl,$nlo));
504         &movd   ($rem,$Zlo);
505         &jmp    (&label("mmx_loop"));
506
507     &set_label("mmx_loop",16);
508         &psrlq  ($Zlo,4);
509         &and    ($rem,0xf);
510         &movq   ($tmp,$Zhi);
511         &psrlq  ($Zhi,4);
512         &pxor   ($Zlo,&QWP(8,$Htbl,$nhi));
513         &mov    (&LB($nlo),&BP(0,$inp,$cnt));
514         &psllq  ($tmp,60);
515         &pxor   ($Zhi,&QWP(0,$rem_4bit,$rem,8));
516         &dec    ($cnt);
517         &movd   ($rem,$Zlo);
518         &pxor   ($Zhi,&QWP(0,$Htbl,$nhi));
519         &mov    ($nhi,$nlo);
520         &pxor   ($Zlo,$tmp);
521         &js     (&label("mmx_break"));
522
523         &shl    (&LB($nlo),4);
524         &and    ($rem,0xf);
525         &psrlq  ($Zlo,4);
526         &and    ($nhi,0xf0);
527         &movq   ($tmp,$Zhi);
528         &psrlq  ($Zhi,4);
529         &pxor   ($Zlo,&QWP(8,$Htbl,$nlo));
530         &psllq  ($tmp,60);
531         &pxor   ($Zhi,&QWP(0,$rem_4bit,$rem,8));
532         &movd   ($rem,$Zlo);
533         &pxor   ($Zhi,&QWP(0,$Htbl,$nlo));
534         &pxor   ($Zlo,$tmp);
535         &jmp    (&label("mmx_loop"));
536
537     &set_label("mmx_break",16);
538         &shl    (&LB($nlo),4);
539         &and    ($rem,0xf);
540         &psrlq  ($Zlo,4);
541         &and    ($nhi,0xf0);
542         &movq   ($tmp,$Zhi);
543         &psrlq  ($Zhi,4);
544         &pxor   ($Zlo,&QWP(8,$Htbl,$nlo));
545         &psllq  ($tmp,60);
546         &pxor   ($Zhi,&QWP(0,$rem_4bit,$rem,8));
547         &movd   ($rem,$Zlo);
548         &pxor   ($Zhi,&QWP(0,$Htbl,$nlo));
549         &pxor   ($Zlo,$tmp);
550
551         &psrlq  ($Zlo,4);
552         &and    ($rem,0xf);
553         &movq   ($tmp,$Zhi);
554         &psrlq  ($Zhi,4);
555         &pxor   ($Zlo,&QWP(8,$Htbl,$nhi));
556         &psllq  ($tmp,60);
557         &pxor   ($Zhi,&QWP(0,$rem_4bit,$rem,8));
558         &movd   ($rem,$Zlo);
559         &pxor   ($Zhi,&QWP(0,$Htbl,$nhi));
560         &pxor   ($Zlo,$tmp);
561
562         &psrlq  ($Zlo,32);      # lower part of Zlo is already there
563         &movd   ($Zhl,$Zhi);
564         &psrlq  ($Zhi,32);
565         &movd   ($Zlh,$Zlo);
566         &movd   ($Zhh,$Zhi);
567
568         &bswap  ($Zll);
569         &bswap  ($Zhl);
570         &bswap  ($Zlh);
571         &bswap  ($Zhh);
572 }
573
574 &function_begin("gcm_gmult_4bit_mmx");
575         &mov    ($inp,&wparam(0));      # load Xi
576         &mov    ($Htbl,&wparam(1));     # load Htable
577
578         &call   (&label("pic_point"));
579         &set_label("pic_point");
580         &blindpop("eax");
581         &lea    ("eax",&DWP(&label("rem_4bit")."-".&label("pic_point"),"eax"));
582
583         &movz   ($Zll,&BP(15,$inp));
584
585         &mmx_loop($inp,"eax");
586
587         &emms   ();
588         &mov    (&DWP(12,$inp),$Zll);
589         &mov    (&DWP(4,$inp),$Zhl);
590         &mov    (&DWP(8,$inp),$Zlh);
591         &mov    (&DWP(0,$inp),$Zhh);
592 &function_end("gcm_gmult_4bit_mmx");
593 \f
594 ######################################################################
595 # Below subroutine is "528B" variant of "4-bit" GCM GHASH function
596 # (see gcm128.c for details). It provides further 20-40% performance
597 # improvement over above mentioned "May" version.
598
599 &static_label("rem_8bit");
600
601 &function_begin("gcm_ghash_4bit_mmx");
602 { my ($Zlo,$Zhi) = ("mm7","mm6");
603   my $rem_8bit = "esi";
604   my $Htbl = "ebx";
605
606     # parameter block
607     &mov        ("eax",&wparam(0));             # Xi
608     &mov        ("ebx",&wparam(1));             # Htable
609     &mov        ("ecx",&wparam(2));             # inp
610     &mov        ("edx",&wparam(3));             # len
611     &mov        ("ebp","esp");                  # original %esp
612     &call       (&label("pic_point"));
613     &set_label  ("pic_point");
614     &blindpop   ($rem_8bit);
615     &lea        ($rem_8bit,&DWP(&label("rem_8bit")."-".&label("pic_point"),$rem_8bit));
616
617     &sub        ("esp",512+16+16);              # allocate stack frame...
618     &and        ("esp",-64);                    # ...and align it
619     &sub        ("esp",16);                     # place for (u8)(H[]<<4)
620
621     &add        ("edx","ecx");                  # pointer to the end of input
622     &mov        (&DWP(528+16+0,"esp"),"eax");   # save Xi
623     &mov        (&DWP(528+16+8,"esp"),"edx");   # save inp+len
624     &mov        (&DWP(528+16+12,"esp"),"ebp");  # save original %esp
625
626     { my @lo  = ("mm0","mm1","mm2");
627       my @hi  = ("mm3","mm4","mm5");
628       my @tmp = ("mm6","mm7");
629       my $off1=0,$off2=0,$i;
630
631       &add      ($Htbl,128);                    # optimize for size
632       &lea      ("edi",&DWP(16+128,"esp"));
633       &lea      ("ebp",&DWP(16+256+128,"esp"));
634
635       # decompose Htable (low and high parts are kept separately),
636       # generate Htable[]>>4, (u8)(Htable[]<<4), save to stack...
637       for ($i=0;$i<18;$i++) {
638
639         &mov    ("edx",&DWP(16*$i+8-128,$Htbl))         if ($i<16);
640         &movq   ($lo[0],&QWP(16*$i+8-128,$Htbl))        if ($i<16);
641         &psllq  ($tmp[1],60)                            if ($i>1);
642         &movq   ($hi[0],&QWP(16*$i+0-128,$Htbl))        if ($i<16);
643         &por    ($lo[2],$tmp[1])                        if ($i>1);
644         &movq   (&QWP($off1-128,"edi"),$lo[1])          if ($i>0 && $i<17);
645         &psrlq  ($lo[1],4)                              if ($i>0 && $i<17);
646         &movq   (&QWP($off1,"edi"),$hi[1])              if ($i>0 && $i<17);
647         &movq   ($tmp[0],$hi[1])                        if ($i>0 && $i<17);
648         &movq   (&QWP($off2-128,"ebp"),$lo[2])          if ($i>1);
649         &psrlq  ($hi[1],4)                              if ($i>0 && $i<17);
650         &movq   (&QWP($off2,"ebp"),$hi[2])              if ($i>1);
651         &shl    ("edx",4)                               if ($i<16);
652         &mov    (&BP($i,"esp"),&LB("edx"))              if ($i<16);
653
654         unshift (@lo,pop(@lo));                 # "rotate" registers
655         unshift (@hi,pop(@hi));
656         unshift (@tmp,pop(@tmp));
657         $off1 += 8      if ($i>0);
658         $off2 += 8      if ($i>1);
659       }
660     }
661
662     &movq       ($Zhi,&QWP(0,"eax"));
663     &mov        ("ebx",&DWP(8,"eax"));
664     &mov        ("edx",&DWP(12,"eax"));         # load Xi
665
666 &set_label("outer",16);
667   { my $nlo = "eax";
668     my $dat = "edx";
669     my @nhi = ("edi","ebp");
670     my @rem = ("ebx","ecx");
671     my @red = ("mm0","mm1","mm2");
672     my $tmp = "mm3";
673
674     &xor        ($dat,&DWP(12,"ecx"));          # merge input data
675     &xor        ("ebx",&DWP(8,"ecx"));
676     &pxor       ($Zhi,&QWP(0,"ecx"));
677     &lea        ("ecx",&DWP(16,"ecx"));         # inp+=16
678     #&mov       (&DWP(528+12,"esp"),$dat);      # save inp^Xi
679     &mov        (&DWP(528+8,"esp"),"ebx");
680     &movq       (&QWP(528+0,"esp"),$Zhi);
681     &mov        (&DWP(528+16+4,"esp"),"ecx");   # save inp
682
683     &xor        ($nlo,$nlo);
684     &rol        ($dat,8);
685     &mov        (&LB($nlo),&LB($dat));
686     &mov        ($nhi[1],$nlo);
687     &and        (&LB($nlo),0x0f);
688     &shr        ($nhi[1],4);
689     &pxor       ($red[0],$red[0]);
690     &rol        ($dat,8);                       # next byte
691     &pxor       ($red[1],$red[1]);
692     &pxor       ($red[2],$red[2]);
693
694     # Just like in "May" verson modulo-schedule for critical path in
695     # 'Z.hi ^= rem_8bit[Z.lo&0xff^((u8)H[nhi]<<4)]<<48'. Final 'pxor'
696     # is scheduled so late that rem_8bit[] has to be shifted *right*
697     # by 16, which is why last argument to pinsrw is 2, which
698     # corresponds to <<32=<<48>>16...
699     for ($j=11,$i=0;$i<15;$i++) {
700
701       if ($i>0) {
702         &pxor   ($Zlo,&QWP(16,"esp",$nlo,8));           # Z^=H[nlo]
703         &rol    ($dat,8);                               # next byte
704         &pxor   ($Zhi,&QWP(16+128,"esp",$nlo,8));
705
706         &pxor   ($Zlo,$tmp);
707         &pxor   ($Zhi,&QWP(16+256+128,"esp",$nhi[0],8));
708         &xor    (&LB($rem[1]),&BP(0,"esp",$nhi[0]));    # rem^(H[nhi]<<4)
709       } else {
710         &movq   ($Zlo,&QWP(16,"esp",$nlo,8));
711         &movq   ($Zhi,&QWP(16+128,"esp",$nlo,8));
712       }
713
714         &mov    (&LB($nlo),&LB($dat));
715         &mov    ($dat,&DWP(528+$j,"esp"))               if (--$j%4==0);
716
717         &movd   ($rem[0],$Zlo);
718         &movz   ($rem[1],&LB($rem[1]))                  if ($i>0);
719         &psrlq  ($Zlo,8);                               # Z>>=8
720
721         &movq   ($tmp,$Zhi);
722         &mov    ($nhi[0],$nlo);
723         &psrlq  ($Zhi,8);
724
725         &pxor   ($Zlo,&QWP(16+256+0,"esp",$nhi[1],8));  # Z^=H[nhi]>>4
726         &and    (&LB($nlo),0x0f);
727         &psllq  ($tmp,56);
728
729         &pxor   ($Zhi,$red[1])                          if ($i>1);
730         &shr    ($nhi[0],4);
731         &pinsrw ($red[0],&WP(0,$rem_8bit,$rem[1],2),2)  if ($i>0);
732
733         unshift (@red,pop(@red));                       # "rotate" registers
734         unshift (@rem,pop(@rem));
735         unshift (@nhi,pop(@nhi));
736     }
737
738     &pxor       ($Zlo,&QWP(16,"esp",$nlo,8));           # Z^=H[nlo]
739     &pxor       ($Zhi,&QWP(16+128,"esp",$nlo,8));
740     &xor        (&LB($rem[1]),&BP(0,"esp",$nhi[0]));    # rem^(H[nhi]<<4)
741
742     &pxor       ($Zlo,$tmp);
743     &pxor       ($Zhi,&QWP(16+256+128,"esp",$nhi[0],8));
744     &movz       ($rem[1],&LB($rem[1]));
745
746     &pxor       ($red[2],$red[2]);                      # clear 2nd word
747     &psllq      ($red[1],4);
748
749     &movd       ($rem[0],$Zlo);
750     &psrlq      ($Zlo,4);                               # Z>>=4
751
752     &movq       ($tmp,$Zhi);
753     &psrlq      ($Zhi,4);
754     &shl        ($rem[0],4);                            # rem<<4
755
756     &pxor       ($Zlo,&QWP(16,"esp",$nhi[1],8));        # Z^=H[nhi]
757     &psllq      ($tmp,60);
758     &movz       ($rem[0],&LB($rem[0]));
759
760     &pxor       ($Zlo,$tmp);
761     &pxor       ($Zhi,&QWP(16+128,"esp",$nhi[1],8));
762
763     &pinsrw     ($red[0],&WP(0,$rem_8bit,$rem[1],2),2);
764     &pxor       ($Zhi,$red[1]);
765
766     &movd       ($dat,$Zlo);
767     &pinsrw     ($red[2],&WP(0,$rem_8bit,$rem[0],2),3); # last is <<48
768
769     &psllq      ($red[0],12);                           # correct by <<16>>4
770     &pxor       ($Zhi,$red[0]);
771     &psrlq      ($Zlo,32);
772     &pxor       ($Zhi,$red[2]);
773
774     &mov        ("ecx",&DWP(528+16+4,"esp"));   # restore inp
775     &movd       ("ebx",$Zlo);
776     &movq       ($tmp,$Zhi);                    # 01234567
777     &psllw      ($Zhi,8);                       # 1.3.5.7.
778     &psrlw      ($tmp,8);                       # .0.2.4.6
779     &por        ($Zhi,$tmp);                    # 10325476
780     &bswap      ($dat);
781     &pshufw     ($Zhi,$Zhi,0b00011011);         # 76543210
782     &bswap      ("ebx");
783     
784     &cmp        ("ecx",&DWP(528+16+8,"esp"));   # are we done?
785     &jne        (&label("outer"));
786   }
787
788     &mov        ("eax",&DWP(528+16+0,"esp"));   # restore Xi
789     &mov        (&DWP(12,"eax"),"edx");
790     &mov        (&DWP(8,"eax"),"ebx");
791     &movq       (&QWP(0,"eax"),$Zhi);
792
793     &mov        ("esp",&DWP(528+16+12,"esp"));  # restore original %esp
794     &emms       ();
795 }
796 &function_end("gcm_ghash_4bit_mmx");
797 }}
798 \f
799 if ($sse2) {{
800 ######################################################################
801 # PCLMULQDQ version.
802
803 $Xip="eax";
804 $Htbl="edx";
805 $const="ecx";
806 $inp="esi";
807 $len="ebx";
808
809 ($Xi,$Xhi)=("xmm0","xmm1");     $Hkey="xmm2";
810 ($T1,$T2,$T3)=("xmm3","xmm4","xmm5");
811 ($Xn,$Xhn)=("xmm6","xmm7");
812
813 &static_label("bswap");
814
815 sub clmul64x64_T2 {     # minimal "register" pressure
816 my ($Xhi,$Xi,$Hkey)=@_;
817
818         &movdqa         ($Xhi,$Xi);             #
819         &pshufd         ($T1,$Xi,0b01001110);
820         &pshufd         ($T2,$Hkey,0b01001110);
821         &pxor           ($T1,$Xi);              #
822         &pxor           ($T2,$Hkey);
823
824         &pclmulqdq      ($Xi,$Hkey,0x00);       #######
825         &pclmulqdq      ($Xhi,$Hkey,0x11);      #######
826         &pclmulqdq      ($T1,$T2,0x00);         #######
827         &pxor           ($T1,$Xi);              #
828         &pxor           ($T1,$Xhi);             #
829
830         &movdqa         ($T2,$T1);              #
831         &psrldq         ($T1,8);
832         &pslldq         ($T2,8);                #
833         &pxor           ($Xhi,$T1);
834         &pxor           ($Xi,$T2);              #
835 }
836
837 sub clmul64x64_T3 {
838 # Even though this subroutine offers visually better ILP, it
839 # was empirically found to be a tad slower than above version.
840 # At least in gcm_ghash_clmul context. But it's just as well,
841 # because loop modulo-scheduling is possible only thanks to
842 # minimized "register" pressure...
843 my ($Xhi,$Xi,$Hkey)=@_;
844
845         &movdqa         ($T1,$Xi);              #
846         &movdqa         ($Xhi,$Xi);
847         &pclmulqdq      ($Xi,$Hkey,0x00);       #######
848         &pclmulqdq      ($Xhi,$Hkey,0x11);      #######
849         &pshufd         ($T2,$T1,0b01001110);   #
850         &pshufd         ($T3,$Hkey,0b01001110);
851         &pxor           ($T2,$T1);              #
852         &pxor           ($T3,$Hkey);
853         &pclmulqdq      ($T2,$T3,0x00);         #######
854         &pxor           ($T2,$Xi);              #
855         &pxor           ($T2,$Xhi);             #
856
857         &movdqa         ($T3,$T2);              #
858         &psrldq         ($T2,8);
859         &pslldq         ($T3,8);                #
860         &pxor           ($Xhi,$T2);
861         &pxor           ($Xi,$T3);              #
862 }
863 \f
864 if (1) {                # Algorithm 9 with <<1 twist.
865                         # Reduction is shorter and uses only two
866                         # temporary registers, which makes it better
867                         # candidate for interleaving with 64x64
868                         # multiplication. Pre-modulo-scheduled loop
869                         # was found to be ~20% faster than Algorithm 5
870                         # below. Algorithm 9 was therefore chosen for
871                         # further optimization...
872
873 sub reduction_alg9 {    # 17/13 times faster than Intel version
874 my ($Xhi,$Xi) = @_;
875
876         # 1st phase
877         &movdqa         ($T1,$Xi)               #
878         &psllq          ($Xi,1);
879         &pxor           ($Xi,$T1);              #
880         &psllq          ($Xi,5);                #
881         &pxor           ($Xi,$T1);              #
882         &psllq          ($Xi,57);               #
883         &movdqa         ($T2,$Xi);              #
884         &pslldq         ($Xi,8);
885         &psrldq         ($T2,8);                #
886         &pxor           ($Xi,$T1);
887         &pxor           ($Xhi,$T2);             #
888
889         # 2nd phase
890         &movdqa         ($T2,$Xi);
891         &psrlq          ($Xi,5);
892         &pxor           ($Xi,$T2);              #
893         &psrlq          ($Xi,1);                #
894         &pxor           ($Xi,$T2);              #
895         &pxor           ($T2,$Xhi);
896         &psrlq          ($Xi,1);                #
897         &pxor           ($Xi,$T2);              #
898 }
899
900 &function_begin_B("gcm_init_clmul");
901         &mov            ($Htbl,&wparam(0));
902         &mov            ($Xip,&wparam(1));
903
904         &call           (&label("pic"));
905 &set_label("pic");
906         &blindpop       ($const);
907         &lea            ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
908
909         &movdqu         ($Hkey,&QWP(0,$Xip));
910         &pshufd         ($Hkey,$Hkey,0b01001110);# dword swap
911
912         # <<1 twist
913         &pshufd         ($T2,$Hkey,0b11111111); # broadcast uppermost dword
914         &movdqa         ($T1,$Hkey);
915         &psllq          ($Hkey,1);
916         &pxor           ($T3,$T3);              #
917         &psrlq          ($T1,63);
918         &pcmpgtd        ($T3,$T2);              # broadcast carry bit
919         &pslldq         ($T1,8);
920         &por            ($Hkey,$T1);            # H<<=1
921
922         # magic reduction
923         &pand           ($T3,&QWP(16,$const));  # 0x1c2_polynomial
924         &pxor           ($Hkey,$T3);            # if(carry) H^=0x1c2_polynomial
925
926         # calculate H^2
927         &movdqa         ($Xi,$Hkey);
928         &clmul64x64_T2  ($Xhi,$Xi,$Hkey);
929         &reduction_alg9 ($Xhi,$Xi);
930
931         &movdqu         (&QWP(0,$Htbl),$Hkey);  # save H
932         &movdqu         (&QWP(16,$Htbl),$Xi);   # save H^2
933
934         &ret            ();
935 &function_end_B("gcm_init_clmul");
936
937 &function_begin_B("gcm_gmult_clmul");
938         &mov            ($Xip,&wparam(0));
939         &mov            ($Htbl,&wparam(1));
940
941         &call           (&label("pic"));
942 &set_label("pic");
943         &blindpop       ($const);
944         &lea            ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
945
946         &movdqu         ($Xi,&QWP(0,$Xip));
947         &movdqa         ($T3,&QWP(0,$const));
948         &movdqu         ($Hkey,&QWP(0,$Htbl));
949         &pshufb         ($Xi,$T3);
950
951         &clmul64x64_T2  ($Xhi,$Xi,$Hkey);
952         &reduction_alg9 ($Xhi,$Xi);
953
954         &pshufb         ($Xi,$T3);
955         &movdqu         (&QWP(0,$Xip),$Xi);
956
957         &ret    ();
958 &function_end_B("gcm_gmult_clmul");
959
960 &function_begin("gcm_ghash_clmul");
961         &mov            ($Xip,&wparam(0));
962         &mov            ($Htbl,&wparam(1));
963         &mov            ($inp,&wparam(2));
964         &mov            ($len,&wparam(3));
965
966         &call           (&label("pic"));
967 &set_label("pic");
968         &blindpop       ($const);
969         &lea            ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
970
971         &movdqu         ($Xi,&QWP(0,$Xip));
972         &movdqa         ($T3,&QWP(0,$const));
973         &movdqu         ($Hkey,&QWP(0,$Htbl));
974         &pshufb         ($Xi,$T3);
975
976         &sub            ($len,0x10);
977         &jz             (&label("odd_tail"));
978
979         #######
980         # Xi+2 =[H*(Ii+1 + Xi+1)] mod P =
981         #       [(H*Ii+1) + (H*Xi+1)] mod P =
982         #       [(H*Ii+1) + H^2*(Ii+Xi)] mod P
983         #
984         &movdqu         ($T1,&QWP(0,$inp));     # Ii
985         &movdqu         ($Xn,&QWP(16,$inp));    # Ii+1
986         &pshufb         ($T1,$T3);
987         &pshufb         ($Xn,$T3);
988         &pxor           ($Xi,$T1);              # Ii+Xi
989
990         &clmul64x64_T2  ($Xhn,$Xn,$Hkey);       # H*Ii+1
991         &movdqu         ($Hkey,&QWP(16,$Htbl)); # load H^2
992
993         &lea            ($inp,&DWP(32,$inp));   # i+=2
994         &sub            ($len,0x20);
995         &jbe            (&label("even_tail"));
996
997 &set_label("mod_loop");
998         &clmul64x64_T2  ($Xhi,$Xi,$Hkey);       # H^2*(Ii+Xi)
999         &movdqu         ($T1,&QWP(0,$inp));     # Ii
1000         &movdqu         ($Hkey,&QWP(0,$Htbl));  # load H
1001
1002         &pxor           ($Xi,$Xn);              # (H*Ii+1) + H^2*(Ii+Xi)
1003         &pxor           ($Xhi,$Xhn);
1004
1005         &movdqu         ($Xn,&QWP(16,$inp));    # Ii+1
1006         &pshufb         ($T1,$T3);
1007         &pshufb         ($Xn,$T3);
1008
1009         &movdqa         ($T3,$Xn);              #&clmul64x64_TX ($Xhn,$Xn,$Hkey); H*Ii+1
1010         &movdqa         ($Xhn,$Xn);
1011          &pxor          ($Xhi,$T1);             # "Ii+Xi", consume early
1012
1013           &movdqa       ($T1,$Xi)               #&reduction_alg9($Xhi,$Xi); 1st phase
1014           &psllq        ($Xi,1);
1015           &pxor         ($Xi,$T1);              #
1016           &psllq        ($Xi,5);                #
1017           &pxor         ($Xi,$T1);              #
1018         &pclmulqdq      ($Xn,$Hkey,0x00);       #######
1019           &psllq        ($Xi,57);               #
1020           &movdqa       ($T2,$Xi);              #
1021           &pslldq       ($Xi,8);
1022           &psrldq       ($T2,8);                #       
1023           &pxor         ($Xi,$T1);
1024         &pshufd         ($T1,$T3,0b01001110);
1025           &pxor         ($Xhi,$T2);             #
1026         &pxor           ($T1,$T3);
1027         &pshufd         ($T3,$Hkey,0b01001110);
1028         &pxor           ($T3,$Hkey);            #
1029
1030         &pclmulqdq      ($Xhn,$Hkey,0x11);      #######
1031           &movdqa       ($T2,$Xi);              # 2nd phase
1032           &psrlq        ($Xi,5);
1033           &pxor         ($Xi,$T2);              #
1034           &psrlq        ($Xi,1);                #
1035           &pxor         ($Xi,$T2);              #
1036           &pxor         ($T2,$Xhi);
1037           &psrlq        ($Xi,1);                #
1038           &pxor         ($Xi,$T2);              #
1039
1040         &pclmulqdq      ($T1,$T3,0x00);         #######
1041         &movdqu         ($Hkey,&QWP(16,$Htbl)); # load H^2
1042         &pxor           ($T1,$Xn);              #
1043         &pxor           ($T1,$Xhn);             #
1044
1045         &movdqa         ($T3,$T1);              #
1046         &psrldq         ($T1,8);
1047         &pslldq         ($T3,8);                #
1048         &pxor           ($Xhn,$T1);
1049         &pxor           ($Xn,$T3);              #
1050         &movdqa         ($T3,&QWP(0,$const));
1051
1052         &lea            ($inp,&DWP(32,$inp));
1053         &sub            ($len,0x20);
1054         &ja             (&label("mod_loop"));
1055
1056 &set_label("even_tail");
1057         &clmul64x64_T2  ($Xhi,$Xi,$Hkey);       # H^2*(Ii+Xi)
1058
1059         &pxor           ($Xi,$Xn);              # (H*Ii+1) + H^2*(Ii+Xi)
1060         &pxor           ($Xhi,$Xhn);
1061
1062         &reduction_alg9 ($Xhi,$Xi);
1063
1064         &test           ($len,$len);
1065         &jnz            (&label("done"));
1066
1067         &movdqu         ($Hkey,&QWP(0,$Htbl));  # load H
1068 &set_label("odd_tail");
1069         &movdqu         ($T1,&QWP(0,$inp));     # Ii
1070         &pshufb         ($T1,$T3);
1071         &pxor           ($Xi,$T1);              # Ii+Xi
1072
1073         &clmul64x64_T2  ($Xhi,$Xi,$Hkey);       # H*(Ii+Xi)
1074         &reduction_alg9 ($Xhi,$Xi);
1075
1076 &set_label("done");
1077         &pshufb         ($Xi,$T3);
1078         &movdqu         (&QWP(0,$Xip),$Xi);
1079 &function_end("gcm_ghash_clmul");
1080 \f
1081 } else {                # Algorith 5. Kept for reference purposes.
1082
1083 sub reduction_alg5 {    # 19/16 times faster than Intel version
1084 my ($Xhi,$Xi)=@_;
1085
1086         # <<1
1087         &movdqa         ($T1,$Xi);              #
1088         &movdqa         ($T2,$Xhi);
1089         &pslld          ($Xi,1);
1090         &pslld          ($Xhi,1);               #
1091         &psrld          ($T1,31);
1092         &psrld          ($T2,31);               #
1093         &movdqa         ($T3,$T1);
1094         &pslldq         ($T1,4);
1095         &psrldq         ($T3,12);               #
1096         &pslldq         ($T2,4);
1097         &por            ($Xhi,$T3);             #
1098         &por            ($Xi,$T1);
1099         &por            ($Xhi,$T2);             #
1100
1101         # 1st phase
1102         &movdqa         ($T1,$Xi);
1103         &movdqa         ($T2,$Xi);
1104         &movdqa         ($T3,$Xi);              #
1105         &pslld          ($T1,31);
1106         &pslld          ($T2,30);
1107         &pslld          ($Xi,25);               #
1108         &pxor           ($T1,$T2);
1109         &pxor           ($T1,$Xi);              #
1110         &movdqa         ($T2,$T1);              #
1111         &pslldq         ($T1,12);
1112         &psrldq         ($T2,4);                #
1113         &pxor           ($T3,$T1);
1114
1115         # 2nd phase
1116         &pxor           ($Xhi,$T3);             #
1117         &movdqa         ($Xi,$T3);
1118         &movdqa         ($T1,$T3);
1119         &psrld          ($Xi,1);                #
1120         &psrld          ($T1,2);
1121         &psrld          ($T3,7);                #
1122         &pxor           ($Xi,$T1);
1123         &pxor           ($Xhi,$T2);
1124         &pxor           ($Xi,$T3);              #
1125         &pxor           ($Xi,$Xhi);             #
1126 }
1127
1128 &function_begin_B("gcm_init_clmul");
1129         &mov            ($Htbl,&wparam(0));
1130         &mov            ($Xip,&wparam(1));
1131
1132         &call           (&label("pic"));
1133 &set_label("pic");
1134         &blindpop       ($const);
1135         &lea            ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
1136
1137         &movdqu         ($Hkey,&QWP(0,$Xip));
1138         &pshufd         ($Hkey,$Hkey,0b01001110);# dword swap
1139
1140         # calculate H^2
1141         &movdqa         ($Xi,$Hkey);
1142         &clmul64x64_T3  ($Xhi,$Xi,$Hkey);
1143         &reduction_alg5 ($Xhi,$Xi);
1144
1145         &movdqu         (&QWP(0,$Htbl),$Hkey);  # save H
1146         &movdqu         (&QWP(16,$Htbl),$Xi);   # save H^2
1147
1148         &ret            ();
1149 &function_end_B("gcm_init_clmul");
1150
1151 &function_begin_B("gcm_gmult_clmul");
1152         &mov            ($Xip,&wparam(0));
1153         &mov            ($Htbl,&wparam(1));
1154
1155         &call           (&label("pic"));
1156 &set_label("pic");
1157         &blindpop       ($const);
1158         &lea            ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
1159
1160         &movdqu         ($Xi,&QWP(0,$Xip));
1161         &movdqa         ($Xn,&QWP(0,$const));
1162         &movdqu         ($Hkey,&QWP(0,$Htbl));
1163         &pshufb         ($Xi,$Xn);
1164
1165         &clmul64x64_T3  ($Xhi,$Xi,$Hkey);
1166         &reduction_alg5 ($Xhi,$Xi);
1167
1168         &pshufb         ($Xi,$Xn);
1169         &movdqu         (&QWP(0,$Xip),$Xi);
1170
1171         &ret    ();
1172 &function_end_B("gcm_gmult_clmul");
1173
1174 &function_begin("gcm_ghash_clmul");
1175         &mov            ($Xip,&wparam(0));
1176         &mov            ($Htbl,&wparam(1));
1177         &mov            ($inp,&wparam(2));
1178         &mov            ($len,&wparam(3));
1179
1180         &call           (&label("pic"));
1181 &set_label("pic");
1182         &blindpop       ($const);
1183         &lea            ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
1184
1185         &movdqu         ($Xi,&QWP(0,$Xip));
1186         &movdqa         ($T3,&QWP(0,$const));
1187         &movdqu         ($Hkey,&QWP(0,$Htbl));
1188         &pshufb         ($Xi,$T3);
1189
1190         &sub            ($len,0x10);
1191         &jz             (&label("odd_tail"));
1192
1193         #######
1194         # Xi+2 =[H*(Ii+1 + Xi+1)] mod P =
1195         #       [(H*Ii+1) + (H*Xi+1)] mod P =
1196         #       [(H*Ii+1) + H^2*(Ii+Xi)] mod P
1197         #
1198         &movdqu         ($T1,&QWP(0,$inp));     # Ii
1199         &movdqu         ($Xn,&QWP(16,$inp));    # Ii+1
1200         &pshufb         ($T1,$T3);
1201         &pshufb         ($Xn,$T3);
1202         &pxor           ($Xi,$T1);              # Ii+Xi
1203
1204         &clmul64x64_T3  ($Xhn,$Xn,$Hkey);       # H*Ii+1
1205         &movdqu         ($Hkey,&QWP(16,$Htbl)); # load H^2
1206
1207         &sub            ($len,0x20);
1208         &lea            ($inp,&DWP(32,$inp));   # i+=2
1209         &jbe            (&label("even_tail"));
1210
1211 &set_label("mod_loop");
1212         &clmul64x64_T3  ($Xhi,$Xi,$Hkey);       # H^2*(Ii+Xi)
1213         &movdqu         ($Hkey,&QWP(0,$Htbl));  # load H
1214
1215         &pxor           ($Xi,$Xn);              # (H*Ii+1) + H^2*(Ii+Xi)
1216         &pxor           ($Xhi,$Xhn);
1217
1218         &reduction_alg5 ($Xhi,$Xi);
1219
1220         #######
1221         &movdqa         ($T3,&QWP(0,$const));
1222         &movdqu         ($T1,&QWP(0,$inp));     # Ii
1223         &movdqu         ($Xn,&QWP(16,$inp));    # Ii+1
1224         &pshufb         ($T1,$T3);
1225         &pshufb         ($Xn,$T3);
1226         &pxor           ($Xi,$T1);              # Ii+Xi
1227
1228         &clmul64x64_T3  ($Xhn,$Xn,$Hkey);       # H*Ii+1
1229         &movdqu         ($Hkey,&QWP(16,$Htbl)); # load H^2
1230
1231         &sub            ($len,0x20);
1232         &lea            ($inp,&DWP(32,$inp));
1233         &ja             (&label("mod_loop"));
1234
1235 &set_label("even_tail");
1236         &clmul64x64_T3  ($Xhi,$Xi,$Hkey);       # H^2*(Ii+Xi)
1237
1238         &pxor           ($Xi,$Xn);              # (H*Ii+1) + H^2*(Ii+Xi)
1239         &pxor           ($Xhi,$Xhn);
1240
1241         &reduction_alg5 ($Xhi,$Xi);
1242
1243         &movdqa         ($T3,&QWP(0,$const));
1244         &test           ($len,$len);
1245         &jnz            (&label("done"));
1246
1247         &movdqu         ($Hkey,&QWP(0,$Htbl));  # load H
1248 &set_label("odd_tail");
1249         &movdqu         ($T1,&QWP(0,$inp));     # Ii
1250         &pshufb         ($T1,$T3);
1251         &pxor           ($Xi,$T1);              # Ii+Xi
1252
1253         &clmul64x64_T3  ($Xhi,$Xi,$Hkey);       # H*(Ii+Xi)
1254         &reduction_alg5 ($Xhi,$Xi);
1255
1256         &movdqa         ($T3,&QWP(0,$const));
1257 &set_label("done");
1258         &pshufb         ($Xi,$T3);
1259         &movdqu         (&QWP(0,$Xip),$Xi);
1260 &function_end("gcm_ghash_clmul");
1261
1262 }
1263 \f
1264 &set_label("bswap",64);
1265         &data_byte(15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0);
1266         &data_byte(1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0xc2); # 0x1c2_polynomial
1267 }}      # $sse2
1268
1269 &set_label("rem_4bit",64);
1270         &data_word(0,0x0000<<$S,0,0x1C20<<$S,0,0x3840<<$S,0,0x2460<<$S);
1271         &data_word(0,0x7080<<$S,0,0x6CA0<<$S,0,0x48C0<<$S,0,0x54E0<<$S);
1272         &data_word(0,0xE100<<$S,0,0xFD20<<$S,0,0xD940<<$S,0,0xC560<<$S);
1273         &data_word(0,0x9180<<$S,0,0x8DA0<<$S,0,0xA9C0<<$S,0,0xB5E0<<$S);
1274 &set_label("rem_8bit",64);
1275         &data_short(0x0000,0x01C2,0x0384,0x0246,0x0708,0x06CA,0x048C,0x054E);
1276         &data_short(0x0E10,0x0FD2,0x0D94,0x0C56,0x0918,0x08DA,0x0A9C,0x0B5E);
1277         &data_short(0x1C20,0x1DE2,0x1FA4,0x1E66,0x1B28,0x1AEA,0x18AC,0x196E);
1278         &data_short(0x1230,0x13F2,0x11B4,0x1076,0x1538,0x14FA,0x16BC,0x177E);
1279         &data_short(0x3840,0x3982,0x3BC4,0x3A06,0x3F48,0x3E8A,0x3CCC,0x3D0E);
1280         &data_short(0x3650,0x3792,0x35D4,0x3416,0x3158,0x309A,0x32DC,0x331E);
1281         &data_short(0x2460,0x25A2,0x27E4,0x2626,0x2368,0x22AA,0x20EC,0x212E);
1282         &data_short(0x2A70,0x2BB2,0x29F4,0x2836,0x2D78,0x2CBA,0x2EFC,0x2F3E);
1283         &data_short(0x7080,0x7142,0x7304,0x72C6,0x7788,0x764A,0x740C,0x75CE);
1284         &data_short(0x7E90,0x7F52,0x7D14,0x7CD6,0x7998,0x785A,0x7A1C,0x7BDE);
1285         &data_short(0x6CA0,0x6D62,0x6F24,0x6EE6,0x6BA8,0x6A6A,0x682C,0x69EE);
1286         &data_short(0x62B0,0x6372,0x6134,0x60F6,0x65B8,0x647A,0x663C,0x67FE);
1287         &data_short(0x48C0,0x4902,0x4B44,0x4A86,0x4FC8,0x4E0A,0x4C4C,0x4D8E);
1288         &data_short(0x46D0,0x4712,0x4554,0x4496,0x41D8,0x401A,0x425C,0x439E);
1289         &data_short(0x54E0,0x5522,0x5764,0x56A6,0x53E8,0x522A,0x506C,0x51AE);
1290         &data_short(0x5AF0,0x5B32,0x5974,0x58B6,0x5DF8,0x5C3A,0x5E7C,0x5FBE);
1291         &data_short(0xE100,0xE0C2,0xE284,0xE346,0xE608,0xE7CA,0xE58C,0xE44E);
1292         &data_short(0xEF10,0xEED2,0xEC94,0xED56,0xE818,0xE9DA,0xEB9C,0xEA5E);
1293         &data_short(0xFD20,0xFCE2,0xFEA4,0xFF66,0xFA28,0xFBEA,0xF9AC,0xF86E);
1294         &data_short(0xF330,0xF2F2,0xF0B4,0xF176,0xF438,0xF5FA,0xF7BC,0xF67E);
1295         &data_short(0xD940,0xD882,0xDAC4,0xDB06,0xDE48,0xDF8A,0xDDCC,0xDC0E);
1296         &data_short(0xD750,0xD692,0xD4D4,0xD516,0xD058,0xD19A,0xD3DC,0xD21E);
1297         &data_short(0xC560,0xC4A2,0xC6E4,0xC726,0xC268,0xC3AA,0xC1EC,0xC02E);
1298         &data_short(0xCB70,0xCAB2,0xC8F4,0xC936,0xCC78,0xCDBA,0xCFFC,0xCE3E);
1299         &data_short(0x9180,0x9042,0x9204,0x93C6,0x9688,0x974A,0x950C,0x94CE);
1300         &data_short(0x9F90,0x9E52,0x9C14,0x9DD6,0x9898,0x995A,0x9B1C,0x9ADE);
1301         &data_short(0x8DA0,0x8C62,0x8E24,0x8FE6,0x8AA8,0x8B6A,0x892C,0x88EE);
1302         &data_short(0x83B0,0x8272,0x8034,0x81F6,0x84B8,0x857A,0x873C,0x86FE);
1303         &data_short(0xA9C0,0xA802,0xAA44,0xAB86,0xAEC8,0xAF0A,0xAD4C,0xAC8E);
1304         &data_short(0xA7D0,0xA612,0xA454,0xA596,0xA0D8,0xA11A,0xA35C,0xA29E);
1305         &data_short(0xB5E0,0xB422,0xB664,0xB7A6,0xB2E8,0xB32A,0xB16C,0xB0AE);
1306         &data_short(0xBBF0,0xBA32,0xB874,0xB9B6,0xBCF8,0xBD3A,0xBF7C,0xBEBE);
1307 }}}     # !$x86only
1308
1309 &asciz("GHASH for x86, CRYPTOGAMS by <appro\@openssl.org>");
1310 &asm_finish();
1311
1312 # A question was risen about choice of vanilla MMX. Or rather why wasn't
1313 # SSE2 chosen instead? In addition to the fact that MMX runs on legacy
1314 # CPUs such as PIII, "4-bit" MMX version was observed to provide better
1315 # performance than *corresponding* SSE2 one even on contemporary CPUs.
1316 # SSE2 results were provided by Peter-Michael Hager. He maintains SSE2
1317 # implementation featuring full range of lookup-table sizes, but with
1318 # per-invocation lookup table setup. Latter means that table size is
1319 # chosen depending on how much data is to be hashed in every given call,
1320 # more data - larger table. Best reported result for Core2 is ~4 cycles
1321 # per processed byte out of 64KB block. This number accounts even for
1322 # 64KB table setup overhead. As discussed in gcm128.c we choose to be
1323 # more conservative in respect to lookup table sizes, but how do the
1324 # results compare? Minimalistic "256B" MMX version delivers ~11 cycles
1325 # on same platform. As also discussed in gcm128.c, next in line "8-bit
1326 # Shoup's" or "4KB" method should deliver twice the performance of
1327 # "256B" one, in other words not worse than ~6 cycles per byte. It
1328 # should be also be noted that in SSE2 case improvement can be "super-
1329 # linear," i.e. more than twice, mostly because >>8 maps to single
1330 # instruction on SSE2 register. This is unlike "4-bit" case when >>4
1331 # maps to same amount of instructions in both MMX and SSE2 cases.
1332 # Bottom line is that switch to SSE2 is considered to be justifiable
1333 # only in case we choose to implement "8-bit" method...