Fix clang errors
[openssl.git] / crypto / armv4cpuid.pl
1 #!/usr/bin/env perl
2
3 $flavour = shift;
4 $output  = shift;
5
6 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
7 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
8 ( $xlate="${dir}perlasm/arm-xlate.pl" and -f $xlate) or
9 die "can't locate arm-xlate.pl";
10
11 open OUT,"| \"$^X\" $xlate $flavour $output";
12 *STDOUT=*OUT;
13
14 $code.=<<___;
15 #include "arm_arch.h"
16
17 .text
18 #if defined(__thumb2__) && !defined(__APPLE__)
19 .syntax unified
20 .thumb
21 #else
22 .code   32
23 #endif
24
25 .align  5
26 .global OPENSSL_atomic_add
27 .type   OPENSSL_atomic_add,%function
28 OPENSSL_atomic_add:
29 #if __ARM_ARCH__>=6
30 .Ladd:  ldrex   r2,[r0]
31         add     r3,r2,r1
32         strex   r2,r3,[r0]
33         cmp     r2,#0
34         bne     .Ladd
35         mov     r0,r3
36         bx      lr
37 #else
38         stmdb   sp!,{r4-r6,lr}
39         ldr     r2,.Lspinlock
40         adr     r3,.Lspinlock
41         mov     r4,r0
42         mov     r5,r1
43         add     r6,r3,r2        @ &spinlock
44         b       .+8
45 .Lspin: bl      sched_yield
46         mov     r0,#-1
47         swp     r0,r0,[r6]
48         cmp     r0,#0
49         bne     .Lspin
50
51         ldr     r2,[r4]
52         add     r2,r2,r5
53         str     r2,[r4]
54         str     r0,[r6]         @ release spinlock
55         ldmia   sp!,{r4-r6,lr}
56         tst     lr,#1
57         moveq   pc,lr
58         .word   0xe12fff1e      @ bx    lr
59 #endif
60 .size   OPENSSL_atomic_add,.-OPENSSL_atomic_add
61
62 .global OPENSSL_cleanse
63 .type   OPENSSL_cleanse,%function
64 OPENSSL_cleanse:
65         eor     ip,ip,ip
66         cmp     r1,#7
67 #ifdef  __thumb2__
68         itt     hs
69 #endif
70         subhs   r1,r1,#4
71         bhs     .Lot
72         cmp     r1,#0
73         beq     .Lcleanse_done
74 .Little:
75         strb    ip,[r0],#1
76         subs    r1,r1,#1
77         bhi     .Little
78         b       .Lcleanse_done
79
80 .Lot:   tst     r0,#3
81         beq     .Laligned
82         strb    ip,[r0],#1
83         sub     r1,r1,#1
84         b       .Lot
85 .Laligned:
86         str     ip,[r0],#4
87         subs    r1,r1,#4
88         bhs     .Laligned
89         adds    r1,r1,#4
90         bne     .Little
91 .Lcleanse_done:
92 #if __ARM_ARCH__>=5
93         bx      lr
94 #else
95         tst     lr,#1
96         moveq   pc,lr
97         .word   0xe12fff1e      @ bx    lr
98 #endif
99 .size   OPENSSL_cleanse,.-OPENSSL_cleanse
100
101 #if __ARM_MAX_ARCH__>=7
102 .arch   armv7-a
103 .fpu    neon
104
105 .align  5
106 .global _armv7_neon_probe
107 .type   _armv7_neon_probe,%function
108 _armv7_neon_probe:
109         vorr    q0,q0,q0
110         bx      lr
111 .size   _armv7_neon_probe,.-_armv7_neon_probe
112
113 .global _armv7_tick
114 .type   _armv7_tick,%function
115 _armv7_tick:
116 #ifdef  __APPLE__
117         mrrc    p15,0,r0,r1,c14         @ CNTPCT
118 #else
119         mrrc    p15,1,r0,r1,c14         @ CNTVCT
120 #endif
121         bx      lr
122 .size   _armv7_tick,.-_armv7_tick
123
124 .global _armv8_aes_probe
125 .type   _armv8_aes_probe,%function
126 _armv8_aes_probe:
127 #if defined(__thumb2__) && !defined(__APPLE__)
128         .byte   0xb0,0xff,0x00,0x03     @ aese.8        q0,q0
129 #else
130         .byte   0x00,0x03,0xb0,0xf3     @ aese.8        q0,q0
131 #endif
132         bx      lr
133 .size   _armv8_aes_probe,.-_armv8_aes_probe
134
135 .global _armv8_sha1_probe
136 .type   _armv8_sha1_probe,%function
137 _armv8_sha1_probe:
138 #if defined(__thumb2__) && !defined(__APPLE__)
139         .byte   0x00,0xef,0x40,0x0c     @ sha1c.32      q0,q0,q0
140 #else
141         .byte   0x40,0x0c,0x00,0xf2     @ sha1c.32      q0,q0,q0
142 #endif
143         bx      lr
144 .size   _armv8_sha1_probe,.-_armv8_sha1_probe
145
146 .global _armv8_sha256_probe
147 .type   _armv8_sha256_probe,%function
148 _armv8_sha256_probe:
149 #if defined(__thumb2__) && !defined(__APPLE__)
150         .byte   0x00,0xff,0x40,0x0c     @ sha256h.32    q0,q0,q0
151 #else
152         .byte   0x40,0x0c,0x00,0xf3     @ sha256h.32    q0,q0,q0
153 #endif
154         bx      lr
155 .size   _armv8_sha256_probe,.-_armv8_sha256_probe
156 .global _armv8_pmull_probe
157 .type   _armv8_pmull_probe,%function
158 _armv8_pmull_probe:
159 #if defined(__thumb2__) && !defined(__APPLE__)
160         .byte   0xa0,0xef,0x00,0x0e     @ vmull.p64     q0,d0,d0
161 #else
162         .byte   0x00,0x0e,0xa0,0xf2     @ vmull.p64     q0,d0,d0
163 #endif
164         bx      lr
165 .size   _armv8_pmull_probe,.-_armv8_pmull_probe
166 #endif
167
168 .global OPENSSL_wipe_cpu
169 .type   OPENSSL_wipe_cpu,%function
170 OPENSSL_wipe_cpu:
171 #if __ARM_MAX_ARCH__>=7
172         ldr     r0,.LOPENSSL_armcap
173         adr     r1,.LOPENSSL_armcap
174         ldr     r0,[r1,r0]
175 #ifdef  __APPLE__
176         ldr     r0,[r0]
177 #endif
178 #endif
179         eor     r2,r2,r2
180         eor     r3,r3,r3
181         eor     ip,ip,ip
182 #if __ARM_MAX_ARCH__>=7
183         tst     r0,#1
184         beq     .Lwipe_done
185         veor    q0, q0, q0
186         veor    q1, q1, q1
187         veor    q2, q2, q2
188         veor    q3, q3, q3
189         veor    q8, q8, q8
190         veor    q9, q9, q9
191         veor    q10, q10, q10
192         veor    q11, q11, q11
193         veor    q12, q12, q12
194         veor    q13, q13, q13
195         veor    q14, q14, q14
196         veor    q15, q15, q15
197 .Lwipe_done:
198 #endif
199         mov     r0,sp
200 #if __ARM_ARCH__>=5
201         bx      lr
202 #else
203         tst     lr,#1
204         moveq   pc,lr
205         .word   0xe12fff1e      @ bx    lr
206 #endif
207 .size   OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu
208
209 .global OPENSSL_instrument_bus
210 .type   OPENSSL_instrument_bus,%function
211 OPENSSL_instrument_bus:
212         eor     r0,r0,r0
213 #if __ARM_ARCH__>=5
214         bx      lr
215 #else
216         tst     lr,#1
217         moveq   pc,lr
218         .word   0xe12fff1e      @ bx    lr
219 #endif
220 .size   OPENSSL_instrument_bus,.-OPENSSL_instrument_bus
221
222 .global OPENSSL_instrument_bus2
223 .type   OPENSSL_instrument_bus2,%function
224 OPENSSL_instrument_bus2:
225         eor     r0,r0,r0
226 #if __ARM_ARCH__>=5
227         bx      lr
228 #else
229         tst     lr,#1
230         moveq   pc,lr
231         .word   0xe12fff1e      @ bx    lr
232 #endif
233 .size   OPENSSL_instrument_bus2,.-OPENSSL_instrument_bus2
234
235 .align  5
236 #if __ARM_MAX_ARCH__>=7
237 .LOPENSSL_armcap:
238 .word   OPENSSL_armcap_P-.
239 #endif
240 #if __ARM_ARCH__>=6
241 .align  5
242 #else
243 .Lspinlock:
244 .word   atomic_add_spinlock-.Lspinlock
245 .align  5
246
247 .data
248 .align  2
249 atomic_add_spinlock:
250 .word   0
251 #endif
252
253 .comm   OPENSSL_armcap_P,4,4
254 .hidden OPENSSL_armcap_P
255 ___
256
257 print $code;
258 close STDOUT;