key zeroisation fix for p12
[openssl.git] / crypto / armv4cpuid.pl
1 #! /usr/bin/env perl
2 # Copyright 2015-2018 The OpenSSL Project Authors. All Rights Reserved.
3 #
4 # Licensed under the OpenSSL license (the "License").  You may not use
5 # this file except in compliance with the License.  You can obtain a copy
6 # in the file LICENSE in the source distribution or at
7 # https://www.openssl.org/source/license.html
8
9
10 $flavour = shift;
11 $output  = shift;
12
13 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
14 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
15 ( $xlate="${dir}perlasm/arm-xlate.pl" and -f $xlate) or
16 die "can't locate arm-xlate.pl";
17
18 open OUT,"| \"$^X\" $xlate $flavour $output";
19 *STDOUT=*OUT;
20
21 $code.=<<___;
22 #include "arm_arch.h"
23
24 .text
25 #if defined(__thumb2__) && !defined(__APPLE__)
26 .syntax unified
27 .thumb
28 #else
29 .code   32
30 #undef  __thumb2__
31 #endif
32
33 .align  5
34 .global OPENSSL_atomic_add
35 .type   OPENSSL_atomic_add,%function
36 OPENSSL_atomic_add:
37 #if __ARM_ARCH__>=6
38 .Ladd:  ldrex   r2,[r0]
39         add     r3,r2,r1
40         strex   r2,r3,[r0]
41         cmp     r2,#0
42         bne     .Ladd
43         mov     r0,r3
44         bx      lr
45 #else
46         stmdb   sp!,{r4-r6,lr}
47         ldr     r2,.Lspinlock
48         adr     r3,.Lspinlock
49         mov     r4,r0
50         mov     r5,r1
51         add     r6,r3,r2        @ &spinlock
52         b       .+8
53 .Lspin: bl      sched_yield
54         mov     r0,#-1
55         swp     r0,r0,[r6]
56         cmp     r0,#0
57         bne     .Lspin
58
59         ldr     r2,[r4]
60         add     r2,r2,r5
61         str     r2,[r4]
62         str     r0,[r6]         @ release spinlock
63         ldmia   sp!,{r4-r6,lr}
64         tst     lr,#1
65         moveq   pc,lr
66         .word   0xe12fff1e      @ bx    lr
67 #endif
68 .size   OPENSSL_atomic_add,.-OPENSSL_atomic_add
69
70 .global OPENSSL_cleanse
71 .type   OPENSSL_cleanse,%function
72 OPENSSL_cleanse:
73         eor     ip,ip,ip
74         cmp     r1,#7
75 #ifdef  __thumb2__
76         itt     hs
77 #endif
78         subhs   r1,r1,#4
79         bhs     .Lot
80         cmp     r1,#0
81         beq     .Lcleanse_done
82 .Little:
83         strb    ip,[r0],#1
84         subs    r1,r1,#1
85         bhi     .Little
86         b       .Lcleanse_done
87
88 .Lot:   tst     r0,#3
89         beq     .Laligned
90         strb    ip,[r0],#1
91         sub     r1,r1,#1
92         b       .Lot
93 .Laligned:
94         str     ip,[r0],#4
95         subs    r1,r1,#4
96         bhs     .Laligned
97         adds    r1,r1,#4
98         bne     .Little
99 .Lcleanse_done:
100 #if __ARM_ARCH__>=5
101         bx      lr
102 #else
103         tst     lr,#1
104         moveq   pc,lr
105         .word   0xe12fff1e      @ bx    lr
106 #endif
107 .size   OPENSSL_cleanse,.-OPENSSL_cleanse
108
109 .global CRYPTO_memcmp
110 .type   CRYPTO_memcmp,%function
111 .align  4
112 CRYPTO_memcmp:
113         eor     ip,ip,ip
114         cmp     r2,#0
115         beq     .Lno_data
116         stmdb   sp!,{r4,r5}
117
118 .Loop_cmp:
119         ldrb    r4,[r0],#1
120         ldrb    r5,[r1],#1
121         eor     r4,r4,r5
122         orr     ip,ip,r4
123         subs    r2,r2,#1
124         bne     .Loop_cmp
125
126         ldmia   sp!,{r4,r5}
127 .Lno_data:
128         rsb     r0,ip,#0
129         mov     r0,r0,lsr#31
130 #if __ARM_ARCH__>=5
131         bx      lr
132 #else
133         tst     lr,#1
134         moveq   pc,lr
135         .word   0xe12fff1e      @ bx    lr
136 #endif
137 .size   CRYPTO_memcmp,.-CRYPTO_memcmp
138
139 #if __ARM_MAX_ARCH__>=7
140 .arch   armv7-a
141 .fpu    neon
142
143 .align  5
144 .global _armv7_neon_probe
145 .type   _armv7_neon_probe,%function
146 _armv7_neon_probe:
147         vorr    q0,q0,q0
148         bx      lr
149 .size   _armv7_neon_probe,.-_armv7_neon_probe
150
151 .global _armv7_tick
152 .type   _armv7_tick,%function
153 _armv7_tick:
154 #ifdef  __APPLE__
155         mrrc    p15,0,r0,r1,c14         @ CNTPCT
156 #else
157         mrrc    p15,1,r0,r1,c14         @ CNTVCT
158 #endif
159         bx      lr
160 .size   _armv7_tick,.-_armv7_tick
161
162 .global _armv8_aes_probe
163 .type   _armv8_aes_probe,%function
164 _armv8_aes_probe:
165 #if defined(__thumb2__) && !defined(__APPLE__)
166         .byte   0xb0,0xff,0x00,0x03     @ aese.8        q0,q0
167 #else
168         .byte   0x00,0x03,0xb0,0xf3     @ aese.8        q0,q0
169 #endif
170         bx      lr
171 .size   _armv8_aes_probe,.-_armv8_aes_probe
172
173 .global _armv8_sha1_probe
174 .type   _armv8_sha1_probe,%function
175 _armv8_sha1_probe:
176 #if defined(__thumb2__) && !defined(__APPLE__)
177         .byte   0x00,0xef,0x40,0x0c     @ sha1c.32      q0,q0,q0
178 #else
179         .byte   0x40,0x0c,0x00,0xf2     @ sha1c.32      q0,q0,q0
180 #endif
181         bx      lr
182 .size   _armv8_sha1_probe,.-_armv8_sha1_probe
183
184 .global _armv8_sha256_probe
185 .type   _armv8_sha256_probe,%function
186 _armv8_sha256_probe:
187 #if defined(__thumb2__) && !defined(__APPLE__)
188         .byte   0x00,0xff,0x40,0x0c     @ sha256h.32    q0,q0,q0
189 #else
190         .byte   0x40,0x0c,0x00,0xf3     @ sha256h.32    q0,q0,q0
191 #endif
192         bx      lr
193 .size   _armv8_sha256_probe,.-_armv8_sha256_probe
194 .global _armv8_pmull_probe
195 .type   _armv8_pmull_probe,%function
196 _armv8_pmull_probe:
197 #if defined(__thumb2__) && !defined(__APPLE__)
198         .byte   0xa0,0xef,0x00,0x0e     @ vmull.p64     q0,d0,d0
199 #else
200         .byte   0x00,0x0e,0xa0,0xf2     @ vmull.p64     q0,d0,d0
201 #endif
202         bx      lr
203 .size   _armv8_pmull_probe,.-_armv8_pmull_probe
204 #endif
205
206 .global OPENSSL_wipe_cpu
207 .type   OPENSSL_wipe_cpu,%function
208 OPENSSL_wipe_cpu:
209 #if __ARM_MAX_ARCH__>=7
210         ldr     r0,.LOPENSSL_armcap
211         adr     r1,.LOPENSSL_armcap
212         ldr     r0,[r1,r0]
213 #ifdef  __APPLE__
214         ldr     r0,[r0]
215 #endif
216 #endif
217         eor     r2,r2,r2
218         eor     r3,r3,r3
219         eor     ip,ip,ip
220 #if __ARM_MAX_ARCH__>=7
221         tst     r0,#1
222         beq     .Lwipe_done
223         veor    q0, q0, q0
224         veor    q1, q1, q1
225         veor    q2, q2, q2
226         veor    q3, q3, q3
227         veor    q8, q8, q8
228         veor    q9, q9, q9
229         veor    q10, q10, q10
230         veor    q11, q11, q11
231         veor    q12, q12, q12
232         veor    q13, q13, q13
233         veor    q14, q14, q14
234         veor    q15, q15, q15
235 .Lwipe_done:
236 #endif
237         mov     r0,sp
238 #if __ARM_ARCH__>=5
239         bx      lr
240 #else
241         tst     lr,#1
242         moveq   pc,lr
243         .word   0xe12fff1e      @ bx    lr
244 #endif
245 .size   OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu
246
247 .global OPENSSL_instrument_bus
248 .type   OPENSSL_instrument_bus,%function
249 OPENSSL_instrument_bus:
250         eor     r0,r0,r0
251 #if __ARM_ARCH__>=5
252         bx      lr
253 #else
254         tst     lr,#1
255         moveq   pc,lr
256         .word   0xe12fff1e      @ bx    lr
257 #endif
258 .size   OPENSSL_instrument_bus,.-OPENSSL_instrument_bus
259
260 .global OPENSSL_instrument_bus2
261 .type   OPENSSL_instrument_bus2,%function
262 OPENSSL_instrument_bus2:
263         eor     r0,r0,r0
264 #if __ARM_ARCH__>=5
265         bx      lr
266 #else
267         tst     lr,#1
268         moveq   pc,lr
269         .word   0xe12fff1e      @ bx    lr
270 #endif
271 .size   OPENSSL_instrument_bus2,.-OPENSSL_instrument_bus2
272
273 .align  5
274 #if __ARM_MAX_ARCH__>=7
275 .LOPENSSL_armcap:
276 .word   OPENSSL_armcap_P-.
277 #endif
278 #if __ARM_ARCH__>=6
279 .align  5
280 #else
281 .Lspinlock:
282 .word   atomic_add_spinlock-.Lspinlock
283 .align  5
284
285 .data
286 .align  2
287 atomic_add_spinlock:
288 .word   0
289 #endif
290
291 .comm   OPENSSL_armcap_P,4,4
292 .hidden OPENSSL_armcap_P
293 ___
294
295 print $code;
296 close STDOUT;