Fix potential access of null pointer (pp)
[openssl.git] / crypto / armv4cpuid.pl
1 #! /usr/bin/env perl
2 # Copyright 2015-2016 The OpenSSL Project Authors. All Rights Reserved.
3 #
4 # Licensed under the OpenSSL license (the "License").  You may not use
5 # this file except in compliance with the License.  You can obtain a copy
6 # in the file LICENSE in the source distribution or at
7 # https://www.openssl.org/source/license.html
8
9
10 $flavour = shift;
11 $output  = shift;
12
13 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
14 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
15 ( $xlate="${dir}perlasm/arm-xlate.pl" and -f $xlate) or
16 die "can't locate arm-xlate.pl";
17
18 open OUT,"| \"$^X\" $xlate $flavour $output";
19 *STDOUT=*OUT;
20
21 $code.=<<___;
22 #include "arm_arch.h"
23
24 .text
25 #if defined(__thumb2__) && !defined(__APPLE__)
26 .syntax unified
27 .thumb
28 #else
29 .code   32
30 #endif
31
32 .align  5
33 .global OPENSSL_atomic_add
34 .type   OPENSSL_atomic_add,%function
35 OPENSSL_atomic_add:
36 #if __ARM_ARCH__>=6
37 .Ladd:  ldrex   r2,[r0]
38         add     r3,r2,r1
39         strex   r2,r3,[r0]
40         cmp     r2,#0
41         bne     .Ladd
42         mov     r0,r3
43         bx      lr
44 #else
45         stmdb   sp!,{r4-r6,lr}
46         ldr     r2,.Lspinlock
47         adr     r3,.Lspinlock
48         mov     r4,r0
49         mov     r5,r1
50         add     r6,r3,r2        @ &spinlock
51         b       .+8
52 .Lspin: bl      sched_yield
53         mov     r0,#-1
54         swp     r0,r0,[r6]
55         cmp     r0,#0
56         bne     .Lspin
57
58         ldr     r2,[r4]
59         add     r2,r2,r5
60         str     r2,[r4]
61         str     r0,[r6]         @ release spinlock
62         ldmia   sp!,{r4-r6,lr}
63         tst     lr,#1
64         moveq   pc,lr
65         .word   0xe12fff1e      @ bx    lr
66 #endif
67 .size   OPENSSL_atomic_add,.-OPENSSL_atomic_add
68
69 .global OPENSSL_cleanse
70 .type   OPENSSL_cleanse,%function
71 OPENSSL_cleanse:
72         eor     ip,ip,ip
73         cmp     r1,#7
74 #ifdef  __thumb2__
75         itt     hs
76 #endif
77         subhs   r1,r1,#4
78         bhs     .Lot
79         cmp     r1,#0
80         beq     .Lcleanse_done
81 .Little:
82         strb    ip,[r0],#1
83         subs    r1,r1,#1
84         bhi     .Little
85         b       .Lcleanse_done
86
87 .Lot:   tst     r0,#3
88         beq     .Laligned
89         strb    ip,[r0],#1
90         sub     r1,r1,#1
91         b       .Lot
92 .Laligned:
93         str     ip,[r0],#4
94         subs    r1,r1,#4
95         bhs     .Laligned
96         adds    r1,r1,#4
97         bne     .Little
98 .Lcleanse_done:
99 #if __ARM_ARCH__>=5
100         bx      lr
101 #else
102         tst     lr,#1
103         moveq   pc,lr
104         .word   0xe12fff1e      @ bx    lr
105 #endif
106 .size   OPENSSL_cleanse,.-OPENSSL_cleanse
107
108 .global CRYPTO_memcmp
109 .type   CRYPTO_memcmp,%function
110 .align  4
111 CRYPTO_memcmp:
112         eor     ip,ip,ip
113         cmp     r2,#0
114         beq     .Lno_data
115         stmdb   sp!,{r4,r5}
116
117 .Loop_cmp:
118         ldrb    r4,[r0],#1
119         ldrb    r5,[r1],#1
120         eor     r4,r4,r5
121         orr     ip,ip,r4
122         subs    r2,r2,#1
123         bne     .Loop_cmp
124
125         ldmia   sp!,{r4,r5}
126 .Lno_data:
127         neg     r0,ip
128         mov     r0,r0,lsr#31
129 #if __ARM_ARCH__>=5
130         bx      lr
131 #else
132         tst     lr,#1
133         moveq   pc,lr
134         .word   0xe12fff1e      @ bx    lr
135 #endif
136 .size   CRYPTO_memcmp,.-CRYPTO_memcmp
137
138 #if __ARM_MAX_ARCH__>=7
139 .arch   armv7-a
140 .fpu    neon
141
142 .align  5
143 .global _armv7_neon_probe
144 .type   _armv7_neon_probe,%function
145 _armv7_neon_probe:
146         vorr    q0,q0,q0
147         bx      lr
148 .size   _armv7_neon_probe,.-_armv7_neon_probe
149
150 .global _armv7_tick
151 .type   _armv7_tick,%function
152 _armv7_tick:
153 #ifdef  __APPLE__
154         mrrc    p15,0,r0,r1,c14         @ CNTPCT
155 #else
156         mrrc    p15,1,r0,r1,c14         @ CNTVCT
157 #endif
158         bx      lr
159 .size   _armv7_tick,.-_armv7_tick
160
161 .global _armv8_aes_probe
162 .type   _armv8_aes_probe,%function
163 _armv8_aes_probe:
164 #if defined(__thumb2__) && !defined(__APPLE__)
165         .byte   0xb0,0xff,0x00,0x03     @ aese.8        q0,q0
166 #else
167         .byte   0x00,0x03,0xb0,0xf3     @ aese.8        q0,q0
168 #endif
169         bx      lr
170 .size   _armv8_aes_probe,.-_armv8_aes_probe
171
172 .global _armv8_sha1_probe
173 .type   _armv8_sha1_probe,%function
174 _armv8_sha1_probe:
175 #if defined(__thumb2__) && !defined(__APPLE__)
176         .byte   0x00,0xef,0x40,0x0c     @ sha1c.32      q0,q0,q0
177 #else
178         .byte   0x40,0x0c,0x00,0xf2     @ sha1c.32      q0,q0,q0
179 #endif
180         bx      lr
181 .size   _armv8_sha1_probe,.-_armv8_sha1_probe
182
183 .global _armv8_sha256_probe
184 .type   _armv8_sha256_probe,%function
185 _armv8_sha256_probe:
186 #if defined(__thumb2__) && !defined(__APPLE__)
187         .byte   0x00,0xff,0x40,0x0c     @ sha256h.32    q0,q0,q0
188 #else
189         .byte   0x40,0x0c,0x00,0xf3     @ sha256h.32    q0,q0,q0
190 #endif
191         bx      lr
192 .size   _armv8_sha256_probe,.-_armv8_sha256_probe
193 .global _armv8_pmull_probe
194 .type   _armv8_pmull_probe,%function
195 _armv8_pmull_probe:
196 #if defined(__thumb2__) && !defined(__APPLE__)
197         .byte   0xa0,0xef,0x00,0x0e     @ vmull.p64     q0,d0,d0
198 #else
199         .byte   0x00,0x0e,0xa0,0xf2     @ vmull.p64     q0,d0,d0
200 #endif
201         bx      lr
202 .size   _armv8_pmull_probe,.-_armv8_pmull_probe
203 #endif
204
205 .global OPENSSL_wipe_cpu
206 .type   OPENSSL_wipe_cpu,%function
207 OPENSSL_wipe_cpu:
208 #if __ARM_MAX_ARCH__>=7
209         ldr     r0,.LOPENSSL_armcap
210         adr     r1,.LOPENSSL_armcap
211         ldr     r0,[r1,r0]
212 #ifdef  __APPLE__
213         ldr     r0,[r0]
214 #endif
215 #endif
216         eor     r2,r2,r2
217         eor     r3,r3,r3
218         eor     ip,ip,ip
219 #if __ARM_MAX_ARCH__>=7
220         tst     r0,#1
221         beq     .Lwipe_done
222         veor    q0, q0, q0
223         veor    q1, q1, q1
224         veor    q2, q2, q2
225         veor    q3, q3, q3
226         veor    q8, q8, q8
227         veor    q9, q9, q9
228         veor    q10, q10, q10
229         veor    q11, q11, q11
230         veor    q12, q12, q12
231         veor    q13, q13, q13
232         veor    q14, q14, q14
233         veor    q15, q15, q15
234 .Lwipe_done:
235 #endif
236         mov     r0,sp
237 #if __ARM_ARCH__>=5
238         bx      lr
239 #else
240         tst     lr,#1
241         moveq   pc,lr
242         .word   0xe12fff1e      @ bx    lr
243 #endif
244 .size   OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu
245
246 .global OPENSSL_instrument_bus
247 .type   OPENSSL_instrument_bus,%function
248 OPENSSL_instrument_bus:
249         eor     r0,r0,r0
250 #if __ARM_ARCH__>=5
251         bx      lr
252 #else
253         tst     lr,#1
254         moveq   pc,lr
255         .word   0xe12fff1e      @ bx    lr
256 #endif
257 .size   OPENSSL_instrument_bus,.-OPENSSL_instrument_bus
258
259 .global OPENSSL_instrument_bus2
260 .type   OPENSSL_instrument_bus2,%function
261 OPENSSL_instrument_bus2:
262         eor     r0,r0,r0
263 #if __ARM_ARCH__>=5
264         bx      lr
265 #else
266         tst     lr,#1
267         moveq   pc,lr
268         .word   0xe12fff1e      @ bx    lr
269 #endif
270 .size   OPENSSL_instrument_bus2,.-OPENSSL_instrument_bus2
271
272 .align  5
273 #if __ARM_MAX_ARCH__>=7
274 .LOPENSSL_armcap:
275 .word   OPENSSL_armcap_P-.
276 #endif
277 #if __ARM_ARCH__>=6
278 .align  5
279 #else
280 .Lspinlock:
281 .word   atomic_add_spinlock-.Lspinlock
282 .align  5
283
284 .data
285 .align  2
286 atomic_add_spinlock:
287 .word   0
288 #endif
289
290 .comm   OPENSSL_armcap_P,4,4
291 .hidden OPENSSL_armcap_P
292 ___
293
294 print $code;
295 close STDOUT;