Set authkey to NULL and check malloc return value.
[openssl.git] / crypto / armv4cpuid.S
1 #include "arm_arch.h"
2
3 .text
4 .code   32
5
6 .align  5
7 .global _armv7_neon_probe
8 .type   _armv7_neon_probe,%function
9 _armv7_neon_probe:
10         .word   0xf26ee1fe      @ vorr  q15,q15,q15
11         .word   0xe12fff1e      @ bx    lr
12 .size   _armv7_neon_probe,.-_armv7_neon_probe
13
14 .global _armv7_tick
15 .type   _armv7_tick,%function
16 _armv7_tick:
17         mrc     p15,0,r0,c9,c13,0
18         .word   0xe12fff1e      @ bx    lr
19 .size   _armv7_tick,.-_armv7_tick
20
21 .global _armv8_aes_probe
22 .type   _armv8_aes_probe,%function
23 _armv8_aes_probe:
24         .word   0xf3b00300      @ aese.8        q0,q0
25         .word   0xe12fff1e      @ bx    lr
26 .size   _armv8_aes_probe,.-_armv8_aes_probe
27
28 .global _armv8_sha1_probe
29 .type   _armv8_sha1_probe,%function
30 _armv8_sha1_probe:
31         .word   0xf2000c40      @ sha1c.32      q0,q0,q0
32         .word   0xe12fff1e      @ bx    lr
33 .size   _armv8_sha1_probe,.-_armv8_sha1_probe
34
35 .global _armv8_sha256_probe
36 .type   _armv8_sha256_probe,%function
37 _armv8_sha256_probe:
38         .word   0xf3000c40      @ sha256h.32    q0,q0,q0
39         .word   0xe12fff1e      @ bx    lr
40 .size   _armv8_sha256_probe,.-_armv8_sha256_probe
41 .global _armv8_pmull_probe
42 .type   _armv8_pmull_probe,%function
43 _armv8_pmull_probe:
44         .word   0xf2a00e00      @ vmull.p64     q0,d0,d0
45         .word   0xe12fff1e      @ bx    lr
46 .size   _armv8_pmull_probe,.-_armv8_pmull_probe
47
48 .align  5
49 .global OPENSSL_atomic_add
50 .type   OPENSSL_atomic_add,%function
51 OPENSSL_atomic_add:
52 #if __ARM_ARCH__>=6
53 .Ladd:  ldrex   r2,[r0]
54         add     r3,r2,r1
55         strex   r2,r3,[r0]
56         cmp     r2,#0
57         bne     .Ladd
58         mov     r0,r3
59         .word   0xe12fff1e      @ bx    lr
60 #else
61         stmdb   sp!,{r4-r6,lr}
62         ldr     r2,.Lspinlock
63         adr     r3,.Lspinlock
64         mov     r4,r0
65         mov     r5,r1
66         add     r6,r3,r2        @ &spinlock
67         b       .+8
68 .Lspin: bl      sched_yield
69         mov     r0,#-1
70         swp     r0,r0,[r6]
71         cmp     r0,#0
72         bne     .Lspin
73
74         ldr     r2,[r4]
75         add     r2,r2,r5
76         str     r2,[r4]
77         str     r0,[r6]         @ release spinlock
78         ldmia   sp!,{r4-r6,lr}
79         tst     lr,#1
80         moveq   pc,lr
81         .word   0xe12fff1e      @ bx    lr
82 #endif
83 .size   OPENSSL_atomic_add,.-OPENSSL_atomic_add
84
85 .global OPENSSL_cleanse
86 .type   OPENSSL_cleanse,%function
87 OPENSSL_cleanse:
88         eor     ip,ip,ip
89         cmp     r1,#7
90         subhs   r1,r1,#4
91         bhs     .Lot
92         cmp     r1,#0
93         beq     .Lcleanse_done
94 .Little:
95         strb    ip,[r0],#1
96         subs    r1,r1,#1
97         bhi     .Little
98         b       .Lcleanse_done
99
100 .Lot:   tst     r0,#3
101         beq     .Laligned
102         strb    ip,[r0],#1
103         sub     r1,r1,#1
104         b       .Lot
105 .Laligned:
106         str     ip,[r0],#4
107         subs    r1,r1,#4
108         bhs     .Laligned
109         adds    r1,r1,#4
110         bne     .Little
111 .Lcleanse_done:
112         tst     lr,#1
113         moveq   pc,lr
114         .word   0xe12fff1e      @ bx    lr
115 .size   OPENSSL_cleanse,.-OPENSSL_cleanse
116
117 .global OPENSSL_wipe_cpu
118 .type   OPENSSL_wipe_cpu,%function
119 OPENSSL_wipe_cpu:
120         ldr     r0,.LOPENSSL_armcap
121         adr     r1,.LOPENSSL_armcap
122         ldr     r0,[r1,r0]
123         eor     r2,r2,r2
124         eor     r3,r3,r3
125         eor     ip,ip,ip
126         tst     r0,#1
127         beq     .Lwipe_done
128         .word   0xf3000150      @ veor    q0, q0, q0
129         .word   0xf3022152      @ veor    q1, q1, q1
130         .word   0xf3044154      @ veor    q2, q2, q2
131         .word   0xf3066156      @ veor    q3, q3, q3
132         .word   0xf34001f0      @ veor    q8, q8, q8
133         .word   0xf34221f2      @ veor    q9, q9, q9
134         .word   0xf34441f4      @ veor    q10, q10, q10
135         .word   0xf34661f6      @ veor    q11, q11, q11
136         .word   0xf34881f8      @ veor    q12, q12, q12
137         .word   0xf34aa1fa      @ veor    q13, q13, q13
138         .word   0xf34cc1fc      @ veor    q14, q14, q14
139         .word   0xf34ee1fe      @ veor    q15, q15, q15
140 .Lwipe_done:
141         mov     r0,sp
142         tst     lr,#1
143         moveq   pc,lr
144         .word   0xe12fff1e      @ bx    lr
145 .size   OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu
146
147 .global OPENSSL_instrument_bus
148 .type   OPENSSL_instrument_bus,%function
149 OPENSSL_instrument_bus:
150         eor     r0,r0,r0
151         tst     lr,#1
152         moveq   pc,lr
153         .word   0xe12fff1e      @ bx    lr
154 .size   OPENSSL_instrument_bus,.-OPENSSL_instrument_bus
155
156 .global OPENSSL_instrument_bus2
157 .type   OPENSSL_instrument_bus2,%function
158 OPENSSL_instrument_bus2:
159         eor     r0,r0,r0
160         tst     lr,#1
161         moveq   pc,lr
162         .word   0xe12fff1e      @ bx    lr
163 .size   OPENSSL_instrument_bus2,.-OPENSSL_instrument_bus2
164
165 .align  5
166 .LOPENSSL_armcap:
167 .word   OPENSSL_armcap_P-.LOPENSSL_armcap
168 #if __ARM_ARCH__>=6
169 .align  5
170 #else
171 .Lspinlock:
172 .word   atomic_add_spinlock-.Lspinlock
173 .align  5
174
175 .data
176 .align  2
177 atomic_add_spinlock:
178 .word   0
179 #endif
180
181 .comm   OPENSSL_armcap_P,4,4
182 .hidden OPENSSL_armcap_P