armv4cpuid.pl

   1 #! /usr/bin/env perl
   2 # Copyright 2015-2016 The OpenSSL Project Authors. All Rights Reserved.
   3 #
   4 # Licensed under the OpenSSL license (the "License").  You may not use
   5 # this file except in compliance with the License.  You can obtain a copy
   6 # in the file LICENSE in the source distribution or at
   7 # https://www.openssl.org/source/license.html
   8
   9
  10 $flavour = shift;
  11 $output  = shift;
  12
  13 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
  14 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
  15 ( $xlate="${dir}perlasm/arm-xlate.pl" and -f $xlate) or
  16 die "can't locate arm-xlate.pl";
  17
  18 open OUT,"| \"$^X\" $xlate $flavour $output";
  19 *STDOUT=*OUT;
  20
  21 $code.=<<___;
  22 #include "arm_arch.h"
  23
  24 .text
  25 #if defined(__thumb2__) && !defined(__APPLE__)
  26 .syntax unified
  27 .thumb
  28 #else
  29 .code   32
  30 #endif
  31
  32 .align  5
  33 .global OPENSSL_atomic_add
  34 .type   OPENSSL_atomic_add,%function
  35 OPENSSL_atomic_add:
  36 #if __ARM_ARCH__>=6
  37 .Ladd:  ldrex   r2,[r0]
  38         add     r3,r2,r1
  39         strex   r2,r3,[r0]
  40         cmp     r2,#0
  41         bne     .Ladd
  42         mov     r0,r3
  43         bx      lr
  44 #else
  45         stmdb   sp!,{r4-r6,lr}
  46         ldr     r2,.Lspinlock
  47         adr     r3,.Lspinlock
  48         mov     r4,r0
  49         mov     r5,r1
  50         add     r6,r3,r2        @ &spinlock
  51         b       .+8
  52 .Lspin: bl      sched_yield
  53         mov     r0,#-1
  54         swp     r0,r0,[r6]
  55         cmp     r0,#0
  56         bne     .Lspin
  57
  58         ldr     r2,[r4]
  59         add     r2,r2,r5
  60         str     r2,[r4]
  61         str     r0,[r6]         @ release spinlock
  62         ldmia   sp!,{r4-r6,lr}
  63         tst     lr,#1
  64         moveq   pc,lr
  65         .word   0xe12fff1e      @ bx    lr
  66 #endif
  67 .size   OPENSSL_atomic_add,.-OPENSSL_atomic_add
  68
  69 .global OPENSSL_cleanse
  70 .type   OPENSSL_cleanse,%function
  71 OPENSSL_cleanse:
  72         eor     ip,ip,ip
  73         cmp     r1,#7
  74 #ifdef  __thumb2__
  75         itt     hs
  76 #endif
  77         subhs   r1,r1,#4
  78         bhs     .Lot
  79         cmp     r1,#0
  80         beq     .Lcleanse_done
  81 .Little:
  82         strb    ip,[r0],#1
  83         subs    r1,r1,#1
  84         bhi     .Little
  85         b       .Lcleanse_done
  86
  87 .Lot:   tst     r0,#3
  88         beq     .Laligned
  89         strb    ip,[r0],#1
  90         sub     r1,r1,#1
  91         b       .Lot
  92 .Laligned:
  93         str     ip,[r0],#4
  94         subs    r1,r1,#4
  95         bhs     .Laligned
  96         adds    r1,r1,#4
  97         bne     .Little
  98 .Lcleanse_done:
  99 #if __ARM_ARCH__>=5
 100         bx      lr
 101 #else
 102         tst     lr,#1
 103         moveq   pc,lr
 104         .word   0xe12fff1e      @ bx    lr
 105 #endif
 106 .size   OPENSSL_cleanse,.-OPENSSL_cleanse
 107
 108 #if __ARM_MAX_ARCH__>=7
 109 .arch   armv7-a
 110 .fpu    neon
 111
 112 .align  5
 113 .global _armv7_neon_probe
 114 .type   _armv7_neon_probe,%function
 115 _armv7_neon_probe:
 116         vorr    q0,q0,q0
 117         bx      lr
 118 .size   _armv7_neon_probe,.-_armv7_neon_probe
 119
 120 .global _armv7_tick
 121 .type   _armv7_tick,%function
 122 _armv7_tick:
 123 #ifdef  __APPLE__
 124         mrrc    p15,0,r0,r1,c14         @ CNTPCT
 125 #else
 126         mrrc    p15,1,r0,r1,c14         @ CNTVCT
 127 #endif
 128         bx      lr
 129 .size   _armv7_tick,.-_armv7_tick
 130
 131 .global _armv8_aes_probe
 132 .type   _armv8_aes_probe,%function
 133 _armv8_aes_probe:
 134 #if defined(__thumb2__) && !defined(__APPLE__)
 135         .byte   0xb0,0xff,0x00,0x03     @ aese.8        q0,q0
 136 #else
 137         .byte   0x00,0x03,0xb0,0xf3     @ aese.8        q0,q0
 138 #endif
 139         bx      lr
 140 .size   _armv8_aes_probe,.-_armv8_aes_probe
 141
 142 .global _armv8_sha1_probe
 143 .type   _armv8_sha1_probe,%function
 144 _armv8_sha1_probe:
 145 #if defined(__thumb2__) && !defined(__APPLE__)
 146         .byte   0x00,0xef,0x40,0x0c     @ sha1c.32      q0,q0,q0
 147 #else
 148         .byte   0x40,0x0c,0x00,0xf2     @ sha1c.32      q0,q0,q0
 149 #endif
 150         bx      lr
 151 .size   _armv8_sha1_probe,.-_armv8_sha1_probe
 152
 153 .global _armv8_sha256_probe
 154 .type   _armv8_sha256_probe,%function
 155 _armv8_sha256_probe:
 156 #if defined(__thumb2__) && !defined(__APPLE__)
 157         .byte   0x00,0xff,0x40,0x0c     @ sha256h.32    q0,q0,q0
 158 #else
 159         .byte   0x40,0x0c,0x00,0xf3     @ sha256h.32    q0,q0,q0
 160 #endif
 161         bx      lr
 162 .size   _armv8_sha256_probe,.-_armv8_sha256_probe
 163 .global _armv8_pmull_probe
 164 .type   _armv8_pmull_probe,%function
 165 _armv8_pmull_probe:
 166 #if defined(__thumb2__) && !defined(__APPLE__)
 167         .byte   0xa0,0xef,0x00,0x0e     @ vmull.p64     q0,d0,d0
 168 #else
 169         .byte   0x00,0x0e,0xa0,0xf2     @ vmull.p64     q0,d0,d0
 170 #endif
 171         bx      lr
 172 .size   _armv8_pmull_probe,.-_armv8_pmull_probe
 173 #endif
 174
 175 .global OPENSSL_wipe_cpu
 176 .type   OPENSSL_wipe_cpu,%function
 177 OPENSSL_wipe_cpu:
 178 #if __ARM_MAX_ARCH__>=7
 179         ldr     r0,.LOPENSSL_armcap
 180         adr     r1,.LOPENSSL_armcap
 181         ldr     r0,[r1,r0]
 182 #ifdef  __APPLE__
 183         ldr     r0,[r0]
 184 #endif
 185 #endif
 186         eor     r2,r2,r2
 187         eor     r3,r3,r3
 188         eor     ip,ip,ip
 189 #if __ARM_MAX_ARCH__>=7
 190         tst     r0,#1
 191         beq     .Lwipe_done
 192         veor    q0, q0, q0
 193         veor    q1, q1, q1
 194         veor    q2, q2, q2
 195         veor    q3, q3, q3
 196         veor    q8, q8, q8
 197         veor    q9, q9, q9
 198         veor    q10, q10, q10
 199         veor    q11, q11, q11
 200         veor    q12, q12, q12
 201         veor    q13, q13, q13
 202         veor    q14, q14, q14
 203         veor    q15, q15, q15
 204 .Lwipe_done:
 205 #endif
 206         mov     r0,sp
 207 #if __ARM_ARCH__>=5
 208         bx      lr
 209 #else
 210         tst     lr,#1
 211         moveq   pc,lr
 212         .word   0xe12fff1e      @ bx    lr
 213 #endif
 214 .size   OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu
 215
 216 .global OPENSSL_instrument_bus
 217 .type   OPENSSL_instrument_bus,%function
 218 OPENSSL_instrument_bus:
 219         eor     r0,r0,r0
 220 #if __ARM_ARCH__>=5
 221         bx      lr
 222 #else
 223         tst     lr,#1
 224         moveq   pc,lr
 225         .word   0xe12fff1e      @ bx    lr
 226 #endif
 227 .size   OPENSSL_instrument_bus,.-OPENSSL_instrument_bus
 228
 229 .global OPENSSL_instrument_bus2
 230 .type   OPENSSL_instrument_bus2,%function
 231 OPENSSL_instrument_bus2:
 232         eor     r0,r0,r0
 233 #if __ARM_ARCH__>=5
 234         bx      lr
 235 #else
 236         tst     lr,#1
 237         moveq   pc,lr
 238         .word   0xe12fff1e      @ bx    lr
 239 #endif
 240 .size   OPENSSL_instrument_bus2,.-OPENSSL_instrument_bus2
 241
 242 .align  5
 243 #if __ARM_MAX_ARCH__>=7
 244 .LOPENSSL_armcap:
 245 .word   OPENSSL_armcap_P-.
 246 #endif
 247 #if __ARM_ARCH__>=6
 248 .align  5
 249 #else
 250 .Lspinlock:
 251 .word   atomic_add_spinlock-.Lspinlock
 252 .align  5
 253
 254 .data
 255 .align  2
 256 atomic_add_spinlock:
 257 .word   0
 258 #endif
 259
 260 .comm   OPENSSL_armcap_P,4,4
 261 .hidden OPENSSL_armcap_P
 262 ___
 263
 264 print $code;
 265 close STDOUT;