Enable AES optimisation on Apple Silicon M2-based systems
authorTom Cosgrove <tom.cosgrove@arm.com>
Wed, 25 Jan 2023 19:34:25 +0000 (19:34 +0000)
committerPauli <pauli@openssl.org>
Sun, 29 Jan 2023 22:49:13 +0000 (09:49 +1100)
Gives a performance enhancement of 16-38%, similar to the M1.

Reviewed-by: Tomas Mraz <tomas@openssl.org>
Reviewed-by: Hugo Landau <hlandau@openssl.org>
Reviewed-by: Paul Dale <pauli@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/20141)

crypto/armcap.c

index 71296786c3b8e4c5df04a6069e962155e1e867fb..68f735baec63e98428c1ff6b50617b6744c3cca6 100644 (file)
@@ -254,7 +254,8 @@ void OPENSSL_cpuid_setup(void)
             OPENSSL_armcap_P |= ARMV8_SHA3;
             len = sizeof(uarch);
             if ((sysctlbyname("machdep.cpu.brand_string", uarch, &len, NULL, 0) == 0) &&
-                (strncmp(uarch, "Apple M1", 8) == 0))
+               ((strncmp(uarch, "Apple M1", 8) == 0) ||
+                (strncmp(uarch, "Apple M2", 8) == 0)))
                 OPENSSL_armcap_P |= ARMV8_UNROLL8_EOR3;
         }
     }