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Add VIS3-capable sparcv9-gf2m module.
[openssl.git]
/
crypto
/
x86_64cpuid.pl
diff --git
a/crypto/x86_64cpuid.pl
b/crypto/x86_64cpuid.pl
index 84b1cbe85f59984d99e5ecda20b0449c057d1729..58c7bab1b65ba82d93695f1b80b0fde42c228535 100644
(file)
--- a/
crypto/x86_64cpuid.pl
+++ b/
crypto/x86_64cpuid.pl
@@
-7,7
+7,11
@@
if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
$win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
$win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
-open STDOUT,"| $^X ${dir}perlasm/x86_64-xlate.pl $flavour $output";
+( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
+( $xlate="${dir}perlasm/x86_64-xlate.pl" and -f $xlate) or
+die "can't locate x86_64-xlate.pl";
+
+open STDOUT,"| \"$^X\" $xlate $flavour $output";
($arg1,$arg2,$arg3,$arg4)=$win64?("%rcx","%rdx","%r8", "%r9") : # Win64 order
("%rdi","%rsi","%rdx","%rcx"); # Unix order
($arg1,$arg2,$arg3,$arg4)=$win64?("%rcx","%rdx","%r8", "%r9") : # Win64 order
("%rdi","%rsi","%rdx","%rcx"); # Unix order
@@
-19,7
+23,7
@@
print<<___;
call OPENSSL_cpuid_setup
.hidden OPENSSL_ia32cap_P
call OPENSSL_cpuid_setup
.hidden OPENSSL_ia32cap_P
-.comm OPENSSL_ia32cap_P,8
+.comm OPENSSL_ia32cap_P,8
,4
.text
.text
@@
-124,13
+128,14
@@
OPENSSL_ia32_cpuid:
.Lnocacheinfo:
mov \$1,%eax
cpuid
.Lnocacheinfo:
mov \$1,%eax
cpuid
+ and \$0xbfefffff,%edx # force reserved bits to 0
cmp \$0,%r9d
jne .Lnotintel
cmp \$0,%r9d
jne .Lnotintel
- or \$0x
00100000,%edx # use reserved 20th bit to engage RC4_CHAR
+ or \$0x
40000000,%edx # set reserved bit#30 on Intel CPUs
and \$15,%ah
cmp \$15,%ah # examine Family ID
and \$15,%ah
cmp \$15,%ah # examine Family ID
- j
e
.Lnotintel
- or \$0x
40000000,%edx # use reserved bit to skip unrolled loop
+ j
ne
.Lnotintel
+ or \$0x
00100000,%edx # set reserved bit#20 to engage RC4_CHAR
.Lnotintel:
bt \$28,%edx # test hyper-threading bit
jnc .Lgeneric
.Lnotintel:
bt \$28,%edx # test hyper-threading bit
jnc .Lgeneric
@@
-348,4
+353,21
@@
OPENSSL_instrument_bus2:
___
}
___
}
+print<<___;
+.globl OPENSSL_ia32_rdrand
+.type OPENSSL_ia32_rdrand,\@abi-omnipotent
+.align 16
+OPENSSL_ia32_rdrand:
+ mov \$8,%ecx
+.Loop_rdrand:
+ rdrand %rax
+ jc .Lbreak_rdrand
+ loop .Loop_rdrand
+.Lbreak_rdrand:
+ cmp \$0,%rax
+ cmove %rcx,%rax
+ ret
+.size OPENSSL_ia32_rdrand,.-OPENSSL_ia32_rdrand
+___
+
close STDOUT; # flush
close STDOUT; # flush