crypto/sha/asm/sha1-armv4-large.pl

   1 #!/usr/bin/env perl
   2
   3 # ====================================================================
   4 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
   5 # project. The module is, however, dual licensed under OpenSSL and
   6 # CRYPTOGAMS licenses depending on where you obtain it. For further
   7 # details see http://www.openssl.org/~appro/cryptogams/.
   8 # ====================================================================
   9
  10 # sha1_block procedure for ARMv4.
  11 #
  12 # January 2007.
  13
  14 # Size/performance trade-off
  15 # ====================================================================
  16 # impl          size in bytes   comp cycles[*]  measured performance
  17 # ====================================================================
  18 # thumb         304             3212            4420
  19 # armv4-small   392/+29%        1958/+64%       2250/+96%
  20 # armv4-compact 740/+89%        1552/+26%       1840/+22%
  21 # armv4-large   1420/+92%       1307/+19%       1370/+34%[***]
  22 # full unroll   ~5100/+260%     ~1260/+4%       ~1300/+5%
  23 # ====================================================================
  24 # thumb         = same as 'small' but in Thumb instructions[**] and
  25 #                 with recurring code in two private functions;
  26 # small         = detached Xload/update, loops are folded;
  27 # compact       = detached Xload/update, 5x unroll;
  28 # large         = interleaved Xload/update, 5x unroll;
  29 # full unroll   = interleaved Xload/update, full unroll, estimated[!];
  30 #
  31 # [*]   Manually counted instructions in "grand" loop body. Measured
  32 #       performance is affected by prologue and epilogue overhead,
  33 #       i-cache availability, branch penalties, etc.
  34 # [**]  While each Thumb instruction is twice smaller, they are not as
  35 #       diverse as ARM ones: e.g., there are only two arithmetic
  36 #       instructions with 3 arguments, no [fixed] rotate, addressing
  37 #       modes are limited. As result it takes more instructions to do
  38 #       the same job in Thumb, therefore the code is never twice as
  39 #       small and always slower.
  40 # [***] which is also ~35% better than compiler generated code. Dual-
  41 #       issue Cortex A8 core was measured to process input block in
  42 #       ~990 cycles.
  43
  44 # August 2010.
  45 #
  46 # Rescheduling for dual-issue pipeline resulted in 13% improvement on
  47 # Cortex A8 core and in absolute terms ~870 cycles per input block
  48 # [or 13.6 cycles per byte].
  49
  50 # February 2011.
  51 #
  52 # Profiler-assisted and platform-specific optimization resulted in 10%
  53 # improvement on Cortex A8 core and 12.2 cycles per byte.
  54
  55 # September 2013.
  56 #
  57 # Add NEON implementation (see sha1-586.pl for background info). On
  58 # Cortex A8 it was measured to process one byte in 6.7 cycles or >80%
  59 # faster than integer-only code. Because [fully unrolled] NEON code
  60 # is ~2.5x larger and there are some redundant instructions executed
  61 # when processing last block, improvement is not as big for smallest
  62 # blocks, only ~30%. Snapdragon S4 is a tad faster, 6.4 cycles per
  63 # byte, which is also >80% faster than integer-only code. Cortex-A15
  64 # is even faster spending 5.6 cycles per byte outperforming integer-
  65 # only code by factor of 2.
  66
  67 # May 2014.
  68 #
  69 # Add ARMv8 code path performing at 2.35 cpb on Apple A7.
  70
  71 while (($output=shift) && ($output!~/^\w[\w\-]*\.\w+$/)) {}
  72 open STDOUT,">$output";
  73
  74 $ctx="r0";
  75 $inp="r1";
  76 $len="r2";
  77 $a="r3";
  78 $b="r4";
  79 $c="r5";
  80 $d="r6";
  81 $e="r7";
  82 $K="r8";
  83 $t0="r9";
  84 $t1="r10";
  85 $t2="r11";
  86 $t3="r12";
  87 $Xi="r14";
  88 @V=($a,$b,$c,$d,$e);
  89
  90 sub Xupdate {
  91 my ($a,$b,$c,$d,$e,$opt1,$opt2)=@_;
  92 $code.=<<___;
  93         ldr     $t0,[$Xi,#15*4]
  94         ldr     $t1,[$Xi,#13*4]
  95         ldr     $t2,[$Xi,#7*4]
  96         add     $e,$K,$e,ror#2                  @ E+=K_xx_xx
  97         ldr     $t3,[$Xi,#2*4]
  98         eor     $t0,$t0,$t1
  99         eor     $t2,$t2,$t3                     @ 1 cycle stall
 100         eor     $t1,$c,$d                       @ F_xx_xx
 101         mov     $t0,$t0,ror#31
 102         add     $e,$e,$a,ror#27                 @ E+=ROR(A,27)
 103         eor     $t0,$t0,$t2,ror#31
 104         str     $t0,[$Xi,#-4]!
 105         $opt1                                   @ F_xx_xx
 106         $opt2                                   @ F_xx_xx
 107         add     $e,$e,$t0                       @ E+=X[i]
 108 ___
 109 }
 110
 111 sub BODY_00_15 {
 112 my ($a,$b,$c,$d,$e)=@_;
 113 $code.=<<___;
 114 #if __ARM_ARCH__<7
 115         ldrb    $t1,[$inp,#2]
 116         ldrb    $t0,[$inp,#3]
 117         ldrb    $t2,[$inp,#1]
 118         add     $e,$K,$e,ror#2                  @ E+=K_00_19
 119         ldrb    $t3,[$inp],#4
 120         orr     $t0,$t0,$t1,lsl#8
 121         eor     $t1,$c,$d                       @ F_xx_xx
 122         orr     $t0,$t0,$t2,lsl#16
 123         add     $e,$e,$a,ror#27                 @ E+=ROR(A,27)
 124         orr     $t0,$t0,$t3,lsl#24
 125 #else
 126         ldr     $t0,[$inp],#4                   @ handles unaligned
 127         add     $e,$K,$e,ror#2                  @ E+=K_00_19
 128         eor     $t1,$c,$d                       @ F_xx_xx
 129         add     $e,$e,$a,ror#27                 @ E+=ROR(A,27)
 130 #ifdef __ARMEL__
 131         rev     $t0,$t0                         @ byte swap
 132 #endif
 133 #endif
 134         and     $t1,$b,$t1,ror#2
 135         add     $e,$e,$t0                       @ E+=X[i]
 136         eor     $t1,$t1,$d,ror#2                @ F_00_19(B,C,D)
 137         str     $t0,[$Xi,#-4]!
 138         add     $e,$e,$t1                       @ E+=F_00_19(B,C,D)
 139 ___
 140 }
 141
 142 sub BODY_16_19 {
 143 my ($a,$b,$c,$d,$e)=@_;
 144         &Xupdate(@_,"and $t1,$b,$t1,ror#2");
 145 $code.=<<___;
 146         eor     $t1,$t1,$d,ror#2                @ F_00_19(B,C,D)
 147         add     $e,$e,$t1                       @ E+=F_00_19(B,C,D)
 148 ___
 149 }
 150
 151 sub BODY_20_39 {
 152 my ($a,$b,$c,$d,$e)=@_;
 153         &Xupdate(@_,"eor $t1,$b,$t1,ror#2");
 154 $code.=<<___;
 155         add     $e,$e,$t1                       @ E+=F_20_39(B,C,D)
 156 ___
 157 }
 158
 159 sub BODY_40_59 {
 160 my ($a,$b,$c,$d,$e)=@_;
 161         &Xupdate(@_,"and $t1,$b,$t1,ror#2","and $t2,$c,$d");
 162 $code.=<<___;
 163         add     $e,$e,$t1                       @ E+=F_40_59(B,C,D)
 164         add     $e,$e,$t2,ror#2
 165 ___
 166 }
 167
 168 $code=<<___;
 169 #include "arm_arch.h"
 170
 171 .text
 172 .code   32
 173
 174 .global sha1_block_data_order
 175 .type   sha1_block_data_order,%function
 176
 177 .align  5
 178 sha1_block_data_order:
 179 #if __ARM_MAX_ARCH__>=7
 180         sub     r3,pc,#8                @ sha1_block_data_order
 181         ldr     r12,.LOPENSSL_armcap
 182         ldr     r12,[r3,r12]            @ OPENSSL_armcap_P
 183         tst     r12,#ARMV8_SHA1
 184         bne     .LARMv8
 185         tst     r12,#ARMV7_NEON
 186         bne     .LNEON
 187 #endif
 188         stmdb   sp!,{r4-r12,lr}
 189         add     $len,$inp,$len,lsl#6    @ $len to point at the end of $inp
 190         ldmia   $ctx,{$a,$b,$c,$d,$e}
 191 .Lloop:
 192         ldr     $K,.LK_00_19
 193         mov     $Xi,sp
 194         sub     sp,sp,#15*4
 195         mov     $c,$c,ror#30
 196         mov     $d,$d,ror#30
 197         mov     $e,$e,ror#30            @ [6]
 198 .L_00_15:
 199 ___
 200 for($i=0;$i<5;$i++) {
 201         &BODY_00_15(@V);        unshift(@V,pop(@V));
 202 }
 203 $code.=<<___;
 204         teq     $Xi,sp
 205         bne     .L_00_15                @ [((11+4)*5+2)*3]
 206         sub     sp,sp,#25*4
 207 ___
 208         &BODY_00_15(@V);        unshift(@V,pop(@V));
 209         &BODY_16_19(@V);        unshift(@V,pop(@V));
 210         &BODY_16_19(@V);        unshift(@V,pop(@V));
 211         &BODY_16_19(@V);        unshift(@V,pop(@V));
 212         &BODY_16_19(@V);        unshift(@V,pop(@V));
 213 $code.=<<___;
 214
 215         ldr     $K,.LK_20_39            @ [+15+16*4]
 216         cmn     sp,#0                   @ [+3], clear carry to denote 20_39
 217 .L_20_39_or_60_79:
 218 ___
 219 for($i=0;$i<5;$i++) {
 220         &BODY_20_39(@V);        unshift(@V,pop(@V));
 221 }
 222 $code.=<<___;
 223         teq     $Xi,sp                  @ preserve carry
 224         bne     .L_20_39_or_60_79       @ [+((12+3)*5+2)*4]
 225         bcs     .L_done                 @ [+((12+3)*5+2)*4], spare 300 bytes
 226
 227         ldr     $K,.LK_40_59
 228         sub     sp,sp,#20*4             @ [+2]
 229 .L_40_59:
 230 ___
 231 for($i=0;$i<5;$i++) {
 232         &BODY_40_59(@V);        unshift(@V,pop(@V));
 233 }
 234 $code.=<<___;
 235         teq     $Xi,sp
 236         bne     .L_40_59                @ [+((12+5)*5+2)*4]
 237
 238         ldr     $K,.LK_60_79
 239         sub     sp,sp,#20*4
 240         cmp     sp,#0                   @ set carry to denote 60_79
 241         b       .L_20_39_or_60_79       @ [+4], spare 300 bytes
 242 .L_done:
 243         add     sp,sp,#80*4             @ "deallocate" stack frame
 244         ldmia   $ctx,{$K,$t0,$t1,$t2,$t3}
 245         add     $a,$K,$a
 246         add     $b,$t0,$b
 247         add     $c,$t1,$c,ror#2
 248         add     $d,$t2,$d,ror#2
 249         add     $e,$t3,$e,ror#2
 250         stmia   $ctx,{$a,$b,$c,$d,$e}
 251         teq     $inp,$len
 252         bne     .Lloop                  @ [+18], total 1307
 253
 254 #if __ARM_ARCH__>=5
 255         ldmia   sp!,{r4-r12,pc}
 256 #else
 257         ldmia   sp!,{r4-r12,lr}
 258         tst     lr,#1
 259         moveq   pc,lr                   @ be binary compatible with V4, yet
 260         bx      lr                      @ interoperable with Thumb ISA:-)
 261 #endif
 262 .size   sha1_block_data_order,.-sha1_block_data_order
 263
 264 .align  5
 265 .LK_00_19:      .word   0x5a827999
 266 .LK_20_39:      .word   0x6ed9eba1
 267 .LK_40_59:      .word   0x8f1bbcdc
 268 .LK_60_79:      .word   0xca62c1d6
 269 #if __ARM_MAX_ARCH__>=7
 270 .LOPENSSL_armcap:
 271 .word   OPENSSL_armcap_P-sha1_block_data_order
 272 #endif
 273 .asciz  "SHA1 block transform for ARMv4/NEON/ARMv8, CRYPTOGAMS by <appro\@openssl.org>"
 274 .align  5
 275 ___
 276 #####################################################################
 277 # NEON stuff
 278 #
 279 {{{
 280 my @V=($a,$b,$c,$d,$e);
 281 my ($K_XX_XX,$Ki,$t0,$t1,$Xfer,$saved_sp)=map("r$_",(8..12,14));
 282 my $Xi=4;
 283 my @X=map("q$_",(8..11,0..3));
 284 my @Tx=("q12","q13");
 285 my ($K,$zero)=("q14","q15");
 286 my $j=0;
 287
 288 sub AUTOLOAD()          # thunk [simplified] x86-style perlasm
 289 { my $opcode = $AUTOLOAD; $opcode =~ s/.*:://; $opcode =~ s/_/\./;
 290   my $arg = pop;
 291     $arg = "#$arg" if ($arg*1 eq $arg);
 292     $code .= "\t$opcode\t".join(',',@_,$arg)."\n";
 293 }
 294
 295 sub body_00_19 () {
 296         (
 297         '($a,$b,$c,$d,$e)=@V;'.         # '$code.="@ $j\n";'.
 298         '&bic   ($t0,$d,$b)',
 299         '&add   ($e,$e,$Ki)',           # e+=X[i]+K
 300         '&and   ($t1,$c,$b)',
 301         '&ldr   ($Ki,sprintf "[sp,#%d]",4*(($j+1)&15))',
 302         '&add   ($e,$e,$a,"ror#27")',   # e+=ROR(A,27)
 303         '&eor   ($t1,$t1,$t0)',         # F_00_19
 304         '&mov   ($b,$b,"ror#2")',       # b=ROR(b,2)
 305         '&add   ($e,$e,$t1);'.          # e+=F_00_19
 306         '$j++;  unshift(@V,pop(@V));'
 307         )
 308 }
 309 sub body_20_39 () {
 310         (
 311         '($a,$b,$c,$d,$e)=@V;'.         # '$code.="@ $j\n";'.
 312         '&eor   ($t0,$b,$d)',
 313         '&add   ($e,$e,$Ki)',           # e+=X[i]+K
 314         '&ldr   ($Ki,sprintf "[sp,#%d]",4*(($j+1)&15)) if ($j<79)',
 315         '&eor   ($t1,$t0,$c)',          # F_20_39
 316         '&add   ($e,$e,$a,"ror#27")',   # e+=ROR(A,27)
 317         '&mov   ($b,$b,"ror#2")',       # b=ROR(b,2)
 318         '&add   ($e,$e,$t1);'.          # e+=F_20_39
 319         '$j++;  unshift(@V,pop(@V));'
 320         )
 321 }
 322 sub body_40_59 () {
 323         (
 324         '($a,$b,$c,$d,$e)=@V;'.         # '$code.="@ $j\n";'.
 325         '&add   ($e,$e,$Ki)',           # e+=X[i]+K
 326         '&and   ($t0,$c,$d)',
 327         '&ldr   ($Ki,sprintf "[sp,#%d]",4*(($j+1)&15))',
 328         '&add   ($e,$e,$a,"ror#27")',   # e+=ROR(A,27)
 329         '&eor   ($t1,$c,$d)',
 330         '&add   ($e,$e,$t0)',
 331         '&and   ($t1,$t1,$b)',
 332         '&mov   ($b,$b,"ror#2")',       # b=ROR(b,2)
 333         '&add   ($e,$e,$t1);'.          # e+=F_40_59
 334         '$j++;  unshift(@V,pop(@V));'
 335         )
 336 }
 337
 338 sub Xupdate_16_31 ()
 339 { use integer;
 340   my $body = shift;
 341   my @insns = (&$body,&$body,&$body,&$body);
 342   my ($a,$b,$c,$d,$e);
 343
 344         &vext_8         (@X[0],@X[-4&7],@X[-3&7],8);    # compose "X[-14]" in "X[0]"
 345          eval(shift(@insns));
 346          eval(shift(@insns));
 347          eval(shift(@insns));
 348           &vadd_i32     (@Tx[1],@X[-1&7],$K);
 349          eval(shift(@insns));
 350           &vld1_32      ("{$K\[]}","[$K_XX_XX,:32]!")   if ($Xi%5==0);
 351          eval(shift(@insns));
 352         &vext_8         (@Tx[0],@X[-1&7],$zero,4);      # "X[-3]", 3 words
 353          eval(shift(@insns));
 354          eval(shift(@insns));
 355          eval(shift(@insns));
 356         &veor           (@X[0],@X[0],@X[-4&7]);         # "X[0]"^="X[-16]"
 357          eval(shift(@insns));
 358          eval(shift(@insns));
 359         &veor           (@Tx[0],@Tx[0],@X[-2&7]);       # "X[-3]"^"X[-8]"
 360          eval(shift(@insns));
 361          eval(shift(@insns));
 362         &veor           (@Tx[0],@Tx[0],@X[0]);          # "X[0]"^="X[-3]"^"X[-8]
 363          eval(shift(@insns));
 364          eval(shift(@insns));
 365           &vst1_32      ("{@Tx[1]}","[$Xfer,:128]!");   # X[]+K xfer
 366           &sub          ($Xfer,$Xfer,64)                if ($Xi%4==0);
 367          eval(shift(@insns));
 368          eval(shift(@insns));
 369         &vext_8         (@Tx[1],$zero,@Tx[0],4);        # "X[0]"<<96, extract one dword
 370          eval(shift(@insns));
 371          eval(shift(@insns));
 372         &vadd_i32       (@X[0],@Tx[0],@Tx[0]);
 373          eval(shift(@insns));
 374          eval(shift(@insns));
 375         &vsri_32        (@X[0],@Tx[0],31);              # "X[0]"<<<=1
 376          eval(shift(@insns));
 377          eval(shift(@insns));
 378          eval(shift(@insns));
 379         &vshr_u32       (@Tx[0],@Tx[1],30);
 380          eval(shift(@insns));
 381          eval(shift(@insns));
 382         &vshl_u32       (@Tx[1],@Tx[1],2);
 383          eval(shift(@insns));
 384          eval(shift(@insns));
 385         &veor           (@X[0],@X[0],@Tx[0]);
 386          eval(shift(@insns));
 387          eval(shift(@insns));
 388         &veor           (@X[0],@X[0],@Tx[1]);           # "X[0]"^=("X[0]">>96)<<<2
 389
 390         foreach (@insns) { eval; }      # remaining instructions [if any]
 391
 392   $Xi++;        push(@X,shift(@X));     # "rotate" X[]
 393 }
 394
 395 sub Xupdate_32_79 ()
 396 { use integer;
 397   my $body = shift;
 398   my @insns = (&$body,&$body,&$body,&$body);
 399   my ($a,$b,$c,$d,$e);
 400
 401         &vext_8         (@Tx[0],@X[-2&7],@X[-1&7],8);   # compose "X[-6]"
 402          eval(shift(@insns));
 403          eval(shift(@insns));
 404          eval(shift(@insns));
 405         &veor           (@X[0],@X[0],@X[-4&7]);         # "X[0]"="X[-32]"^"X[-16]"
 406          eval(shift(@insns));
 407          eval(shift(@insns));
 408         &veor           (@X[0],@X[0],@X[-7&7]);         # "X[0]"^="X[-28]"
 409          eval(shift(@insns));
 410          eval(shift(@insns));
 411           &vadd_i32     (@Tx[1],@X[-1&7],$K);
 412          eval(shift(@insns));
 413           &vld1_32      ("{$K\[]}","[$K_XX_XX,:32]!")   if ($Xi%5==0);
 414          eval(shift(@insns));
 415         &veor           (@Tx[0],@Tx[0],@X[0]);          # "X[-6]"^="X[0]"
 416          eval(shift(@insns));
 417          eval(shift(@insns));
 418         &vshr_u32       (@X[0],@Tx[0],30);
 419          eval(shift(@insns));
 420          eval(shift(@insns));
 421           &vst1_32      ("{@Tx[1]}","[$Xfer,:128]!");   # X[]+K xfer
 422           &sub          ($Xfer,$Xfer,64)                if ($Xi%4==0);
 423          eval(shift(@insns));
 424          eval(shift(@insns));
 425         &vsli_32        (@X[0],@Tx[0],2);               # "X[0]"="X[-6]"<<<2
 426
 427         foreach (@insns) { eval; }      # remaining instructions [if any]
 428
 429   $Xi++;        push(@X,shift(@X));     # "rotate" X[]
 430 }
 431
 432 sub Xuplast_80 ()
 433 { use integer;
 434   my $body = shift;
 435   my @insns = (&$body,&$body,&$body,&$body);
 436   my ($a,$b,$c,$d,$e);
 437
 438         &vadd_i32       (@Tx[1],@X[-1&7],$K);
 439          eval(shift(@insns));
 440          eval(shift(@insns));
 441         &vst1_32        ("{@Tx[1]}","[$Xfer,:128]!");
 442         &sub            ($Xfer,$Xfer,64);
 443
 444         &teq            ($inp,$len);
 445         &sub            ($K_XX_XX,$K_XX_XX,16); # rewind $K_XX_XX
 446         &subeq          ($inp,$inp,64);         # reload last block to avoid SEGV
 447         &vld1_8         ("{@X[-4&7]-@X[-3&7]}","[$inp]!");
 448          eval(shift(@insns));
 449          eval(shift(@insns));
 450         &vld1_8         ("{@X[-2&7]-@X[-1&7]}","[$inp]!");
 451          eval(shift(@insns));
 452          eval(shift(@insns));
 453         &vld1_32        ("{$K\[]}","[$K_XX_XX,:32]!");  # load K_00_19
 454          eval(shift(@insns));
 455          eval(shift(@insns));
 456         &vrev32_8       (@X[-4&7],@X[-4&7]);
 457
 458         foreach (@insns) { eval; }              # remaining instructions
 459
 460    $Xi=0;
 461 }
 462
 463 sub Xloop()
 464 { use integer;
 465   my $body = shift;
 466   my @insns = (&$body,&$body,&$body,&$body);
 467   my ($a,$b,$c,$d,$e);
 468
 469         &vrev32_8       (@X[($Xi-3)&7],@X[($Xi-3)&7]);
 470          eval(shift(@insns));
 471          eval(shift(@insns));
 472         &vadd_i32       (@X[$Xi&7],@X[($Xi-4)&7],$K);
 473          eval(shift(@insns));
 474          eval(shift(@insns));
 475         &vst1_32        ("{@X[$Xi&7]}","[$Xfer,:128]!");# X[]+K xfer to IALU
 476
 477         foreach (@insns) { eval; }
 478
 479   $Xi++;
 480 }
 481
 482 $code.=<<___;
 483 #if __ARM_MAX_ARCH__>=7
 484 .arch   armv7-a
 485 .fpu    neon
 486
 487 .type   sha1_block_data_order_neon,%function
 488 .align  4
 489 sha1_block_data_order_neon:
 490 .LNEON:
 491         stmdb   sp!,{r4-r12,lr}
 492         add     $len,$inp,$len,lsl#6    @ $len to point at the end of $inp
 493         @ dmb                           @ errata #451034 on early Cortex A8
 494         @ vstmdb        sp!,{d8-d15}    @ ABI specification says so
 495         mov     $saved_sp,sp
 496         sub     sp,sp,#64               @ alloca
 497         adr     $K_XX_XX,.LK_00_19
 498         bic     sp,sp,#15               @ align for 128-bit stores
 499
 500         ldmia   $ctx,{$a,$b,$c,$d,$e}   @ load context
 501         mov     $Xfer,sp
 502
 503         vld1.8          {@X[-4&7]-@X[-3&7]},[$inp]!     @ handles unaligned
 504         veor            $zero,$zero,$zero
 505         vld1.8          {@X[-2&7]-@X[-1&7]},[$inp]!
 506         vld1.32         {${K}\[]},[$K_XX_XX,:32]!       @ load K_00_19
 507         vrev32.8        @X[-4&7],@X[-4&7]               @ yes, even on
 508         vrev32.8        @X[-3&7],@X[-3&7]               @ big-endian...
 509         vrev32.8        @X[-2&7],@X[-2&7]
 510         vadd.i32        @X[0],@X[-4&7],$K
 511         vrev32.8        @X[-1&7],@X[-1&7]
 512         vadd.i32        @X[1],@X[-3&7],$K
 513         vst1.32         {@X[0]},[$Xfer,:128]!
 514         vadd.i32        @X[2],@X[-2&7],$K
 515         vst1.32         {@X[1]},[$Xfer,:128]!
 516         vst1.32         {@X[2]},[$Xfer,:128]!
 517         ldr             $Ki,[sp]                        @ big RAW stall
 518
 519 .Loop_neon:
 520 ___
 521         &Xupdate_16_31(\&body_00_19);
 522         &Xupdate_16_31(\&body_00_19);
 523         &Xupdate_16_31(\&body_00_19);
 524         &Xupdate_16_31(\&body_00_19);
 525         &Xupdate_32_79(\&body_00_19);
 526         &Xupdate_32_79(\&body_20_39);
 527         &Xupdate_32_79(\&body_20_39);
 528         &Xupdate_32_79(\&body_20_39);
 529         &Xupdate_32_79(\&body_20_39);
 530         &Xupdate_32_79(\&body_20_39);
 531         &Xupdate_32_79(\&body_40_59);
 532         &Xupdate_32_79(\&body_40_59);
 533         &Xupdate_32_79(\&body_40_59);
 534         &Xupdate_32_79(\&body_40_59);
 535         &Xupdate_32_79(\&body_40_59);
 536         &Xupdate_32_79(\&body_20_39);
 537         &Xuplast_80(\&body_20_39);
 538         &Xloop(\&body_20_39);
 539         &Xloop(\&body_20_39);
 540         &Xloop(\&body_20_39);
 541 $code.=<<___;
 542         ldmia   $ctx,{$Ki,$t0,$t1,$Xfer}        @ accumulate context
 543         add     $a,$a,$Ki
 544         ldr     $Ki,[$ctx,#16]
 545         add     $b,$b,$t0
 546         add     $c,$c,$t1
 547         add     $d,$d,$Xfer
 548         moveq   sp,$saved_sp
 549         add     $e,$e,$Ki
 550         ldrne   $Ki,[sp]
 551         stmia   $ctx,{$a,$b,$c,$d,$e}
 552         addne   $Xfer,sp,#3*16
 553         bne     .Loop_neon
 554
 555         @ vldmia        sp!,{d8-d15}
 556         ldmia   sp!,{r4-r12,pc}
 557 .size   sha1_block_data_order_neon,.-sha1_block_data_order_neon
 558 #endif
 559 ___
 560 }}}
 561 #####################################################################
 562 # ARMv8 stuff
 563 #
 564 {{{
 565 my ($ABCD,$E,$E0,$E1)=map("q$_",(0..3));
 566 my @MSG=map("q$_",(4..7));
 567 my @Kxx=map("q$_",(8..11));
 568 my ($W0,$W1,$ABCD_SAVE)=map("q$_",(12..14));
 569
 570 $code.=<<___;
 571 #if __ARM_MAX_ARCH__>=7
 572 .type   sha1_block_data_order_armv8,%function
 573 .align  5
 574 sha1_block_data_order_armv8:
 575 .LARMv8:
 576         vstmdb  sp!,{d8-d15}            @ ABI specification says so
 577
 578         veor    $E,$E,$E
 579         adr     r3,.LK_00_19
 580         vld1.32 {$ABCD},[$ctx]!
 581         vld1.32 {$E\[0]},[$ctx]
 582         sub     $ctx,$ctx,#16
 583         vld1.32 {@Kxx[0]\[]},[r3,:32]!
 584         vld1.32 {@Kxx[1]\[]},[r3,:32]!
 585         vld1.32 {@Kxx[2]\[]},[r3,:32]!
 586         vld1.32 {@Kxx[3]\[]},[r3,:32]
 587
 588 .Loop_v8:
 589         vld1.8          {@MSG[0]-@MSG[1]},[$inp]!
 590         vld1.8          {@MSG[2]-@MSG[3]},[$inp]!
 591         vrev32.8        @MSG[0],@MSG[0]
 592         vrev32.8        @MSG[1],@MSG[1]
 593
 594         vadd.i32        $W0,@Kxx[0],@MSG[0]
 595         vrev32.8        @MSG[2],@MSG[2]
 596         vmov            $ABCD_SAVE,$ABCD        @ offload
 597         subs            $len,$len,#1
 598
 599         vadd.i32        $W1,@Kxx[0],@MSG[1]
 600         vrev32.8        @MSG[3],@MSG[3]
 601         sha1h           $E1,$ABCD               @ 0
 602         sha1c           $ABCD,$E,$W0
 603         vadd.i32        $W0,@Kxx[$j],@MSG[2]
 604         sha1su0         @MSG[0],@MSG[1],@MSG[2]
 605 ___
 606 for ($j=0,$i=1;$i<20-3;$i++) {
 607 my $f=("c","p","m","p")[$i/5];
 608 $code.=<<___;
 609         sha1h           $E0,$ABCD               @ $i
 610         sha1$f          $ABCD,$E1,$W1
 611         vadd.i32        $W1,@Kxx[$j],@MSG[3]
 612         sha1su1         @MSG[0],@MSG[3]
 613 ___
 614 $code.=<<___ if ($i<20-4);
 615         sha1su0         @MSG[1],@MSG[2],@MSG[3]
 616 ___
 617         ($E0,$E1)=($E1,$E0);    ($W0,$W1)=($W1,$W0);
 618         push(@MSG,shift(@MSG)); $j++ if ((($i+3)%5)==0);
 619 }
 620 $code.=<<___;
 621         sha1h           $E0,$ABCD               @ $i
 622         sha1p           $ABCD,$E1,$W1
 623         vadd.i32        $W1,@Kxx[$j],@MSG[3]
 624
 625         sha1h           $E1,$ABCD               @ 18
 626         sha1p           $ABCD,$E0,$W0
 627
 628         sha1h           $E0,$ABCD               @ 19
 629         sha1p           $ABCD,$E1,$W1
 630
 631         vadd.i32        $E,$E,$E0
 632         vadd.i32        $ABCD,$ABCD,$ABCD_SAVE
 633         bne             .Loop_v8
 634
 635         vst1.32         {$ABCD},[$ctx]!
 636         vst1.32         {$E\[0]},[$ctx]
 637
 638         vldmia  sp!,{d8-d15}
 639         ret                                     @ bx lr
 640 .size   sha1_block_data_order_armv8,.-sha1_block_data_order_armv8
 641 #endif
 642 ___
 643 }}}
 644 $code.=<<___;
 645 #if __ARM_MAX_ARCH__>=7
 646 .comm   OPENSSL_armcap_P,4,4
 647 #endif
 648 ___
 649
 650 {   my  %opcode = (
 651         "sha1c"         => 0xf2000c40,  "sha1p"         => 0xf2100c40,
 652         "sha1m"         => 0xf2200c40,  "sha1su0"       => 0xf2300c40,
 653         "sha1h"         => 0xf3b902c0,  "sha1su1"       => 0xf3ba0380   );
 654
 655     sub unsha1 {
 656         my ($mnemonic,$arg)=@_;
 657
 658         if ($arg =~ m/q([0-9]+)(?:,\s*q([0-9]+))?,\s*q([0-9]+)/o) {
 659             my $word = $opcode{$mnemonic}|(($1&7)<<13)|(($1&8)<<19)
 660                                          |(($2&7)<<17)|(($2&8)<<4)
 661                                          |(($3&7)<<1) |(($3&8)<<2);
 662             # since ARMv7 instructions are always encoded little-endian.
 663             # correct solution is to use .inst directive, but older
 664             # assemblers don't implement it:-(
 665             sprintf ".byte\t0x%02x,0x%02x,0x%02x,0x%02x\t@ %s %s",
 666                         $word&0xff,($word>>8)&0xff,
 667                         ($word>>16)&0xff,($word>>24)&0xff,
 668                         $mnemonic,$arg;
 669         }
 670     }
 671 }
 672
 673 foreach (split($/,$code)) {
 674         s/{q([0-9]+)\[\]}/sprintf "{d%d[],d%d[]}",2*$1,2*$1+1/eo        or
 675         s/{q([0-9]+)\[0\]}/sprintf "{d%d[0]}",2*$1/eo;
 676
 677         s/\b(sha1\w+)\s+(q.*)/unsha1($1,$2)/geo;
 678
 679         s/\bret\b/bx    lr/o            or
 680         s/\bbx\s+lr\b/.word\t0xe12fff1e/o;      # make it possible to compile with -march=armv4
 681
 682         print $_,$/;
 683 }
 684
 685 close STDOUT; # enforce flush