crypto/arm_arch.h

   1 /*
   2  * Copyright 2011-2021 The OpenSSL Project Authors. All Rights Reserved.
   3  *
   4  * Licensed under the Apache License 2.0 (the "License").  You may not use
   5  * this file except in compliance with the License.  You can obtain a copy
   6  * in the file LICENSE in the source distribution or at
   7  * https://www.openssl.org/source/license.html
   8  */
   9
  10 #ifndef OSSL_CRYPTO_ARM_ARCH_H
  11 # define OSSL_CRYPTO_ARM_ARCH_H
  12
  13 # if !defined(__ARM_ARCH__)
  14 #  if defined(__CC_ARM)
  15 #   define __ARM_ARCH__ __TARGET_ARCH_ARM
  16 #   if defined(__BIG_ENDIAN)
  17 #    define __ARMEB__
  18 #   else
  19 #    define __ARMEL__
  20 #   endif
  21 #  elif defined(__GNUC__)
  22 #   if   defined(__aarch64__)
  23 #    define __ARM_ARCH__ 8
  24 #    if __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
  25 #     define __ARMEB__
  26 #    else
  27 #     define __ARMEL__
  28 #    endif
  29   /*
  30    * Why doesn't gcc define __ARM_ARCH__? Instead it defines
  31    * bunch of below macros. See all_architectures[] table in
  32    * gcc/config/arm/arm.c. On a side note it defines
  33    * __ARMEL__/__ARMEB__ for little-/big-endian.
  34    */
  35 #   elif defined(__ARM_ARCH)
  36 #    define __ARM_ARCH__ __ARM_ARCH
  37 #   elif defined(__ARM_ARCH_8A__)
  38 #    define __ARM_ARCH__ 8
  39 #   elif defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__)     || \
  40         defined(__ARM_ARCH_7R__)|| defined(__ARM_ARCH_7M__)     || \
  41         defined(__ARM_ARCH_7EM__)
  42 #    define __ARM_ARCH__ 7
  43 #   elif defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__)     || \
  44         defined(__ARM_ARCH_6K__)|| defined(__ARM_ARCH_6M__)     || \
  45         defined(__ARM_ARCH_6Z__)|| defined(__ARM_ARCH_6ZK__)    || \
  46         defined(__ARM_ARCH_6T2__)
  47 #    define __ARM_ARCH__ 6
  48 #   elif defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__)     || \
  49         defined(__ARM_ARCH_5E__)|| defined(__ARM_ARCH_5TE__)    || \
  50         defined(__ARM_ARCH_5TEJ__)
  51 #    define __ARM_ARCH__ 5
  52 #   elif defined(__ARM_ARCH_4__) || defined(__ARM_ARCH_4T__)
  53 #    define __ARM_ARCH__ 4
  54 #   else
  55 #    error "unsupported ARM architecture"
  56 #   endif
  57 #  endif
  58 # endif
  59
  60 # if !defined(__ARM_MAX_ARCH__)
  61 #  define __ARM_MAX_ARCH__ __ARM_ARCH__
  62 # endif
  63
  64 # if __ARM_MAX_ARCH__<__ARM_ARCH__
  65 #  error "__ARM_MAX_ARCH__ can't be less than __ARM_ARCH__"
  66 # elif __ARM_MAX_ARCH__!=__ARM_ARCH__
  67 #  if __ARM_ARCH__<7 && __ARM_MAX_ARCH__>=7 && defined(__ARMEB__)
  68 #   error "can't build universal big-endian binary"
  69 #  endif
  70 # endif
  71
  72 # ifndef __ASSEMBLER__
  73 extern unsigned int OPENSSL_armcap_P;
  74 extern unsigned int OPENSSL_arm_midr;
  75 extern unsigned int OPENSSL_armv8_rsa_neonized;
  76 # endif
  77
  78 # define ARMV7_NEON      (1<<0)
  79 # define ARMV7_TICK      (1<<1)
  80 # define ARMV8_AES       (1<<2)
  81 # define ARMV8_SHA1      (1<<3)
  82 # define ARMV8_SHA256    (1<<4)
  83 # define ARMV8_PMULL     (1<<5)
  84 # define ARMV8_SHA512    (1<<6)
  85 # define ARMV8_CPUID     (1<<7)
  86
  87 /*
  88  * MIDR_EL1 system register
  89  *
  90  * 63___ _ ___32_31___ _ ___24_23_____20_19_____16_15__ _ __4_3_______0
  91  * |            |             |         |         |          |        |
  92  * |RES0        | Implementer | Variant | Arch    | PartNum  |Revision|
  93  * |____ _ _____|_____ _ _____|_________|_______ _|____ _ ___|________|
  94  *
  95  */
  96
  97 # define ARM_CPU_IMP_ARM           0x41
  98
  99 # define ARM_CPU_PART_CORTEX_A72   0xD08
 100 # define ARM_CPU_PART_N1           0xD0C
 101
 102 # define MIDR_PARTNUM_SHIFT       4
 103 # define MIDR_PARTNUM_MASK        (0xfff << MIDR_PARTNUM_SHIFT)
 104 # define MIDR_PARTNUM(midr)       \
 105            (((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT)
 106
 107 # define MIDR_IMPLEMENTER_SHIFT   24
 108 # define MIDR_IMPLEMENTER_MASK    (0xff << MIDR_IMPLEMENTER_SHIFT)
 109 # define MIDR_IMPLEMENTER(midr)   \
 110            (((midr) & MIDR_IMPLEMENTER_MASK) >> MIDR_IMPLEMENTER_SHIFT)
 111
 112 # define MIDR_ARCHITECTURE_SHIFT  16
 113 # define MIDR_ARCHITECTURE_MASK   (0xf << MIDR_ARCHITECTURE_SHIFT)
 114 # define MIDR_ARCHITECTURE(midr)  \
 115            (((midr) & MIDR_ARCHITECTURE_MASK) >> MIDR_ARCHITECTURE_SHIFT)
 116
 117 # define MIDR_CPU_MODEL_MASK \
 118            (MIDR_IMPLEMENTER_MASK | \
 119             MIDR_PARTNUM_MASK     | \
 120             MIDR_ARCHITECTURE_MASK)
 121
 122 # define MIDR_CPU_MODEL(imp, partnum) \
 123            (((imp)     << MIDR_IMPLEMENTER_SHIFT)  | \
 124             (0xf       << MIDR_ARCHITECTURE_SHIFT) | \
 125             ((partnum) << MIDR_PARTNUM_SHIFT))
 126
 127 # define MIDR_IS_CPU_MODEL(midr, imp, partnum) \
 128            (((midr) & MIDR_CPU_MODEL_MASK) == MIDR_CPU_MODEL(imp, partnum))
 129
 130 #if defined(__ASSEMBLER__)
 131
 132    /*
 133     * Support macros for
 134     *   - Armv8.3-A Pointer Authentication and
 135     *   - Armv8.5-A Branch Target Identification
 136     * features which require emitting a .note.gnu.property section with the
 137     * appropriate architecture-dependent feature bits set.
 138     * Read more: "ELF for the Arm® 64-bit Architecture"
 139     */
 140
 141 #  if defined(__ARM_FEATURE_BTI_DEFAULT) && __ARM_FEATURE_BTI_DEFAULT == 1
 142 #   define GNU_PROPERTY_AARCH64_BTI (1 << 0)   /* Has Branch Target Identification */
 143 #   define AARCH64_VALID_CALL_TARGET hint #34  /* BTI 'c' */
 144 #  else
 145 #   define GNU_PROPERTY_AARCH64_BTI 0  /* No Branch Target Identification */
 146 #   define AARCH64_VALID_CALL_TARGET
 147 #  endif
 148
 149 #  if defined(__ARM_FEATURE_PAC_DEFAULT) && \
 150        (__ARM_FEATURE_PAC_DEFAULT & 1) == 1  /* Signed with A-key */
 151 #   define GNU_PROPERTY_AARCH64_POINTER_AUTH \
 152      (1 << 1)                                       /* Has Pointer Authentication */
 153 #   define AARCH64_SIGN_LINK_REGISTER hint #25      /* PACIASP */
 154 #   define AARCH64_VALIDATE_LINK_REGISTER hint #29  /* AUTIASP */
 155 #  elif defined(__ARM_FEATURE_PAC_DEFAULT) && \
 156        (__ARM_FEATURE_PAC_DEFAULT & 2) == 2  /* Signed with B-key */
 157 #   define GNU_PROPERTY_AARCH64_POINTER_AUTH \
 158      (1 << 1)                                       /* Has Pointer Authentication */
 159 #   define AARCH64_SIGN_LINK_REGISTER hint #27      /* PACIBSP */
 160 #   define AARCH64_VALIDATE_LINK_REGISTER hint #31  /* AUTIBSP */
 161 #  else
 162 #   define GNU_PROPERTY_AARCH64_POINTER_AUTH 0  /* No Pointer Authentication */
 163 #   if GNU_PROPERTY_AARCH64_BTI != 0
 164 #    define AARCH64_SIGN_LINK_REGISTER AARCH64_VALID_CALL_TARGET
 165 #   else
 166 #    define AARCH64_SIGN_LINK_REGISTER
 167 #   endif
 168 #   define AARCH64_VALIDATE_LINK_REGISTER
 169 #  endif
 170
 171 #  if GNU_PROPERTY_AARCH64_POINTER_AUTH != 0 || GNU_PROPERTY_AARCH64_BTI != 0
 172     .pushsection .note.gnu.property, "a";
 173     .balign 8;
 174     .long 4;
 175     .long 0x10;
 176     .long 0x5;
 177     .asciz "GNU";
 178     .long 0xc0000000; /* GNU_PROPERTY_AARCH64_FEATURE_1_AND */
 179     .long 4;
 180     .long (GNU_PROPERTY_AARCH64_POINTER_AUTH | GNU_PROPERTY_AARCH64_BTI);
 181     .long 0;
 182     .popsection;
 183 #  endif
 184
 185 # endif  /* defined __ASSEMBLER__ */
 186
 187 #endif