Move aes_asm_src file information to build.info files
authorRichard Levitte <levitte@openssl.org>
Sun, 16 Jun 2019 19:03:07 +0000 (21:03 +0200)
committerRichard Levitte <levitte@openssl.org>
Mon, 17 Jun 2019 14:08:52 +0000 (16:08 +0200)
Reviewed-by: Matt Caswell <matt@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/9166)

Configurations/00-base-templates.conf
Configurations/10-main.conf
Configurations/README
Configure
crypto/aes/build.info

index d088363..0c7334e 100644 (file)
@@ -14,7 +14,6 @@ my %targets=(
        thread_scheme   => "(unknown)", # Assume we don't know
        thread_defines  => [],
 
-       aes_asm_src     => "aes_core.c aes_cbc.c",
        bf_asm_src      => "bf_enc.c",
        md5_asm_src     => "",
        cast_asm_src    => "c_enc.c",
@@ -164,7 +163,6 @@ my %targets=(
 
     x86_asm => {
        template        => 1,
-       aes_asm_src     => "aes-586.s vpaes-x86.s aesni-x86.s",
        bf_asm_src      => "bf-586.s",
        md5_asm_src     => "md5-586.s",
        cast_asm_src    => "cast-586.s",
@@ -185,7 +183,6 @@ my %targets=(
     },
     x86_64_asm => {
        template        => 1,
-       aes_asm_src     => "aes-x86_64.s vpaes-x86_64.s bsaes-x86_64.s aesni-x86_64.s aesni-sha1-x86_64.s aesni-sha256-x86_64.s aesni-mb-x86_64.s",
        md5_asm_src     => "md5-x86_64.s",
        sha1_asm_src    => "sha1-x86_64.s sha256-x86_64.s sha512-x86_64.s sha1-mb-x86_64.s sha256-mb-x86_64.s",
        rc4_asm_src     => "rc4-x86_64.s rc4-md5-x86_64.s",
@@ -199,7 +196,6 @@ my %targets=(
     },
     ia64_asm => {
        template        => 1,
-       aes_asm_src     => "aes_core.c aes_cbc.c aes-ia64.s",
        sha1_asm_src    => "sha1-ia64.s sha256-ia64.s sha512-ia64.s",
        modes_asm_src   => "ghash-ia64.s",
        chacha_asm_src  => "chacha-ia64.S",
@@ -207,7 +203,6 @@ my %targets=(
     },
     sparcv9_asm => {
        template        => 1,
-       aes_asm_src     => "aes_core.c aes_cbc.c aes-sparcv9.S aest4-sparcv9.S aesfx-sparcv9.S",
        md5_asm_src     => "md5-sparcv9.S",
        sha1_asm_src    => "sha1-sparcv9.S sha256-sparcv9.S sha512-sparcv9.S",
        cmll_asm_src    => "camellia.c cmll_misc.c cmll_cbc.c cmllt4-sparcv9.S",
@@ -224,7 +219,6 @@ my %targets=(
     },
     mips32_asm => {
        template        => 1,
-       aes_asm_src     => "aes_cbc.c aes-mips.S",
        sha1_asm_src    => "sha1-mips.S sha256-mips.S",
     },
     mips64_asm => {
@@ -235,7 +229,6 @@ my %targets=(
     },
     s390x_asm => {
        template        => 1,
-       aes_asm_src     => "aes-s390x.S aes-ctr.fake aes-xts.fake",
        sha1_asm_src    => "sha1-s390x.S sha256-s390x.S sha512-s390x.S",
        rc4_asm_src     => "rc4-s390x.s",
        modes_asm_src   => "ghash-s390x.S",
@@ -245,7 +238,6 @@ my %targets=(
     },
     armv4_asm => {
        template        => 1,
-       aes_asm_src     => "aes_cbc.c aes-armv4.S bsaes-armv7.S aesv8-armx.S",
        sha1_asm_src    => "sha1-armv4-large.S sha256-armv4.S sha512-armv4.S",
        modes_asm_src   => "ghash-armv4.S ghashv8-armx.S",
        chacha_asm_src  => "chacha-armv4.S",
@@ -254,7 +246,6 @@ my %targets=(
     },
     aarch64_asm => {
        template        => 1,
-       aes_asm_src     => "aes_core.c aes_cbc.c aesv8-armx.S vpaes-armv8.S",
        sha1_asm_src    => "sha1-armv8.S sha256-armv8.S sha512-armv8.S",
        modes_asm_src   => "ghashv8-armx.S",
        chacha_asm_src  => "chacha-armv8.S",
@@ -263,7 +254,6 @@ my %targets=(
     },
     parisc11_asm => {
        template        => 1,
-       aes_asm_src     => "aes_core.c aes_cbc.c aes-parisc.s",
        sha1_asm_src    => "sha1-parisc.s sha256-parisc.s sha512-parisc.s",
        rc4_asm_src     => "rc4-parisc.s",
        modes_asm_src   => "ghash-parisc.s",
@@ -274,7 +264,6 @@ my %targets=(
     },
     ppc32_asm => {
        template        => 1,
-       aes_asm_src     => "aes_core.c aes_cbc.c aes-ppc.s vpaes-ppc.s aesp8-ppc.s",
        sha1_asm_src    => "sha1-ppc.s sha256-ppc.s sha512-ppc.s sha256p8-ppc.s sha512p8-ppc.s",
        modes_asm_src   => "ghashp8-ppc.s",
        chacha_asm_src  => "chacha-ppc.s",
index 26cbbf9..51caa30 100644 (file)
@@ -949,7 +949,6 @@ my %targets = (
         cppflags         => combine("-DOPENSSL_SMALL_FOOTPRINT",
                                     threads("-D_REENTRANT")),
         bn_ops           => "BN_LLONG",
-        aes_asm_src      => "aes-c64xplus.s aes_cbc.c aes-ctr.fake",
         sha1_asm_src     => "sha1-c64xplus.s sha256-c64xplus.s sha512-c64xplus.s",
         rc4_asm_src      => "rc4-c64xplus.s",
         modes_asm_src    => "ghash-c64xplus.s",
index 2cdd351..36e71ee 100644 (file)
@@ -240,9 +240,6 @@ In each table entry, the following keys are significant:
                                                 export vars as
                                                 accessor functions.
 
-        aes_asm_src     => Assembler implementation of core AES
-                           functions.
-                           Defaults to 'aes_core.c aes_cbc.c'
         bf_asm_src      => Assembler implementation of core BlowFish
                            functions.
                            Defaults to 'bf_enc.c'
index 85c9b92..cbd8ef1 100755 (executable)
--- a/Configure
+++ b/Configure
@@ -1422,32 +1422,6 @@ unless ($disabled{asm}) {
     if ($target{rmd160_asm_src}) {
         push @{$config{lib_defines}}, "RMD160_ASM";
     }
-    if ($target{aes_asm_src}) {
-        if ($target{aes_asm_src} =~ m/\baes-/) {
-            push @{$config{lib_defines}}, "AES_ASM";
-            push @{$config{module_defines}}, "AES_ASM";
-        }
-        # aes-ctr.fake is not a real file, only indication that assembler
-        # module implements AES_ctr32_encrypt...
-        if ($target{aes_asm_src} =~ s/\s*aes-ctr\.fake//) {
-            push @{$config{lib_defines}}, "AES_CTR_ASM";
-            push @{$config{module_defines}}, "AES_CTR_ASM";
-        }
-        # aes-xts.fake indicates presence of AES_xts_[en|de]crypt...
-        if ($target{aes_asm_src} =~ s/\s*aes-xts\.fake//) {
-            push @{$config{lib_defines}}, "AES_XTS_ASM";
-            push @{$config{module_defines}}, "AES_XTS_ASM";
-        }
-        $target{aes_asm_src} =~ s/\s*(vpaes|aesni)-x86\.s//g if ($disabled{sse2});
-        if ($target{aes_asm_src} =~ m/vpaes/) {
-            push @{$config{lib_defines}}, "VPAES_ASM";
-            push @{$config{module_defines}}, "VPAES_ASM";
-        }
-        if ($target{aes_asm_src} =~ m/bsaes/) {
-            push @{$config{lib_defines}}, "BSAES_ASM";
-            push @{$config{module_defines}}, "BSAES_ASM";
-        }
-    }
     if ($target{wp_asm_src} =~ /mmx/) {
         if ($config{processor} eq "386") {
             $target{wp_asm_src}=$table{DEFAULTS}->{wp_asm_src};
@@ -3392,7 +3366,6 @@ sub print_table_entry
         "loutflag",
         "ex_libs",
         "bn_ops",
-        "aes_asm_src",
         "bf_asm_src",
         "md5_asm_src",
         "cast_asm_src",
index 3a27d17..706ca58 100644 (file)
@@ -1,9 +1,70 @@
 LIBS=../../libcrypto
 
-$COMMON=aes_misc.c aes_ecb.c {- $target{aes_asm_src} -}
-SOURCE[../../libcrypto]=$COMMON \
-        aes_cfb.c aes_ofb.c aes_ige.c aes_wrap.c
+$AESASM=aes_core.c aes_cbc.c
+IF[{- !$disabled{asm} -}]
+  $AESASM_x86=aes-586.s
+  $AESASM_x86_sse2=vpaes-x86.s aesni-x86.s
+  $AESDEF_x86_sse2=AES_ASM VPAES_ASM
+
+  $AESASM_x86_64=\
+        aes-x86_64.s bsaes-x86_64.s \
+        aesni-sha1-x86_64.s aesni-sha256-x86_64.s aesni-mb-x86_64.s
+  $AESDEF_x86_64=AES_ASM BSAES_ASM
+  $AESASM_x86_64_sse2=vpaes-x86_64.s aesni-x86_64.s
+  $AESDEF_x86_64_sse2=VPAES_ASM
+
+  $AESASM_ia64=aes_core.c aes_cbc.c aes-ia64.s
+  $AESDEF_ia64=AES_ASM
+
+  $AESASM_sparcv9=\
+        aes_core.c aes_cbc.c aes-sparcv9.S aest4-sparcv9.S aesfx-sparcv9.S
+  $AESDEF_sparcv9=AES_ASM
+
+  $AESASM_mips32=aes_cbc.c aes-mips.S
+  $AESDEF_mips32=AES_ASM
+  $AESASM_mips64=$AESASM_mips32
+  $AESDEF_mips64=$AESDEF_mips32
+
+  $AESASM_s390x=aes-s390x.S
+  # aes-390x.S implements AES_ctr32_encrypt and AES_xts_[en|de]crypt
+  $AESDEF_s390x=AES_ASM AES_CTR_ASM AES_XTS_ASM
+
+  $AESASM_armv4=aes_cbc.c aes-armv4.S bsaes-armv7.S aesv8-armx.S
+  $AESDEF_armv4=AES_ASM BSAES_ASM
+  $AESASM_aarch64=aes_core.c aes_cbc.c aesv8-armx.S vpaes-armv8.S
+  $AESDEF_aarch64=VPAES_ASM
+
+  $AESASM_parisc11=aes_core.c aes_cbc.c aes-parisc.s
+  $AESDEF_parisc11=AES_ASM
+  $AESASM_parisc20_64=$AESASM_parisc11
+  $AESDEF_parisc20_64=$AESDEF_parisc11
+
+  $AESASM_ppc32=aes_core.c aes_cbc.c aes-ppc.s vpaes-ppc.s aesp8-ppc.s
+  $AESDEF_ppc32=AES_ASM VPAES_ASM
+  $AESASM_ppc64=$AESASM_ppc32
+  $AESDEF_ppc64=$AESDEF_ppc32
+
+  $AESASM_c64xplus=aes-c64xplus.s aes_cbc.c
+  # aes-c64xplus.s implements AES_ctr32_encrypt
+  $AESDEF_c64xplus=AES_ASM AES_CTR_ASM
+
+  # Now that we have defined all the arch specific variables, use the
+  # appropriate one, and define the appropriate macros
+  IF[$AESASM_{- $target{asm_arch} -}]
+    $AESASM=$AESASM_{- $target{asm_arch} -}
+    $AESDEF=$AESDEF_{- $target{asm_arch} -}
+    IF[{- !$disabled{sse2} -}]
+      $AESASM=$AESASM $AESASM_{- $target{asm_arch} -}_sse2
+      $AESDEF=$AESDEF $AESDEF_{- $target{asm_arch} -}_sse2
+    ENDIF
+  ENDIF
+ENDIF
+
+$COMMON=aes_misc.c aes_ecb.c $AESASM
+SOURCE[../../libcrypto]=$COMMON aes_cfb.c aes_ofb.c aes_ige.c aes_wrap.c
+DEFINE[../../libcrypto]=$AESDEF
 SOURCE[../../providers/fips]=$COMMON
+DEFINE[../../providers/fips]=$AESDEF
 
 GENERATE[aes-ia64.s]=asm/aes-ia64.S