1 /* ====================================================================
2 * Copyright (c) 2005 The OpenSSL Project. Rights for redistribution
3 * and usage in source and binary forms are granted according to the
13 const void *FIPS_text_start(void);
14 const void *FIPS_text_end(void);
18 #if !defined(POINTER_TO_FUNCTION_IS_POINTER_TO_1ST_INSTRUCTION)
19 # if (defined(__sun) && (defined(__sparc) || defined(__sparcv9))) || \
20 (defined(__sgi) && (defined(__mips) || defined(mips))) || \
21 (defined(__osf__) && defined(__alpha)) || \
22 (defined(__linux) && (defined(__arm) || defined(__arm__))) || \
23 (defined(__i386) || defined(__i386__)) || \
24 (defined(__x86_64) || defined(__x86_64__)) || \
25 (defined(vax) || defined(__vax__))
26 # define POINTER_TO_FUNCTION_IS_POINTER_TO_1ST_INSTRUCTION
30 #if !defined(FIPS_REF_POINT_IS_CROSS_COMPILER_AWARE)
31 # if (defined(__ANDROID__) && (defined(__arm__) || defined(__arm) || \
32 defined(__i386__)|| defined(__i386))) || \
33 (defined(__vxworks) && (defined(__ppc__) || defined(__ppc))) || \
34 (defined(__linux) && defined(__PPC__) && !defined(__PPC64__))
35 # define FIPS_REF_POINT_IS_CROSS_COMPILER_AWARE
39 #if defined(__xlC__) && __xlC__>=0x600 && (defined(_POWER) || defined(_ARCH_PPC))
40 static void *instruction_pointer_xlc(void);
41 # pragma mc_func instruction_pointer_xlc {\
42 "7c0802a6" /* mflr r0 */ \
43 "48000005" /* bl $+4 */ \
44 "7c6802a6" /* mflr r3 */ \
45 "7c0803a6" /* mtlr r0 */ }
46 # pragma reg_killed_by instruction_pointer_xlc gr0 gr3
47 # define INSTRUCTION_POINTER_IMPLEMENTED(ret) (ret=instruction_pointer_xlc());
51 # define FIPS_ref_point FIPS_text_start
52 # ifdef FIPS_REF_POINT_IS_CROSS_COMPILER_AWARE
53 # define instruction_pointer FIPS_text_startX
55 /* Some compilers put string literals into a separate segment. As we
56 * are mostly interested to hash AES tables in .rodata, we declare
57 * reference points accordingly. In case you wonder, the values are
58 * big-endian encoded variable names, just to prevent these arrays
59 * from being merged by linker. */
60 # if defined(_MSC_VER)
61 # pragma section("fipsro$a",read)
62 __declspec(allocate("fipsro$a"))
64 const unsigned int FIPS_rodata_start[]=
65 { 0x46495053, 0x5f726f64, 0x6174615f, 0x73746172 };
67 # define FIPS_ref_point FIPS_text_end
68 # ifdef FIPS_REF_POINT_IS_CROSS_COMPILER_AWARE
69 # define instruction_pointer FIPS_text_endX
71 # if defined(_MSC_VER)
72 # pragma section("fipsro$c",read)
73 __declspec(allocate("fipsro$c"))
75 const unsigned int FIPS_rodata_end[]=
76 { 0x46495053, 0x5f726f64, 0x6174615f, 0x656e645b };
80 * I declare reference function as static in order to avoid certain
81 * pitfalls in -dynamic linker behaviour...
83 static void *instruction_pointer(void)
85 /* These are ABI-neutral CPU-specific snippets. ABI-neutrality means
86 * that they are designed to work under any OS running on particular
87 * CPU, which is why you don't find any #ifdef THIS_OR_THAT_OS in
89 #if defined(INSTRUCTION_POINTER_IMPLEMENTED)
90 INSTRUCTION_POINTER_IMPLEMENTED(ret);
91 #elif defined(__GNUC__) && __GNUC__>=2
92 # if defined(__alpha) || defined(__alpha__)
93 # define INSTRUCTION_POINTER_IMPLEMENTED
94 __asm __volatile ( "br %0,1f\n1:" : "=r"(ret) );
95 # elif defined(__i386) || defined(__i386__)
96 # define INSTRUCTION_POINTER_IMPLEMENTED
97 __asm __volatile ( "call 1f\n1: popl %0" : "=r"(ret) );
98 ret = (void *)((size_t)ret&~3UL); /* align for better performance */
99 # elif defined(__ia64) || defined(__ia64__)
100 # define INSTRUCTION_POINTER_IMPLEMENTED
101 __asm __volatile ( "mov %0=ip" : "=r"(ret) );
102 # elif defined(__hppa) || defined(__hppa__) || defined(__pa_risc)
103 # define INSTRUCTION_POINTER_IMPLEMENTED
104 __asm __volatile ( "blr %%r0,%0\n\tnop" : "=r"(ret) );
105 ret = (void *)((size_t)ret&~3UL); /* mask privilege level */
106 # elif defined(__mips) || defined(__mips__)
107 # define INSTRUCTION_POINTER_IMPLEMENTED
109 __asm __volatile ( "move %1,$31\n\t" /* save ra */
112 "move $31,%1" /* restore ra */
113 : "=r"(ret),"=r"(scratch) );
114 # elif defined(__ppc__) || defined(__ppc) || \
115 defined(__powerpc) || defined(__powerpc__) || \
116 defined(__POWERPC__) || defined(_POWER) || defined(__PPC__) || \
117 defined(__PPC64__) || defined(__ppc64__) || defined(__powerpc64__)
118 # define INSTRUCTION_POINTER_IMPLEMENTED
120 __asm __volatile ( "mfspr %1,8\n\t" /* save lr */
122 "mfspr %0,8\n\t" /* mflr ret */
123 "mtspr 8,%1" /* restore lr */
124 : "=r"(ret),"=r"(scratch) );
125 # elif defined(__s390__) || defined(__s390x__)
126 # define INSTRUCTION_POINTER_IMPLEMENTED
127 __asm __volatile ( "bras %0,1f\n1:" : "=r"(ret) );
128 ret = (void *)((size_t)ret&~3UL);
129 # elif defined(__sparc) || defined(__sparc__) || defined(__sparcv9)
130 # define INSTRUCTION_POINTER_IMPLEMENTED
132 __asm __volatile ( "mov %%o7,%1\n\t"
136 : "=r"(ret),"=r"(scratch) );
137 # elif defined(__x86_64) || defined(__x86_64__)
138 # define INSTRUCTION_POINTER_IMPLEMENTED
139 __asm __volatile ( "leaq 0(%%rip),%0" : "=r"(ret) );
140 ret = (void *)((size_t)ret&~3UL); /* align for better performance */
141 # elif defined(__arm) || defined(__arm__)
142 # define INSTRUCTION_POINTER_IMPLEMENTED
143 __asm __volatile ( "sub %0,pc,#8" : "=r"(ret) );
145 #elif defined(__DECC) && defined(__alpha)
146 # define INSTRUCTION_POINTER_IMPLEMENTED
147 ret = (void *)(size_t)asm("br %v0,1f\n1:");
148 #elif defined(_MSC_VER) && defined(_M_IX86)
149 # define INSTRUCTION_POINTER_IMPLEMENTED
156 ret = (void *)((size_t)scratch&~3UL);
162 * This function returns pointer to an instruction in the vicinity of
163 * its entry point, but not outside this object module. This guarantees
164 * that sequestered code is covered...
166 const void *FIPS_ref_point()
168 #if defined(FIPS_REF_POINT_IS_CROSS_COMPILER_AWARE)
169 return (void *)instruction_pointer;
170 #elif defined(INSTRUCTION_POINTER_IMPLEMENTED)
171 return instruction_pointer();
172 /* Below we essentially cover vendor compilers which do not support
173 * inline assembler... */
175 struct { void *ip,*gp,*env; } *p = (void *)instruction_pointer;
177 #elif defined(_HPUX_SOURCE)
178 # if defined(__hppa) || defined(__hppa__)
179 struct { void *i[4]; } *p = (void *)FIPS_ref_point;
181 if (sizeof(p) == 8) /* 64-bit */
183 else if ((size_t)p & 2)
184 { p = (void *)((size_t)p&~3UL);
189 # elif defined(__ia64) || defined(__ia64__)
190 struct { unsigned long long ip,gp; } *p=(void *)instruction_pointer;
191 return (void *)(size_t)p->ip;
193 #elif (defined(__VMS) || defined(VMS)) && !(defined(vax) || defined(__vax__))
194 /* applies to both alpha and ia64 */
195 struct { unsigned __int64 opaque,ip; } *p=(void *)instruction_pointer;
196 return (void *)(size_t)p->ip;
197 #elif defined(__VOS__)
198 /* applies to both pa-risc and ia32 */
199 struct { void *dp,*ip,*gp; } *p = (void *)instruction_pointer;
201 #elif defined(_WIN32)
202 # if defined(_WIN64) && defined(_M_IA64)
203 struct { void *ip,*gp; } *p = (void *)FIPS_ref_point;
206 return (void *)FIPS_ref_point;
209 * In case you wonder why there is no #ifdef __linux. All Linux targets
210 * are GCC-based and therefore are covered by instruction_pointer above
211 * [well, some are covered by by the one below]...
213 #elif defined(POINTER_TO_FUNCTION_IS_POINTER_TO_1ST_INSTRUCTION)
214 return (void *)instruction_pointer;