3 # ====================================================================
4 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
5 # project. Rights for redistribution and usage in source and binary
6 # forms are granted according to the OpenSSL license.
7 # ====================================================================
9 # sha256/512_block procedure for x86_64.
11 # 40% improvement over compiler-generated code on Opteron. On EM64T
12 # sha256 was observed to run >80% faster and sha512 - >40%. No magical
13 # tricks, just straight implementation... I really wonder why gcc
14 # [being armed with inline assembler] fails to generate as fast code.
15 # The only thing which is cool about this module is that it's very
16 # same instruction sequence used for both SHA-256 and SHA-512. In
17 # former case the instructions operate on 32-bit operands, while in
18 # latter - on 64-bit ones. All I had to do is to get one flavor right,
19 # the other one passed the test right away:-)
21 # sha256_block runs in ~1005 cycles on Opteron, which gives you
22 # asymptotic performance of 64*1000/1005=63.7MBps times CPU clock
23 # frequency in GHz. sha512_block runs in ~1275 cycles, which results
24 # in 128*1000/1275=100MBps per GHz. Is there room for improvement?
25 # Well, if you compare it to IA-64 implementation, which maintains
26 # X[16] in register bank[!], tends to 4 instructions per CPU clock
27 # cycle and runs in 1003 cycles, 1275 is very good result for 3-way
28 # issue Opteron pipeline and X[16] maintained in memory. So that *if*
29 # there is a way to improve it, *then* the only way would be to try to
30 # offload X[16] updates to SSE unit, but that would require "deeper"
31 # loop unroll, which in turn would naturally cause size blow-up, not
32 # to mention increased complexity! And once again, only *if* it's
33 # actually possible to noticeably improve overall ILP, instruction
34 # level parallelism, on a given CPU implementation in this case.
36 # Special note on Intel EM64T. While Opteron CPU exhibits perfect
37 # perfromance ratio of 1.5 between 64- and 32-bit flavors [see above],
38 # [currently available] EM64T CPUs apparently are far from it. On the
39 # contrary, 64-bit version, sha512_block, is ~30% *slower* than 32-bit
40 # sha256_block:-( This is presumably because 64-bit shifts/rotates
41 # apparently are not atomic instructions, but implemented in microcode.
45 # Optimization including one of Pavel Semjanov's ideas, alternative
46 # Maj, resulted in >=5% improvement on most CPUs, 20% on P4.
50 if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
52 $win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
54 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
55 ( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
56 ( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
57 die "can't locate x86_64-xlate.pl";
59 open STDOUT,"| $^X $xlate $flavour $output";
61 if ($output =~ /512/) {
62 $func="sha512_block_data_order";
65 @ROT=($A,$B,$C,$D,$E,$F,$G,$H)=("%rax","%rbx","%rcx","%rdx",
66 "%r8", "%r9", "%r10","%r11");
67 ($T1,$a0,$a1,$a2,$a3)=("%r12","%r13","%r14","%r15","%rdi");
74 $func="sha256_block_data_order";
77 @ROT=($A,$B,$C,$D,$E,$F,$G,$H)=("%eax","%ebx","%ecx","%edx",
78 "%r8d","%r9d","%r10d","%r11d");
79 ($T1,$a0,$a1,$a2,$a3)=("%r12d","%r13d","%r14d","%r15d","%edi");
87 $ctx="%rdi"; # 1st arg, zapped by $a3
88 $inp="%rsi"; # 2nd arg
91 $_ctx="16*$SZ+0*8(%rsp)";
92 $_inp="16*$SZ+1*8(%rsp)";
93 $_end="16*$SZ+2*8(%rsp)";
94 $_rsp="16*$SZ+3*8(%rsp)";
95 $framesz="16*$SZ+4*8";
99 { my ($i,$a,$b,$c,$d,$e,$f,$g,$h) = @_;
102 ror \$`$Sigma1[2]-$Sigma1[1]`,$a0
105 ror \$`$Sigma0[2]-$Sigma0[1]`,$a1
109 mov $T1,`$SZ*($i&0xf)`(%rsp)
113 ror \$`$Sigma1[1]-$Sigma1[0]`,$a0
115 xor $g,$a2 # Ch(e,f,g)=((f^g)&e)^g
117 ror \$`$Sigma0[1]-$Sigma0[0]`,$a1
119 add $a2,$T1 # T1+=Ch(e,f,g)
122 add ($Tbl),$T1 # T1+=K[round]
125 ror \$$Sigma1[0],$a0 # Sigma1(e)
126 xor $b,$a2 # a^b, b^c in next round
129 ror \$$Sigma0[0],$a1 # Sigma0(a)
131 add $a0,$T1 # T1+=Sigma1(e)
133 xor $a3,$h # h=Maj(a,b,c)=Ch(a^b,c,b)
137 $code.=<<___ if ($i>=15);
138 mov `$SZ*(($i+2)&0xf)`(%rsp),$a0
141 lea $SZ($Tbl),$Tbl # round++
142 add $a1,$h # h+=Sigma0(a)
145 ($a2,$a3) = ($a3,$a2);
149 { my ($i,$a,$b,$c,$d,$e,$f,$g,$h) = @_;
152 #mov `$SZ*(($i+1)&0xf)`(%rsp),$a0
153 mov `$SZ*(($i+14)&0xf)`(%rsp),$a1
156 ror \$`$sigma0[1]-$sigma0[0]`,$a0
158 ror \$`$sigma1[1]-$sigma1[0]`,$a1
166 xor $a0,$T1 # sigma0(X[(i+1)&0xf])
168 add `$SZ*(($i+9)&0xf)`(%rsp),$T1
169 xor $a2,$a1 # sigma1(X[(i+14)&0xf])
171 add `$SZ*($i&0xf)`(%rsp),$T1
183 .type $func,\@function,4
192 mov %rsp,%r11 # copy %rsp
193 shl \$4,%rdx # num*16
195 lea ($inp,%rdx,$SZ),%rdx # inp+num*16*$SZ
196 and \$-64,%rsp # align stack frame
197 mov $ctx,$_ctx # save ctx, 1st arg
198 mov $inp,$_inp # save inp, 2nd arh
199 mov %rdx,$_end # save end pointer, "3rd" arg
200 mov %r11,$_rsp # save copy of %rsp
216 lea $TABLE(%rip),$Tbl
219 for($i=0;$i<16;$i++) {
220 $code.=" mov $SZ*$i($inp),$T1\n";
221 $code.=" mov @ROT[4],$a0\n";
222 $code.=" mov @ROT[0],$a1\n";
223 $code.=" bswap $T1\n";
224 &ROUND_00_15($i,@ROT);
225 unshift(@ROT,pop(@ROT));
233 &ROUND_16_XX($i,@ROT);
234 unshift(@ROT,pop(@ROT));
242 lea 16*$SZ($inp),$inp
281 .type $TABLE,\@object
283 .long 0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5
284 .long 0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5
285 .long 0xd807aa98,0x12835b01,0x243185be,0x550c7dc3
286 .long 0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174
287 .long 0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc
288 .long 0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da
289 .long 0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7
290 .long 0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967
291 .long 0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13
292 .long 0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85
293 .long 0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3
294 .long 0xd192e819,0xd6990624,0xf40e3585,0x106aa070
295 .long 0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5
296 .long 0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3
297 .long 0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208
298 .long 0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2
300 .asciz "SHA256 block transform for x86_64, CRYPTOGAMS by <appro\@openssl.org>"
305 .type $TABLE,\@object
307 .quad 0x428a2f98d728ae22,0x7137449123ef65cd
308 .quad 0xb5c0fbcfec4d3b2f,0xe9b5dba58189dbbc
309 .quad 0x3956c25bf348b538,0x59f111f1b605d019
310 .quad 0x923f82a4af194f9b,0xab1c5ed5da6d8118
311 .quad 0xd807aa98a3030242,0x12835b0145706fbe
312 .quad 0x243185be4ee4b28c,0x550c7dc3d5ffb4e2
313 .quad 0x72be5d74f27b896f,0x80deb1fe3b1696b1
314 .quad 0x9bdc06a725c71235,0xc19bf174cf692694
315 .quad 0xe49b69c19ef14ad2,0xefbe4786384f25e3
316 .quad 0x0fc19dc68b8cd5b5,0x240ca1cc77ac9c65
317 .quad 0x2de92c6f592b0275,0x4a7484aa6ea6e483
318 .quad 0x5cb0a9dcbd41fbd4,0x76f988da831153b5
319 .quad 0x983e5152ee66dfab,0xa831c66d2db43210
320 .quad 0xb00327c898fb213f,0xbf597fc7beef0ee4
321 .quad 0xc6e00bf33da88fc2,0xd5a79147930aa725
322 .quad 0x06ca6351e003826f,0x142929670a0e6e70
323 .quad 0x27b70a8546d22ffc,0x2e1b21385c26c926
324 .quad 0x4d2c6dfc5ac42aed,0x53380d139d95b3df
325 .quad 0x650a73548baf63de,0x766a0abb3c77b2a8
326 .quad 0x81c2c92e47edaee6,0x92722c851482353b
327 .quad 0xa2bfe8a14cf10364,0xa81a664bbc423001
328 .quad 0xc24b8b70d0f89791,0xc76c51a30654be30
329 .quad 0xd192e819d6ef5218,0xd69906245565a910
330 .quad 0xf40e35855771202a,0x106aa07032bbd1b8
331 .quad 0x19a4c116b8d2d0c8,0x1e376c085141ab53
332 .quad 0x2748774cdf8eeb99,0x34b0bcb5e19b48a8
333 .quad 0x391c0cb3c5c95a63,0x4ed8aa4ae3418acb
334 .quad 0x5b9cca4f7763e373,0x682e6ff3d6b2b8a3
335 .quad 0x748f82ee5defb2fc,0x78a5636f43172f60
336 .quad 0x84c87814a1f0ab72,0x8cc702081a6439ec
337 .quad 0x90befffa23631e28,0xa4506cebde82bde9
338 .quad 0xbef9a3f7b2c67915,0xc67178f2e372532b
339 .quad 0xca273eceea26619c,0xd186b8c721c0c207
340 .quad 0xeada7dd6cde0eb1e,0xf57d4f7fee6ed178
341 .quad 0x06f067aa72176fba,0x0a637dc5a2c898a6
342 .quad 0x113f9804bef90dae,0x1b710b35131c471b
343 .quad 0x28db77f523047d84,0x32caab7b40c72493
344 .quad 0x3c9ebe0a15c9bebc,0x431d67c49c100d4c
345 .quad 0x4cc5d4becb3e42b6,0x597f299cfc657e2a
346 .quad 0x5fcb6fab3ad6faec,0x6c44198c4a475817
348 .asciz "SHA512 block transfort for x86_64, CRYPTOGAMS by <appro\@openssl.org>
352 # EXCEPTION_DISPOSITION handler (EXCEPTION_RECORD *rec,ULONG64 frame,
353 # CONTEXT *context,DISPATCHER_CONTEXT *disp)
361 .extern __imp_RtlVirtualUnwind
362 .type se_handler,\@abi-omnipotent
376 mov 120($context),%rax # pull context->Rax
377 mov 248($context),%rbx # pull context->Rip
379 lea .Lprologue(%rip),%r10
380 cmp %r10,%rbx # context->Rip<.Lprologue
383 mov 152($context),%rax # pull context->Rsp
385 lea .Lepilogue(%rip),%r10
386 cmp %r10,%rbx # context->Rip>=.Lepilogue
389 mov 16*$SZ+3*8(%rax),%rax # pull $_rsp
398 mov %rbx,144($context) # restore context->Rbx
399 mov %rbp,160($context) # restore context->Rbp
400 mov %r12,216($context) # restore context->R12
401 mov %r13,224($context) # restore context->R13
402 mov %r14,232($context) # restore context->R14
403 mov %r15,240($context) # restore context->R15
408 mov %rax,152($context) # restore context->Rsp
409 mov %rsi,168($context) # restore context->Rsi
410 mov %rdi,176($context) # restore context->Rdi
412 mov 40($disp),%rdi # disp->ContextRecord
413 mov $context,%rsi # context
414 mov \$154,%ecx # sizeof(CONTEXT)
415 .long 0xa548f3fc # cld; rep movsq
418 xor %rcx,%rcx # arg1, UNW_FLAG_NHANDLER
419 mov 8(%rsi),%rdx # arg2, disp->ImageBase
420 mov 0(%rsi),%r8 # arg3, disp->ControlPc
421 mov 16(%rsi),%r9 # arg4, disp->FunctionEntry
422 mov 40(%rsi),%r10 # disp->ContextRecord
423 lea 56(%rsi),%r11 # &disp->HandlerData
424 lea 24(%rsi),%r12 # &disp->EstablisherFrame
425 mov %r10,32(%rsp) # arg5
426 mov %r11,40(%rsp) # arg6
427 mov %r12,48(%rsp) # arg7
428 mov %rcx,56(%rsp) # arg8, (NULL)
429 call *__imp_RtlVirtualUnwind(%rip)
431 mov \$1,%eax # ExceptionContinueSearch
443 .size se_handler,.-se_handler
447 .rva .LSEH_begin_$func
449 .rva .LSEH_info_$func
459 $code =~ s/\`([^\`]*)\`/eval $1/gem;