crypto/sha/asm/sha512-ia64.pl

   1 #!/usr/bin/env perl
   2 #
   3 # ====================================================================
   4 # Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
   5 # project. Rights for redistribution and usage in source and binary
   6 # forms are granted according to the OpenSSL license.
   7 # ====================================================================
   8 #
   9 # SHA256/512_Transform for Itanium.
  10 #
  11 # sha512_block runs in 1003 cycles on Itanium 2, which is almost 50%
  12 # faster than gcc and >60%(!) faster than code generated by HP-UX
  13 # compiler (yes, HP-UX is generating slower code, because unlike gcc,
  14 # it failed to deploy "shift right pair," 'shrp' instruction, which
  15 # substitutes for 64-bit rotate).
  16 #
  17 # 924 cycles long sha256_block outperforms gcc by over factor of 2(!)
  18 # and HP-UX compiler - by >40% (yes, gcc won sha512_block, but lost
  19 # this one big time). Note that "formally" 924 is about 100 cycles
  20 # too much. I mean it's 64 32-bit rounds vs. 80 virtually identical
  21 # 64-bit ones and 1003*64/80 gives 802. Extra cycles, 2 per round,
  22 # are spent on extra work to provide for 32-bit rotations. 32-bit
  23 # rotations are still handled by 'shrp' instruction and for this
  24 # reason lower 32 bits are deposited to upper half of 64-bit register
  25 # prior 'shrp' issue. And in order to minimize the amount of such
  26 # operations, X[16] values are *maintained* with copies of lower
  27 # halves in upper halves, which is why you'll spot such instructions
  28 # as custom 'mux2', "parallel 32-bit add," 'padd4' and "parallel
  29 # 32-bit unsigned right shift," 'pshr4.u' instructions here.
  30 #
  31 # Rules of engagement.
  32 #
  33 # There is only one integer shifter meaning that if I have two rotate,
  34 # deposit or extract instructions in adjacent bundles, they shall
  35 # split [at run-time if they have to]. But note that variable and
  36 # parallel shifts are performed by multi-media ALU and *are* pairable
  37 # with rotates [and alike]. On the backside MMALU is rather slow: it
  38 # takes 2 extra cycles before the result of integer operation is
  39 # available *to* MMALU and 2(*) extra cycles before the result of MM
  40 # operation is available "back" *to* integer ALU, not to mention that
  41 # MMALU itself has 2 cycles latency. However! I explicitly scheduled
  42 # these MM instructions to avoid MM stalls, so that all these extra
  43 # latencies get "hidden" in instruction-level parallelism.
  44 #
  45 # (*) 2 cycles on Itanium 1 and 1 cycle on Itanium 2. But I schedule
  46 #     for 2 in order to provide for best *overall* performance,
  47 #     because on Itanium 1 stall on MM result is accompanied by
  48 #     pipeline flush, which takes 6 cycles:-(
  49 #
  50 # Resulting performance numbers for 900MHz Itanium 2 system:
  51 #
  52 # The 'numbers' are in 1000s of bytes per second processed.
  53 # type     16 bytes    64 bytes   256 bytes  1024 bytes  8192 bytes
  54 # sha1(*)   6210.14k   20376.30k   52447.83k   85870.05k  105478.12k
  55 # sha256    7476.45k   20572.05k   41538.34k   56062.29k   62093.18k
  56 # sha512    4996.56k   20026.28k   47597.20k   85278.79k  111501.31k
  57 #
  58 # (*) SHA1 numbers are for HP-UX compiler and are presented purely
  59 #     for reference purposes. I bet it can improved too...
  60 #
  61 # To generate code, pass the file name with either 256 or 512 in its
  62 # name and compiler flags.
  63
  64 $output=shift;
  65
  66 if ($output =~ /512.*\.[s|asm]/) {
  67         $SZ=8;
  68         $BITS=8*$SZ;
  69         $LDW="ld8";
  70         $STW="st8";
  71         $ADD="add";
  72         $SHRU="shr.u";
  73         $TABLE="K512";
  74         $func="sha512_block";
  75         @Sigma0=(28,34,39);
  76         @Sigma1=(14,18,41);
  77         @sigma0=(1,  8, 7);
  78         @sigma1=(19,61, 6);
  79         $rounds=80;
  80 } elsif ($output =~ /256.*\.[s|asm]/) {
  81         $SZ=4;
  82         $BITS=8*$SZ;
  83         $LDW="ld4";
  84         $STW="st4";
  85         $ADD="padd4";
  86         $SHRU="pshr4.u";
  87         $TABLE="K256";
  88         $func="sha256_block";
  89         @Sigma0=( 2,13,22);
  90         @Sigma1=( 6,11,25);
  91         @sigma0=( 7,18, 3);
  92         @sigma1=(17,19,10);
  93         $rounds=64;
  94 } else { die "nonsense $output"; }
  95
  96 open STDOUT,">$output" || die "can't open $output: $!";
  97
  98 if ($^O eq "hpux") {
  99     $ADDP="addp4";
 100     for (@ARGV) { $ADDP="add" if (/[\+DD|\-mlp]64/); }
 101 } else { $ADDP="add"; }
 102 for (@ARGV)  {  $big_endian=1 if (/\-DB_ENDIAN/);
 103                 $big_endian=0 if (/\-DL_ENDIAN/);  }
 104 if (!defined($big_endian))
 105              {  $big_endian=(unpack('L',pack('N',1))==1);  }
 106
 107 $code=<<___;
 108 .ident  \"$output, version 1.0\"
 109 .ident  \"IA-64 ISA artwork by Andy Polyakov <appro\@fy.chalmers.se>\"
 110 .explicit
 111 .text
 112
 113 prsave=r14;
 114 K=r15;
 115 A=r16;  B=r17;  C=r18;  D=r19;
 116 E=r20;  F=r21;  G=r22;  H=r23;
 117 T1=r24; T2=r25;
 118 s0=r26; s1=r27; t0=r28; t1=r29;
 119 Ktbl=r30;
 120 ctx=r31;        // 1st arg
 121 input=r48;      // 2nd arg
 122 num=r49;        // 3rd arg
 123 sgm0=r50;       sgm1=r51;       // small constants
 124
 125 // void $func (SHA_CTX *ctx, const void *in,size_t num[,int host])
 126 .global $func#
 127 .proc   $func#
 128 .align  32
 129 $func:
 130         .prologue
 131         .save   ar.pfs,r2
 132 { .mmi; alloc   r2=ar.pfs,3,17,0,16
 133         $ADDP   ctx=0,r32               // 1st arg
 134         .save   ar.lc,r3
 135         mov     r3=ar.lc        }
 136 { .mmi; $ADDP   input=0,r33             // 2nd arg
 137         addl    Ktbl=\@ltoff($TABLE#),gp
 138         .save   pr,prsave
 139         mov     prsave=pr       };;
 140
 141         .body
 142 { .mii; ld8     Ktbl=[Ktbl]
 143         mov     num=r34         };;     // 3rd arg
 144
 145 { .mib; add     r8=0*$SZ,ctx
 146         add     r9=1*$SZ,ctx
 147         brp.loop.imp    .L_first16,.L_first16_ctop
 148                                 }
 149 { .mib; add     r10=2*$SZ,ctx
 150         add     r11=3*$SZ,ctx
 151         brp.loop.imp    .L_rest,.L_rest_ctop
 152                                 };;
 153 // load A-H
 154 { .mmi; $LDW    A=[r8],4*$SZ
 155         $LDW    B=[r9],4*$SZ
 156         mov     sgm0=$sigma0[2] }
 157 { .mmi; $LDW    C=[r10],4*$SZ
 158         $LDW    D=[r11],4*$SZ
 159         mov     sgm1=$sigma1[2] };;
 160 { .mmi; $LDW    E=[r8]
 161         $LDW    F=[r9]          }
 162 { .mmi; $LDW    G=[r10]
 163         $LDW    H=[r11]
 164         cmp.ne  p15,p14=0,r35   };;     // used in sha256_block
 165
 166 .L_outer:
 167 { .mii; mov     ar.lc=15
 168         mov     ar.ec=1         };;
 169 .align  32
 170 .L_first16:
 171 .rotr   X[16]
 172 ___
 173 $t0="t0", $t1="t1", $code.=<<___ if ($BITS==32);
 174 { .mib; (p14)   add     r9=1,input
 175         (p14)   add     r10=2,input     }
 176 { .mib; (p14)   add     r11=3,input
 177         (p15)   br.dptk.few     .L_host };;
 178 { .mmi; (p14)   ld1     r8=[input],$SZ
 179         (p14)   ld1     r9=[r9]         }
 180 { .mmi; (p14)   ld1     r10=[r10]
 181         (p14)   ld1     r11=[r11]       };;
 182 { .mii; (p14)   dep     r9=r8,r9,8,8
 183         (p14)   dep     r11=r10,r11,8,8 };;
 184 { .mib; (p14)   dep     X[15]=r9,r11,16,16 };;
 185 .L_host:
 186 { .mib; (p15)   $LDW    X[15]=[input],$SZ       // X[i]=*input++
 187                 dep.z   $t1=E,32,32     }
 188 { .mib;         $LDW    K=[Ktbl],$SZ
 189                 zxt4    E=E             };;
 190 { .mmi;         or      $t1=$t1,E
 191                 and     T1=F,E
 192                 and     T2=A,B          }
 193 { .mmi;         andcm   r8=G,E
 194                 and     r9=A,C
 195                 mux2    $t0=A,0x44      };;     // copy lower half to upper
 196 { .mib;         xor     T1=T1,r8                // T1=((e & f) ^ (~e & g))
 197                 _rotr   r11=$t1,$Sigma1[0] }    // ROTR(e,14)
 198 { .mib;         and     r10=B,C
 199                 xor     T2=T2,r9        };;
 200 ___
 201 $t0="A", $t1="E", $code.=<<___ if ($BITS==64);
 202 { .mmi;         $LDW    X[15]=[input],$SZ       // X[i]=*input++
 203                 and     T1=F,E
 204                 and     T2=A,B          }
 205 { .mmi;         $LDW    K=[Ktbl],$SZ
 206                 andcm   r8=G,E
 207                 and     r9=A,C          };;
 208 { .mmi;         xor     T1=T1,r8                //T1=((e & f) ^ (~e & g))
 209                 and     r10=B,C
 210                 _rotr   r11=$t1,$Sigma1[0] }    // ROTR(e,14)
 211 { .mmi;         xor     T2=T2,r9
 212                 mux1    X[15]=X[15],\@rev };;   // eliminated in big-endian
 213 ___
 214 $code.=<<___;
 215 { .mib;         add     T1=T1,H                 // T1=Ch(e,f,g)+h
 216                 _rotr   r8=$t1,$Sigma1[1] }     // ROTR(e,18)
 217 { .mib;         xor     T2=T2,r10               // T2=((a & b) ^ (a & c) ^ (b & c))
 218                 mov     H=G             };;
 219 { .mib;         xor     r11=r8,r11
 220                 _rotr   r9=$t1,$Sigma1[2] }     // ROTR(e,41)
 221 { .mib;         mov     G=F
 222                 mov     F=E             };;
 223 { .mib;         xor     r9=r9,r11               // r9=Sigma1(e)
 224                 _rotr   r10=$t0,$Sigma0[0] }    // ROTR(a,28)
 225 { .mib;         add     T1=T1,K                 // T1=Ch(e,f,g)+h+K512[i]
 226                 mov     E=D             };;
 227 { .mib;         add     T1=T1,r9                // T1+=Sigma1(e)
 228                 _rotr   r11=$t0,$Sigma0[1] }    // ROTR(a,34)
 229 { .mib;         mov     D=C
 230                 mov     C=B             };;
 231 { .mib;         add     T1=T1,X[15]             // T1+=X[i]
 232                 _rotr   r8=$t0,$Sigma0[2] }     // ROTR(a,39)
 233 { .mib;         xor     r10=r10,r11
 234                 mux2    X[15]=X[15],0x44 };;    // eliminated in 64-bit
 235 { .mmi;         xor     r10=r8,r10              // r10=Sigma0(a)
 236                 mov     B=A
 237                 add     A=T1,T2         };;
 238 .L_first16_ctop:
 239 { .mib;         add     E=E,T1
 240                 add     A=A,r10                 // T2=Maj(a,b,c)+Sigma0(a)
 241         br.ctop.sptk    .L_first16      };;
 242
 243 { .mib; mov     ar.lc=$rounds-17        }
 244 { .mib; mov     ar.ec=1                 };;
 245 .align  32
 246 .L_rest:
 247 .rotr   X[16]
 248 { .mib;         $LDW    K=[Ktbl],$SZ
 249                 _rotr   r8=X[15-1],$sigma0[0] } // ROTR(s0,1)
 250 { .mib;         $ADD    X[15]=X[15],X[15-9]     // X[i&0xF]+=X[(i+9)&0xF]
 251                 $SHRU   s0=X[15-1],sgm0 };;     // s0=X[(i+1)&0xF]>>7
 252 { .mib;         and     T1=F,E
 253                 _rotr   r9=X[15-1],$sigma0[1] } // ROTR(s0,8)
 254 { .mib;         andcm   r10=G,E
 255                 $SHRU   s1=X[15-14],sgm1 };;    // s1=X[(i+14)&0xF]>>6
 256 { .mmi;         xor     T1=T1,r10               // T1=((e & f) ^ (~e & g))
 257                 xor     r9=r8,r9
 258                 _rotr   r10=X[15-14],$sigma1[0] };;// ROTR(s1,19)
 259 { .mib;         and     T2=A,B
 260                 _rotr   r11=X[15-14],$sigma1[1] }// ROTR(s1,61)
 261 { .mib;         and     r8=A,C          };;
 262 ___
 263 $t0="t0", $t1="t1", $code.=<<___ if ($BITS==32);
 264 // I adhere to mmi; in order to hold Itanium 1 back and avoid 6 cycle
 265 // pipeline flush in last bundle. Note that even on Itanium2 the
 266 // latter stalls for one clock cycle...
 267 { .mmi;         xor     s0=s0,r9                // s0=sigma0(X[(i+1)&0xF])
 268                 dep.z   $t1=E,32,32     }
 269 { .mmi;         xor     r10=r11,r10
 270                 zxt4    E=E             };;
 271 { .mmi;         or      $t1=$t1,E
 272                 xor     s1=s1,r10               // s1=sigma1(X[(i+14)&0xF])
 273                 mux2    $t0=A,0x44      };;     // copy lower half to upper
 274 { .mmi;         xor     T2=T2,r8
 275                 _rotr   r9=$t1,$Sigma1[0] }     // ROTR(e,14)
 276 { .mmi;         and     r10=B,C
 277                 add     T1=T1,H                 // T1=Ch(e,f,g)+h
 278                 $ADD    X[15]=X[15],s0  };;     // X[i&0xF]+=sigma0(X[(i+1)&0xF])
 279 ___
 280 $t0="A", $t1="E", $code.=<<___ if ($BITS==64);
 281 { .mib;         xor     s0=s0,r9                // s0=sigma0(X[(i+1)&0xF])
 282                 _rotr   r9=$t1,$Sigma1[0] }     // ROTR(e,14)
 283 { .mib;         xor     r10=r11,r10
 284                 xor     T2=T2,r8        };;
 285 { .mib;         xor     s1=s1,r10               // s1=sigma1(X[(i+14)&0xF])
 286                 add     T1=T1,H         }
 287 { .mib;         and     r10=B,C
 288                 $ADD    X[15]=X[15],s0  };;     // X[i&0xF]+=sigma0(X[(i+1)&0xF])
 289 ___
 290 $code.=<<___;
 291 { .mmi;         xor     T2=T2,r10               // T2=((a & b) ^ (a & c) ^ (b & c))
 292                 mov     H=G
 293                 _rotr   r8=$t1,$Sigma1[1] };;   // ROTR(e,18)
 294 { .mmi;         xor     r11=r8,r9
 295                 $ADD    X[15]=X[15],s1          // X[i&0xF]+=sigma1(X[(i+14)&0xF])
 296                 _rotr   r9=$t1,$Sigma1[2] }     // ROTR(e,41)
 297 { .mmi;         mov     G=F
 298                 mov     F=E             };;
 299 { .mib;         xor     r9=r9,r11               // r9=Sigma1(e)
 300                 _rotr   r10=$t0,$Sigma0[0] }    // ROTR(a,28)
 301 { .mib;         add     T1=T1,K                 // T1=Ch(e,f,g)+h+K512[i]
 302                 mov     E=D             };;
 303 { .mib;         add     T1=T1,r9                // T1+=Sigma1(e)
 304                 _rotr   r11=$t0,$Sigma0[1] }    // ROTR(a,34)
 305 { .mib;         mov     D=C
 306                 mov     C=B             };;
 307 { .mmi;         add     T1=T1,X[15]             // T1+=X[i]
 308                 xor     r10=r10,r11
 309                 _rotr   r8=$t0,$Sigma0[2] };;   // ROTR(a,39)
 310 { .mmi;         xor     r10=r8,r10              // r10=Sigma0(a)
 311                 mov     B=A
 312                 add     A=T1,T2         };;
 313 .L_rest_ctop:
 314 { .mib;         add     E=E,T1
 315                 add     A=A,r10                 // T2=Maj(a,b,c)+Sigma0(a)
 316         br.ctop.sptk    .L_rest };;
 317
 318 { .mib; add     r8=0*$SZ,ctx
 319         add     r9=1*$SZ,ctx            }
 320 { .mib; add     r10=2*$SZ,ctx
 321         add     r11=3*$SZ,ctx           };;
 322 { .mmi; $LDW    r32=[r8],4*$SZ
 323         $LDW    r33=[r9],4*$SZ          }
 324 { .mmi; $LDW    r34=[r10],4*$SZ
 325         $LDW    r35=[r11],4*$SZ
 326         cmp.ltu p6,p7=1,num             };;
 327 { .mmi; $LDW    r36=[r8],-4*$SZ
 328         $LDW    r37=[r9],-4*$SZ
 329 (p6)    add     Ktbl=-$SZ*$rounds,Ktbl  }
 330 { .mmi; $LDW    r38=[r10],-4*$SZ
 331         $LDW    r39=[r11],-4*$SZ
 332 (p7)    mov     ar.lc=r3                };;
 333 { .mmi; add     A=A,r32
 334         add     B=B,r33
 335         add     C=C,r34                 }
 336 { .mmi; add     D=D,r35
 337         add     E=E,r36
 338         add     F=F,r37                 };;
 339 { .mmi; $STW    [r8]=A,4*$SZ
 340         $STW    [r9]=B,4*$SZ
 341         add     G=G,r38                 }
 342 { .mmi; $STW    [r10]=C,4*$SZ
 343         $STW    [r11]=D,4*$SZ
 344         add     H=H,r39                 };;
 345 { .mmi; $STW    [r8]=E
 346         $STW    [r9]=F
 347 (p6)    add     num=-1,num              }
 348 { .mmb; $STW    [r10]=G
 349         $STW    [r11]=H
 350 (p6)    br.dptk.many    .L_outer        };;
 351
 352 { .mib; mov     pr=prsave,0x1ffff
 353         br.ret.sptk.many        b0      };;
 354 .endp   $func#
 355 ___
 356
 357 $code =~ s/\`([^\`]*)\`/eval $1/gem;
 358 $code =~ s/_rotr(\s+)([^=]+)=([^,]+),([0-9]+)/shrp$1$2=$3,$3,$4/gm;
 359 if ($BITS==64) {
 360     $code =~ s/mux2(\s+)\S+/nop.i$1 0x0/gm;
 361     $code =~ s/mux1(\s+)\S+/nop.i$1 0x0/gm if ($big_endian);
 362 }
 363
 364 print $code;
 365
 366 print<<___ if ($BITS==32);
 367 .align  64
 368 .type   K256#,\@object
 369 K256:   data4   0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5
 370         data4   0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5
 371         data4   0xd807aa98,0x12835b01,0x243185be,0x550c7dc3
 372         data4   0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174
 373         data4   0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc
 374         data4   0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da
 375         data4   0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7
 376         data4   0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967
 377         data4   0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13
 378         data4   0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85
 379         data4   0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3
 380         data4   0xd192e819,0xd6990624,0xf40e3585,0x106aa070
 381         data4   0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5
 382         data4   0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3
 383         data4   0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208
 384         data4   0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2
 385 .size   K256#,$SZ*$rounds
 386 ___
 387 print<<___ if ($BITS==64);
 388 .align  64
 389 .type   K512#,\@object
 390 K512:   data8   0x428a2f98d728ae22,0x7137449123ef65cd
 391         data8   0xb5c0fbcfec4d3b2f,0xe9b5dba58189dbbc
 392         data8   0x3956c25bf348b538,0x59f111f1b605d019
 393         data8   0x923f82a4af194f9b,0xab1c5ed5da6d8118
 394         data8   0xd807aa98a3030242,0x12835b0145706fbe
 395         data8   0x243185be4ee4b28c,0x550c7dc3d5ffb4e2
 396         data8   0x72be5d74f27b896f,0x80deb1fe3b1696b1
 397         data8   0x9bdc06a725c71235,0xc19bf174cf692694
 398         data8   0xe49b69c19ef14ad2,0xefbe4786384f25e3
 399         data8   0x0fc19dc68b8cd5b5,0x240ca1cc77ac9c65
 400         data8   0x2de92c6f592b0275,0x4a7484aa6ea6e483
 401         data8   0x5cb0a9dcbd41fbd4,0x76f988da831153b5
 402         data8   0x983e5152ee66dfab,0xa831c66d2db43210
 403         data8   0xb00327c898fb213f,0xbf597fc7beef0ee4
 404         data8   0xc6e00bf33da88fc2,0xd5a79147930aa725
 405         data8   0x06ca6351e003826f,0x142929670a0e6e70
 406         data8   0x27b70a8546d22ffc,0x2e1b21385c26c926
 407         data8   0x4d2c6dfc5ac42aed,0x53380d139d95b3df
 408         data8   0x650a73548baf63de,0x766a0abb3c77b2a8
 409         data8   0x81c2c92e47edaee6,0x92722c851482353b
 410         data8   0xa2bfe8a14cf10364,0xa81a664bbc423001
 411         data8   0xc24b8b70d0f89791,0xc76c51a30654be30
 412         data8   0xd192e819d6ef5218,0xd69906245565a910
 413         data8   0xf40e35855771202a,0x106aa07032bbd1b8
 414         data8   0x19a4c116b8d2d0c8,0x1e376c085141ab53
 415         data8   0x2748774cdf8eeb99,0x34b0bcb5e19b48a8
 416         data8   0x391c0cb3c5c95a63,0x4ed8aa4ae3418acb
 417         data8   0x5b9cca4f7763e373,0x682e6ff3d6b2b8a3
 418         data8   0x748f82ee5defb2fc,0x78a5636f43172f60
 419         data8   0x84c87814a1f0ab72,0x8cc702081a6439ec
 420         data8   0x90befffa23631e28,0xa4506cebde82bde9
 421         data8   0xbef9a3f7b2c67915,0xc67178f2e372532b
 422         data8   0xca273eceea26619c,0xd186b8c721c0c207
 423         data8   0xeada7dd6cde0eb1e,0xf57d4f7fee6ed178
 424         data8   0x06f067aa72176fba,0x0a637dc5a2c898a6
 425         data8   0x113f9804bef90dae,0x1b710b35131c471b
 426         data8   0x28db77f523047d84,0x32caab7b40c72493
 427         data8   0x3c9ebe0a15c9bebc,0x431d67c49c100d4c
 428         data8   0x4cc5d4becb3e42b6,0x597f299cfc657e2a
 429         data8   0x5fcb6fab3ad6faec,0x6c44198c4a475817
 430 .size   K512#,$SZ*$rounds
 431 ___