2 # Copyright 2014-2018 The OpenSSL Project Authors. All Rights Reserved.
4 # Licensed under the Apache License 2.0 (the "License"). You may not use
5 # this file except in compliance with the License. You can obtain a copy
6 # in the file LICENSE in the source distribution or at
7 # https://www.openssl.org/source/license.html
9 # ====================================================================
10 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
11 # project. The module is, however, dual licensed under OpenSSL and
12 # CRYPTOGAMS licenses depending on where you obtain it. For further
13 # details see http://www.openssl.org/~appro/cryptogams/.
15 # Permission to use under GPLv2 terms is granted.
16 # ====================================================================
18 # SHA256/512 for ARMv8.
20 # Performance in cycles per processed byte and improvement coefficient
21 # over code generated with "default" compiler:
23 # SHA256-hw SHA256(*) SHA512
24 # Apple A7 1.97 10.5 (+33%) 6.73 (-1%(**))
25 # Cortex-A53 2.38 15.5 (+115%) 10.0 (+150%(***))
26 # Cortex-A57 2.31 11.6 (+86%) 7.51 (+260%(***))
27 # Denver 2.01 10.5 (+26%) 6.70 (+8%)
28 # X-Gene 20.0 (+100%) 12.8 (+300%(***))
29 # Mongoose 2.36 13.0 (+50%) 8.36 (+33%)
30 # Kryo 1.92 17.4 (+30%) 11.2 (+8%)
32 # (*) Software SHA256 results are of lesser relevance, presented
33 # mostly for informational purposes.
34 # (**) The result is a trade-off: it's possible to improve it by
35 # 10% (or by 1 cycle per round), but at the cost of 20% loss
36 # on Cortex-A53 (or by 4 cycles per round).
37 # (***) Super-impressive coefficients over gcc-generated code are
38 # indication of some compiler "pathology", most notably code
39 # generated with -mgeneral-regs-only is significantly faster
40 # and the gap is only 40-90%.
44 # Originally it was reckoned that it makes no sense to implement NEON
45 # version of SHA256 for 64-bit processors. This is because performance
46 # improvement on most wide-spread Cortex-A5x processors was observed
47 # to be marginal, same on Cortex-A53 and ~10% on A57. But then it was
48 # observed that 32-bit NEON SHA256 performs significantly better than
49 # 64-bit scalar version on *some* of the more recent processors. As
50 # result 64-bit NEON version of SHA256 was added to provide best
51 # all-round performance. For example it executes ~30% faster on X-Gene
52 # and Mongoose. [For reference, NEON version of SHA512 is bound to
53 # deliver much less improvement, likely *negative* on Cortex-A5x.
54 # Which is why NEON support is limited to SHA256.]
59 if ($flavour && $flavour ne "void") {
60 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
61 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
62 ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or
63 die "can't locate arm-xlate.pl";
65 open OUT,"| \"$^X\" $xlate $flavour $output";
68 open STDOUT,">$output";
71 if ($output =~ /512/) {
91 $func="sha${BITS}_block_data_order";
93 ($ctx,$inp,$num,$Ktbl)=map("x$_",(0..2,30));
95 @X=map("$reg_t$_",(3..15,0..2));
96 @V=($A,$B,$C,$D,$E,$F,$G,$H)=map("$reg_t$_",(20..27));
97 ($t0,$t1,$t2,$t3)=map("$reg_t$_",(16,17,19,28));
100 my ($i,$a,$b,$c,$d,$e,$f,$g,$h)=@_;
102 my ($T0,$T1,$T2)=(@X[($i-8)&15],@X[($i-9)&15],@X[($i-10)&15]);
103 $T0=@X[$i+3] if ($i<11);
105 $code.=<<___ if ($i<16);
106 #ifndef __AARCH64EB__
107 rev @X[$i],@X[$i] // $i
110 $code.=<<___ if ($i<13 && ($i&1));
111 ldp @X[$i+1],@X[$i+2],[$inp],#2*$SZ
113 $code.=<<___ if ($i==13);
114 ldp @X[14],@X[15],[$inp]
116 $code.=<<___ if ($i>=14);
117 ldr @X[($i-11)&15],[sp,#`$SZ*(($i-11)%4)`]
119 $code.=<<___ if ($i>0 && $i<16);
120 add $a,$a,$t1 // h+=Sigma0(a)
122 $code.=<<___ if ($i>=11);
123 str @X[($i-8)&15],[sp,#`$SZ*(($i-8)%4)`]
125 # While ARMv8 specifies merged rotate-n-logical operation such as
126 # 'eor x,y,z,ror#n', it was found to negatively affect performance
127 # on Apple A7. The reason seems to be that it requires even 'y' to
128 # be available earlier. This means that such merged instruction is
129 # not necessarily best choice on critical path... On the other hand
130 # Cortex-A5x handles merged instructions much better than disjoint
131 # rotate and logical... See (**) footnote above.
132 $code.=<<___ if ($i<15);
133 ror $t0,$e,#$Sigma1[0]
134 add $h,$h,$t2 // h+=K[i]
135 eor $T0,$e,$e,ror#`$Sigma1[2]-$Sigma1[1]`
138 add $h,$h,@X[$i&15] // h+=X[i]
139 orr $t1,$t1,$t2 // Ch(e,f,g)
140 eor $t2,$a,$b // a^b, b^c in next round
141 eor $t0,$t0,$T0,ror#$Sigma1[1] // Sigma1(e)
142 ror $T0,$a,#$Sigma0[0]
143 add $h,$h,$t1 // h+=Ch(e,f,g)
144 eor $t1,$a,$a,ror#`$Sigma0[2]-$Sigma0[1]`
145 add $h,$h,$t0 // h+=Sigma1(e)
146 and $t3,$t3,$t2 // (b^c)&=(a^b)
148 eor $t3,$t3,$b // Maj(a,b,c)
149 eor $t1,$T0,$t1,ror#$Sigma0[1] // Sigma0(a)
150 add $h,$h,$t3 // h+=Maj(a,b,c)
151 ldr $t3,[$Ktbl],#$SZ // *K++, $t2 in next round
152 //add $h,$h,$t1 // h+=Sigma0(a)
154 $code.=<<___ if ($i>=15);
155 ror $t0,$e,#$Sigma1[0]
156 add $h,$h,$t2 // h+=K[i]
157 ror $T1,@X[($j+1)&15],#$sigma0[0]
159 ror $T2,@X[($j+14)&15],#$sigma1[0]
161 ror $T0,$a,#$Sigma0[0]
162 add $h,$h,@X[$i&15] // h+=X[i]
163 eor $t0,$t0,$e,ror#$Sigma1[1]
164 eor $T1,$T1,@X[($j+1)&15],ror#$sigma0[1]
165 orr $t1,$t1,$t2 // Ch(e,f,g)
166 eor $t2,$a,$b // a^b, b^c in next round
167 eor $t0,$t0,$e,ror#$Sigma1[2] // Sigma1(e)
168 eor $T0,$T0,$a,ror#$Sigma0[1]
169 add $h,$h,$t1 // h+=Ch(e,f,g)
170 and $t3,$t3,$t2 // (b^c)&=(a^b)
171 eor $T2,$T2,@X[($j+14)&15],ror#$sigma1[1]
172 eor $T1,$T1,@X[($j+1)&15],lsr#$sigma0[2] // sigma0(X[i+1])
173 add $h,$h,$t0 // h+=Sigma1(e)
174 eor $t3,$t3,$b // Maj(a,b,c)
175 eor $t1,$T0,$a,ror#$Sigma0[2] // Sigma0(a)
176 eor $T2,$T2,@X[($j+14)&15],lsr#$sigma1[2] // sigma1(X[i+14])
177 add @X[$j],@X[$j],@X[($j+9)&15]
179 add $h,$h,$t3 // h+=Maj(a,b,c)
180 ldr $t3,[$Ktbl],#$SZ // *K++, $t2 in next round
181 add @X[$j],@X[$j],$T1
182 add $h,$h,$t1 // h+=Sigma0(a)
183 add @X[$j],@X[$j],$T2
190 # include "arm_arch.h"
191 .extern OPENSSL_armcap_P
197 .type $func,%function
201 adrp x16,OPENSSL_armcap_P
202 ldr w16,[x16,#:lo12:OPENSSL_armcap_P]
204 $code.=<<___ if ($SZ==4);
205 tst w16,#ARMV8_SHA256
210 $code.=<<___ if ($SZ==8);
211 tst w16,#ARMV8_SHA512
216 .inst 0xd503233f // paciasp
217 stp x29,x30,[sp,#-128]!
227 ldp $A,$B,[$ctx] // load context
228 ldp $C,$D,[$ctx,#2*$SZ]
229 ldp $E,$F,[$ctx,#4*$SZ]
230 add $num,$inp,$num,lsl#`log(16*$SZ)/log(2)` // end of input
231 ldp $G,$H,[$ctx,#6*$SZ]
233 stp $ctx,$num,[x29,#96]
236 ldp @X[0],@X[1],[$inp],#2*$SZ
237 ldr $t2,[$Ktbl],#$SZ // *K++
238 eor $t3,$B,$C // magic seed
241 for ($i=0;$i<16;$i++) { &BODY_00_xx($i,@V); unshift(@V,pop(@V)); }
242 $code.=".Loop_16_xx:\n";
243 for (;$i<32;$i++) { &BODY_00_xx($i,@V); unshift(@V,pop(@V)); }
247 ldp $ctx,$num,[x29,#96]
249 sub $Ktbl,$Ktbl,#`$SZ*($rounds+1)` // rewind
251 ldp @X[0],@X[1],[$ctx]
252 ldp @X[2],@X[3],[$ctx,#2*$SZ]
253 add $inp,$inp,#14*$SZ // advance input pointer
254 ldp @X[4],@X[5],[$ctx,#4*$SZ]
256 ldp @X[6],@X[7],[$ctx,#6*$SZ]
263 stp $C,$D,[$ctx,#2*$SZ]
267 stp $E,$F,[$ctx,#4*$SZ]
268 stp $G,$H,[$ctx,#6*$SZ]
271 ldp x19,x20,[x29,#16]
273 ldp x21,x22,[x29,#32]
274 ldp x23,x24,[x29,#48]
275 ldp x25,x26,[x29,#64]
276 ldp x27,x28,[x29,#80]
277 ldp x29,x30,[sp],#128
278 .inst 0xd50323bf // autiasp
283 .type .LK$BITS,%object
286 $code.=<<___ if ($SZ==8);
287 .quad 0x428a2f98d728ae22,0x7137449123ef65cd
288 .quad 0xb5c0fbcfec4d3b2f,0xe9b5dba58189dbbc
289 .quad 0x3956c25bf348b538,0x59f111f1b605d019
290 .quad 0x923f82a4af194f9b,0xab1c5ed5da6d8118
291 .quad 0xd807aa98a3030242,0x12835b0145706fbe
292 .quad 0x243185be4ee4b28c,0x550c7dc3d5ffb4e2
293 .quad 0x72be5d74f27b896f,0x80deb1fe3b1696b1
294 .quad 0x9bdc06a725c71235,0xc19bf174cf692694
295 .quad 0xe49b69c19ef14ad2,0xefbe4786384f25e3
296 .quad 0x0fc19dc68b8cd5b5,0x240ca1cc77ac9c65
297 .quad 0x2de92c6f592b0275,0x4a7484aa6ea6e483
298 .quad 0x5cb0a9dcbd41fbd4,0x76f988da831153b5
299 .quad 0x983e5152ee66dfab,0xa831c66d2db43210
300 .quad 0xb00327c898fb213f,0xbf597fc7beef0ee4
301 .quad 0xc6e00bf33da88fc2,0xd5a79147930aa725
302 .quad 0x06ca6351e003826f,0x142929670a0e6e70
303 .quad 0x27b70a8546d22ffc,0x2e1b21385c26c926
304 .quad 0x4d2c6dfc5ac42aed,0x53380d139d95b3df
305 .quad 0x650a73548baf63de,0x766a0abb3c77b2a8
306 .quad 0x81c2c92e47edaee6,0x92722c851482353b
307 .quad 0xa2bfe8a14cf10364,0xa81a664bbc423001
308 .quad 0xc24b8b70d0f89791,0xc76c51a30654be30
309 .quad 0xd192e819d6ef5218,0xd69906245565a910
310 .quad 0xf40e35855771202a,0x106aa07032bbd1b8
311 .quad 0x19a4c116b8d2d0c8,0x1e376c085141ab53
312 .quad 0x2748774cdf8eeb99,0x34b0bcb5e19b48a8
313 .quad 0x391c0cb3c5c95a63,0x4ed8aa4ae3418acb
314 .quad 0x5b9cca4f7763e373,0x682e6ff3d6b2b8a3
315 .quad 0x748f82ee5defb2fc,0x78a5636f43172f60
316 .quad 0x84c87814a1f0ab72,0x8cc702081a6439ec
317 .quad 0x90befffa23631e28,0xa4506cebde82bde9
318 .quad 0xbef9a3f7b2c67915,0xc67178f2e372532b
319 .quad 0xca273eceea26619c,0xd186b8c721c0c207
320 .quad 0xeada7dd6cde0eb1e,0xf57d4f7fee6ed178
321 .quad 0x06f067aa72176fba,0x0a637dc5a2c898a6
322 .quad 0x113f9804bef90dae,0x1b710b35131c471b
323 .quad 0x28db77f523047d84,0x32caab7b40c72493
324 .quad 0x3c9ebe0a15c9bebc,0x431d67c49c100d4c
325 .quad 0x4cc5d4becb3e42b6,0x597f299cfc657e2a
326 .quad 0x5fcb6fab3ad6faec,0x6c44198c4a475817
327 .quad 0 // terminator
329 $code.=<<___ if ($SZ==4);
330 .long 0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5
331 .long 0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5
332 .long 0xd807aa98,0x12835b01,0x243185be,0x550c7dc3
333 .long 0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174
334 .long 0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc
335 .long 0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da
336 .long 0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7
337 .long 0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967
338 .long 0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13
339 .long 0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85
340 .long 0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3
341 .long 0xd192e819,0xd6990624,0xf40e3585,0x106aa070
342 .long 0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5
343 .long 0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3
344 .long 0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208
345 .long 0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2
349 .size .LK$BITS,.-.LK$BITS
350 .asciz "SHA$BITS block transform for ARMv8, CRYPTOGAMS by <appro\@openssl.org>"
357 my ($ABCD,$EFGH,$abcd)=map("v$_.16b",(0..2));
358 my @MSG=map("v$_.16b",(4..7));
359 my ($W0,$W1)=("v16.4s","v17.4s");
360 my ($ABCD_SAVE,$EFGH_SAVE)=("v18.16b","v19.16b");
364 .type sha256_block_armv8,%function
368 stp x29,x30,[sp,#-16]!
371 ld1.32 {$ABCD,$EFGH},[$ctx]
375 ld1 {@MSG[0]-@MSG[3]},[$inp],#64
377 ld1.32 {$W0},[$Ktbl],#16
378 rev32 @MSG[0],@MSG[0]
379 rev32 @MSG[1],@MSG[1]
380 rev32 @MSG[2],@MSG[2]
381 rev32 @MSG[3],@MSG[3]
382 orr $ABCD_SAVE,$ABCD,$ABCD // offload
383 orr $EFGH_SAVE,$EFGH,$EFGH
385 for($i=0;$i<12;$i++) {
387 ld1.32 {$W1},[$Ktbl],#16
388 add.i32 $W0,$W0,@MSG[0]
389 sha256su0 @MSG[0],@MSG[1]
390 orr $abcd,$ABCD,$ABCD
391 sha256h $ABCD,$EFGH,$W0
392 sha256h2 $EFGH,$abcd,$W0
393 sha256su1 @MSG[0],@MSG[2],@MSG[3]
395 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG));
398 ld1.32 {$W1},[$Ktbl],#16
399 add.i32 $W0,$W0,@MSG[0]
400 orr $abcd,$ABCD,$ABCD
401 sha256h $ABCD,$EFGH,$W0
402 sha256h2 $EFGH,$abcd,$W0
404 ld1.32 {$W0},[$Ktbl],#16
405 add.i32 $W1,$W1,@MSG[1]
406 orr $abcd,$ABCD,$ABCD
407 sha256h $ABCD,$EFGH,$W1
408 sha256h2 $EFGH,$abcd,$W1
411 add.i32 $W0,$W0,@MSG[2]
412 sub $Ktbl,$Ktbl,#$rounds*$SZ-16 // rewind
413 orr $abcd,$ABCD,$ABCD
414 sha256h $ABCD,$EFGH,$W0
415 sha256h2 $EFGH,$abcd,$W0
417 add.i32 $W1,$W1,@MSG[3]
418 orr $abcd,$ABCD,$ABCD
419 sha256h $ABCD,$EFGH,$W1
420 sha256h2 $EFGH,$abcd,$W1
422 add.i32 $ABCD,$ABCD,$ABCD_SAVE
423 add.i32 $EFGH,$EFGH,$EFGH_SAVE
427 st1.32 {$ABCD,$EFGH},[$ctx]
431 .size sha256_block_armv8,.-sha256_block_armv8
436 if ($SZ==4) { ######################################### NEON stuff #
437 # You'll surely note a lot of similarities with sha256-armv4 module,
438 # and of course it's not a coincidence. sha256-armv4 was used as
439 # initial template, but was adapted for ARMv8 instruction set and
440 # extensively re-tuned for all-round performance.
442 my @V = ($A,$B,$C,$D,$E,$F,$G,$H) = map("w$_",(3..10));
443 my ($t0,$t1,$t2,$t3,$t4) = map("w$_",(11..15));
446 my @X = map("q$_",(0..3));
447 my ($T0,$T1,$T2,$T3,$T4,$T5,$T6,$T7) = map("q$_",(4..7,16..19));
450 sub AUTOLOAD() # thunk [simplified] x86-style perlasm
451 { my $opcode = $AUTOLOAD; $opcode =~ s/.*:://; $opcode =~ s/_/\./;
453 $arg = "#$arg" if ($arg*1 eq $arg);
454 $code .= "\t$opcode\t".join(',',@_,$arg)."\n";
457 sub Dscalar { shift =~ m|[qv]([0-9]+)|?"d$1":""; }
458 sub Dlo { shift =~ m|[qv]([0-9]+)|?"v$1.d[0]":""; }
459 sub Dhi { shift =~ m|[qv]([0-9]+)|?"v$1.d[1]":""; }
464 my @insns = (&$body,&$body,&$body,&$body);
465 my ($a,$b,$c,$d,$e,$f,$g,$h);
467 &ext_8 ($T0,@X[0],@X[1],4); # X[1..4]
471 &ext_8 ($T3,@X[2],@X[3],4); # X[9..12]
474 &mov (&Dscalar($T7),&Dhi(@X[3])); # X[14..15]
477 &ushr_32 ($T2,$T0,$sigma0[0]);
479 &ushr_32 ($T1,$T0,$sigma0[2]);
481 &add_32 (@X[0],@X[0],$T3); # X[0..3] += X[9..12]
483 &sli_32 ($T2,$T0,32-$sigma0[0]);
486 &ushr_32 ($T3,$T0,$sigma0[1]);
489 &eor_8 ($T1,$T1,$T2);
492 &sli_32 ($T3,$T0,32-$sigma0[1]);
495 &ushr_32 ($T4,$T7,$sigma1[0]);
498 &eor_8 ($T1,$T1,$T3); # sigma0(X[1..4])
501 &sli_32 ($T4,$T7,32-$sigma1[0]);
504 &ushr_32 ($T5,$T7,$sigma1[2]);
507 &ushr_32 ($T3,$T7,$sigma1[1]);
510 &add_32 (@X[0],@X[0],$T1); # X[0..3] += sigma0(X[1..4])
513 &sli_u32 ($T3,$T7,32-$sigma1[1]);
516 &eor_8 ($T5,$T5,$T4);
520 &eor_8 ($T5,$T5,$T3); # sigma1(X[14..15])
524 &add_32 (@X[0],@X[0],$T5); # X[0..1] += sigma1(X[14..15])
528 &ushr_32 ($T6,@X[0],$sigma1[0]);
530 &ushr_32 ($T7,@X[0],$sigma1[2]);
533 &sli_32 ($T6,@X[0],32-$sigma1[0]);
535 &ushr_32 ($T5,@X[0],$sigma1[1]);
538 &eor_8 ($T7,$T7,$T6);
541 &sli_32 ($T5,@X[0],32-$sigma1[1]);
544 &ld1_32 ("{$T0}","[$Ktbl], #16");
546 &eor_8 ($T7,$T7,$T5); # sigma1(X[16..17])
549 &eor_8 ($T5,$T5,$T5);
552 &mov (&Dhi($T5), &Dlo($T7));
556 &add_32 (@X[0],@X[0],$T5); # X[2..3] += sigma1(X[16..17])
560 &add_32 ($T0,$T0,@X[0]);
561 while($#insns>=1) { eval(shift(@insns)); }
562 &st1_32 ("{$T0}","[$Xfer], #16");
565 push(@X,shift(@X)); # "rotate" X[]
571 my @insns = (&$body,&$body,&$body,&$body);
572 my ($a,$b,$c,$d,$e,$f,$g,$h);
576 &ld1_8 ("{@X[0]}","[$inp],#16");
579 &ld1_32 ("{$T0}","[$Ktbl],#16");
584 &rev32 (@X[0],@X[0]);
589 &add_32 ($T0,$T0,@X[0]);
590 foreach (@insns) { eval; } # remaining instructions
591 &st1_32 ("{$T0}","[$Xfer], #16");
593 push(@X,shift(@X)); # "rotate" X[]
598 '($a,$b,$c,$d,$e,$f,$g,$h)=@V;'.
599 '&add ($h,$h,$t1)', # h+=X[i]+K[i]
600 '&add ($a,$a,$t4);'. # h+=Sigma0(a) from the past
603 '&eor ($t0,$e,$e,"ror#".($Sigma1[1]-$Sigma1[0]))',
604 '&add ($a,$a,$t2)', # h+=Maj(a,b,c) from the past
605 '&orr ($t1,$t1,$t4)', # Ch(e,f,g)
606 '&eor ($t0,$t0,$e,"ror#".($Sigma1[2]-$Sigma1[0]))', # Sigma1(e)
607 '&eor ($t4,$a,$a,"ror#".($Sigma0[1]-$Sigma0[0]))',
608 '&add ($h,$h,$t1)', # h+=Ch(e,f,g)
609 '&ror ($t0,$t0,"#$Sigma1[0]")',
610 '&eor ($t2,$a,$b)', # a^b, b^c in next round
611 '&eor ($t4,$t4,$a,"ror#".($Sigma0[2]-$Sigma0[0]))', # Sigma0(a)
612 '&add ($h,$h,$t0)', # h+=Sigma1(e)
613 '&ldr ($t1,sprintf "[sp,#%d]",4*(($j+1)&15)) if (($j&15)!=15);'.
614 '&ldr ($t1,"[$Ktbl]") if ($j==15);'.
615 '&and ($t3,$t3,$t2)', # (b^c)&=(a^b)
616 '&ror ($t4,$t4,"#$Sigma0[0]")',
617 '&add ($d,$d,$h)', # d+=h
618 '&eor ($t3,$t3,$b)', # Maj(a,b,c)
619 '$j++; unshift(@V,pop(@V)); ($t2,$t3)=($t3,$t2);'
625 .globl sha256_block_neon
627 .type sha256_block_neon,%function
631 stp x29, x30, [sp, #-16]!
636 add $num,$inp,$num,lsl#6 // len to point at the end of inp
638 ld1.8 {@X[0]},[$inp], #16
639 ld1.8 {@X[1]},[$inp], #16
640 ld1.8 {@X[2]},[$inp], #16
641 ld1.8 {@X[3]},[$inp], #16
642 ld1.32 {$T0},[$Ktbl], #16
643 ld1.32 {$T1},[$Ktbl], #16
644 ld1.32 {$T2},[$Ktbl], #16
645 ld1.32 {$T3},[$Ktbl], #16
646 rev32 @X[0],@X[0] // yes, even on
647 rev32 @X[1],@X[1] // big-endian
654 st1.32 {$T0-$T1},[$Xfer], #32
656 st1.32 {$T2-$T3},[$Xfer]
672 &Xupdate(\&body_00_15);
673 &Xupdate(\&body_00_15);
674 &Xupdate(\&body_00_15);
675 &Xupdate(\&body_00_15);
677 cmp $t1,#0 // check for K256 terminator
682 sub $Ktbl,$Ktbl,#256 // rewind $Ktbl
685 csel $Xfer, $Xfer, xzr, eq
686 sub $inp,$inp,$Xfer // avoid SEGV
689 &Xpreload(\&body_00_15);
690 &Xpreload(\&body_00_15);
691 &Xpreload(\&body_00_15);
692 &Xpreload(\&body_00_15);
694 add $A,$A,$t4 // h+=Sigma0(a) from the past
695 ldp $t0,$t1,[$ctx,#0]
696 add $A,$A,$t2 // h+=Maj(a,b,c) from the past
697 ldp $t2,$t3,[$ctx,#8]
698 add $A,$A,$t0 // accumulate
700 ldp $t0,$t1,[$ctx,#16]
703 ldp $t2,$t3,[$ctx,#24]
722 .size sha256_block_neon,.-sha256_block_neon
729 my @H = map("v$_.16b",(0..4));
730 my ($fg,$de,$m9_10)=map("v$_.16b",(5..7));
731 my @MSG=map("v$_.16b",(16..23));
732 my ($W0,$W1)=("v24.2d","v25.2d");
733 my ($AB,$CD,$EF,$GH)=map("v$_.16b",(26..29));
737 .type sha512_block_armv8,%function
741 stp x29,x30,[sp,#-16]!
744 ld1 {@MSG[0]-@MSG[3]},[$inp],#64 // load input
745 ld1 {@MSG[4]-@MSG[7]},[$inp],#64
747 ld1.64 {@H[0]-@H[3]},[$ctx] // load context
750 rev64 @MSG[0],@MSG[0]
751 rev64 @MSG[1],@MSG[1]
752 rev64 @MSG[2],@MSG[2]
753 rev64 @MSG[3],@MSG[3]
754 rev64 @MSG[4],@MSG[4]
755 rev64 @MSG[5],@MSG[5]
756 rev64 @MSG[6],@MSG[6]
757 rev64 @MSG[7],@MSG[7]
762 ld1.64 {$W0},[$Ktbl],#16
765 orr $AB,@H[0],@H[0] // offload
769 csel $inp,$inp,x4,ne // conditional rewind
771 for($i=0;$i<32;$i++) {
773 add.i64 $W0,$W0,@MSG[0]
774 ld1.64 {$W1},[$Ktbl],#16
776 ext $fg,@H[2],@H[3],#8
777 ext $de,@H[1],@H[2],#8
778 add.i64 @H[3],@H[3],$W0 // "T1 + H + K512[i]"
779 sha512su0 @MSG[0],@MSG[1]
780 ext $m9_10,@MSG[4],@MSG[5],#8
781 sha512h @H[3],$fg,$de
782 sha512su1 @MSG[0],@MSG[7],$m9_10
783 add.i64 @H[4],@H[1],@H[3] // "D + T1"
784 sha512h2 @H[3],$H[1],@H[0]
786 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG));
787 @H = (@H[3],@H[0],@H[4],@H[2],@H[1]);
790 $code.=<<___ if ($i<39);
791 ld1.64 {$W1},[$Ktbl],#16
793 $code.=<<___ if ($i==39);
794 sub $Ktbl,$Ktbl,#$rounds*$SZ // rewind
797 add.i64 $W0,$W0,@MSG[0]
798 ld1 {@MSG[0]},[$inp],#16 // load next input
800 ext $fg,@H[2],@H[3],#8
801 ext $de,@H[1],@H[2],#8
802 add.i64 @H[3],@H[3],$W0 // "T1 + H + K512[i]"
803 sha512h @H[3],$fg,$de
804 rev64 @MSG[0],@MSG[0]
805 add.i64 @H[4],@H[1],@H[3] // "D + T1"
806 sha512h2 @H[3],$H[1],@H[0]
808 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG));
809 @H = (@H[3],@H[0],@H[4],@H[2],@H[1]);
812 add.i64 @H[0],@H[0],$AB // accumulate
813 add.i64 @H[1],@H[1],$CD
814 add.i64 @H[2],@H[2],$EF
815 add.i64 @H[3],@H[3],$GH
819 st1.64 {@H[0]-@H[3]},[$ctx] // store context
823 .size sha512_block_armv8,.-sha512_block_armv8
829 #if !defined(__KERNEL__) && !defined(_WIN64)
830 .comm OPENSSL_armcap_P,4,4
835 "sha256h" => 0x5e004000, "sha256h2" => 0x5e005000,
836 "sha256su0" => 0x5e282800, "sha256su1" => 0x5e006000 );
839 my ($mnemonic,$arg)=@_;
841 $arg =~ m/[qv]([0-9]+)[^,]*,\s*[qv]([0-9]+)[^,]*(?:,\s*[qv]([0-9]+))?/o
843 sprintf ".inst\t0x%08x\t//%s %s",
844 $opcode{$mnemonic}|$1|($2<<5)|($3<<16),
850 "sha512h" => 0xce608000, "sha512h2" => 0xce608400,
851 "sha512su0" => 0xcec08000, "sha512su1" => 0xce608800 );
854 my ($mnemonic,$arg)=@_;
856 $arg =~ m/[qv]([0-9]+)[^,]*,\s*[qv]([0-9]+)[^,]*(?:,\s*[qv]([0-9]+))?/o
858 sprintf ".inst\t0x%08x\t//%s %s",
859 $opcode{$mnemonic}|$1|($2<<5)|($3<<16),
867 last if (!s/^#/\/\// and !/^$/);
872 foreach(split("\n",$code)) {
874 s/\`([^\`]*)\`/eval($1)/ge;
876 s/\b(sha512\w+)\s+([qv].*)/unsha512($1,$2)/ge or
877 s/\b(sha256\w+)\s+([qv].*)/unsha256($1,$2)/ge;
879 s/\bq([0-9]+)\b/v$1.16b/g; # old->new registers
882 s/\.\w?64\b// and s/\.16b/\.2d/g or
883 s/\.\w?32\b// and s/\.16b/\.4s/g;
884 m/\bext\b/ and s/\.2d/\.16b/g or
885 m/(ld|st)1[^\[]+\[0\]/ and s/\.4s/\.s/g;