3 # ====================================================================
4 # Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
5 # project. The module is, however, dual licensed under OpenSSL and
6 # CRYPTOGAMS licenses depending on where you obtain it. For further
7 # details see http://www.openssl.org/~appro/cryptogams/.
8 # ====================================================================
10 # sha1_block procedure for x86_64.
12 # It was brought to my attention that on EM64T compiler-generated code
13 # was far behind 32-bit assembler implementation. This is unlike on
14 # Opteron where compiler-generated code was only 15% behind 32-bit
15 # assembler, which originally made it hard to motivate the effort.
16 # There was suggestion to mechanically translate 32-bit code, but I
17 # dismissed it, reasoning that x86_64 offers enough register bank
18 # capacity to fully utilize SHA-1 parallelism. Therefore this fresh
19 # implementation:-) However! While 64-bit code does perform better
20 # on Opteron, I failed to beat 32-bit assembler on EM64T core. Well,
21 # x86_64 does offer larger *addressable* bank, but out-of-order core
22 # reaches for even more registers through dynamic aliasing, and EM64T
23 # core must have managed to run-time optimize even 32-bit code just as
24 # good as 64-bit one. Performance improvement is summarized in the
27 # gcc 3.4 32-bit asm cycles/byte
28 # Opteron +45% +20% 6.8
29 # Xeon P4 +65% +0% 9.9
34 # The code was revised to minimize code size and to maximize
35 # "distance" between instructions producing input to 'lea'
36 # instruction and the 'lea' instruction itself, which is essential
37 # for Intel Atom core.
41 # Add SSSE3, Supplemental[!] SSE3, implementation. The idea behind it
42 # is to offload message schedule denoted by Wt in NIST specification,
43 # or Xupdate in OpenSSL source, to SIMD unit. See sha1-586.pl module
44 # for background and implementation details. The only difference from
45 # 32-bit code is that 64-bit code doesn't have to spill @X[] elements
46 # to free temporary registers.
50 # Add AVX code path. See sha1-586.pl for further information.
52 ######################################################################
53 # Current performance is summarized in following table. Numbers are
54 # CPU clock cycles spent to process single byte (less is better).
59 # Core2 6.7 6.1/+10% -
60 # Atom 11.0 9.7/+13% -
61 # Westmere 7.1 5.6/+27% -
62 # Sandy Bridge 7.9 6.3/+25% 5.2/+51%
66 if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
68 $win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
70 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
71 ( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
72 ( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
73 die "can't locate x86_64-xlate.pl";
75 $avx=1 if (`$ENV{CC} -Wa,-V -c -o /dev/null -x assembler /dev/null 2>&1`
76 =~ /GNU assembler version ([2-9]\.[0-9]+)/ &&
78 $avx=1 if (!$avx && $flavour =~ /nasm/ &&
79 `nasm -v 2>&1` =~ /NASM version ([2-9]\.[0-9]+)/ &&
82 open STDOUT,"| $^X $xlate $flavour $output";
84 $ctx="%rdi"; # 1st arg
85 $inp="%rsi"; # 2nd arg
86 $num="%rdx"; # 3rd arg
88 # reassign arguments in order to produce more compact code
106 my ($i,$a,$b,$c,$d,$e)=@_;
108 $code.=<<___ if ($i==0);
109 mov `4*$i`($inp),$xi[0]
111 mov $xi[0],`4*$i`(%rsp)
113 $code.=<<___ if ($i<15);
115 mov `4*$j`($inp),$xi[1]
120 lea 0x5a827999($xi[0],$e),$e
122 mov $xi[1],`4*$j`(%rsp)
128 $code.=<<___ if ($i>=15);
129 mov `4*($j%16)`(%rsp),$xi[1]
132 xor `4*(($j+2)%16)`(%rsp),$xi[1]
135 xor `4*(($j+8)%16)`(%rsp),$xi[1]
137 lea 0x5a827999($xi[0],$e),$e
138 xor `4*(($j+13)%16)`(%rsp),$xi[1]
143 mov $xi[1],`4*($j%16)`(%rsp)
146 unshift(@xi,pop(@xi));
150 my ($i,$a,$b,$c,$d,$e)=@_;
152 my $K=($i<40)?0x6ed9eba1:0xca62c1d6;
153 $code.=<<___ if ($i<79);
154 mov `4*($j%16)`(%rsp),$xi[1]
157 xor `4*(($j+2)%16)`(%rsp),$xi[1]
161 xor `4*(($j+8)%16)`(%rsp),$xi[1]
164 xor `4*(($j+13)%16)`(%rsp),$xi[1]
169 $code.=<<___ if ($i<76);
170 mov $xi[1],`4*($j%16)`(%rsp)
172 $code.=<<___ if ($i==79);
183 unshift(@xi,pop(@xi));
187 my ($i,$a,$b,$c,$d,$e)=@_;
190 mov `4*($j%16)`(%rsp),$xi[1]
193 xor `4*(($j+2)%16)`(%rsp),$xi[1]
196 xor `4*(($j+8)%16)`(%rsp),$xi[1]
198 lea 0x8f1bbcdc($xi[0],$e),$e
200 xor `4*(($j+13)%16)`(%rsp),$xi[1]
206 mov $xi[1],`4*($j%16)`(%rsp)
209 unshift(@xi,pop(@xi));
214 .extern OPENSSL_ia32cap_P
216 .globl sha1_block_data_order
217 .type sha1_block_data_order,\@function,3
219 sha1_block_data_order:
220 mov OPENSSL_ia32cap_P+0(%rip),%r9d
221 mov OPENSSL_ia32cap_P+4(%rip),%r8d
222 test \$`1<<9`,%r8d # check SSSE3 bit
225 $code.=<<___ if ($avx);
226 and \$`1<<28`,%r8d # mask AVX bit
227 and \$`1<<30`,%r9d # mask "Intel CPU" bit
229 cmp \$`1<<28|1<<30`,%r8d
242 mov %rdi,$ctx # reassigned argument
244 mov %rsi,$inp # reassigned argument
246 mov %rdx,$num # reassigned argument
247 mov %r11,`16*4`(%rsp)
260 for($i=0;$i<20;$i++) { &BODY_00_19($i,@V); unshift(@V,pop(@V)); }
261 for(;$i<40;$i++) { &BODY_20_39($i,@V); unshift(@V,pop(@V)); }
262 for(;$i<60;$i++) { &BODY_40_59($i,@V); unshift(@V,pop(@V)); }
263 for(;$i<80;$i++) { &BODY_20_39($i,@V); unshift(@V,pop(@V)); }
277 lea `16*4`($inp),$inp
280 mov `16*4`(%rsp),%rsi
288 .size sha1_block_data_order,.-sha1_block_data_order
292 my @X=map("%xmm$_",(4..7,0..3));
293 my @Tx=map("%xmm$_",(8..10));
294 my @V=($A,$B,$C,$D,$E)=("%eax","%ebx","%ecx","%edx","%ebp"); # size optimization
295 my @T=("%esi","%edi");
299 my $_rol=sub { &rol(@_) };
300 my $_ror=sub { &ror(@_) };
303 .type sha1_block_data_order_ssse3,\@function,3
305 sha1_block_data_order_ssse3:
310 lea `-64-($win64?5*16:0)`(%rsp),%rsp
312 $code.=<<___ if ($win64);
313 movaps %xmm6,64+0(%rsp)
314 movaps %xmm7,64+16(%rsp)
315 movaps %xmm8,64+32(%rsp)
316 movaps %xmm9,64+48(%rsp)
317 movaps %xmm10,64+64(%rsp)
321 mov %rdi,$ctx # reassigned argument
322 mov %rsi,$inp # reassigned argument
323 mov %rdx,$num # reassigned argument
327 lea K_XX_XX(%rip),$K_XX_XX
329 mov 0($ctx),$A # load context
333 mov $B,@T[0] # magic seed
336 movdqa 64($K_XX_XX),@X[2] # pbswap mask
337 movdqa 0($K_XX_XX),@Tx[1] # K_00_19
338 movdqu 0($inp),@X[-4&7] # load input to %xmm[0-3]
339 movdqu 16($inp),@X[-3&7]
340 movdqu 32($inp),@X[-2&7]
341 movdqu 48($inp),@X[-1&7]
342 pshufb @X[2],@X[-4&7] # byte swap
344 pshufb @X[2],@X[-3&7]
345 pshufb @X[2],@X[-2&7]
346 pshufb @X[2],@X[-1&7]
347 paddd @Tx[1],@X[-4&7] # add K_00_19
348 paddd @Tx[1],@X[-3&7]
349 paddd @Tx[1],@X[-2&7]
350 movdqa @X[-4&7],0(%rsp) # X[]+K xfer to IALU
351 psubd @Tx[1],@X[-4&7] # restore X[]
352 movdqa @X[-3&7],16(%rsp)
353 psubd @Tx[1],@X[-3&7]
354 movdqa @X[-2&7],32(%rsp)
355 psubd @Tx[1],@X[-2&7]
359 sub AUTOLOAD() # thunk [simplified] 32-bit style perlasm
360 { my $opcode = $AUTOLOAD; $opcode =~ s/.*:://;
362 $arg = "\$$arg" if ($arg*1 eq $arg);
363 $code .= "\t$opcode\t".join(',',$arg,reverse @_)."\n";
366 sub Xupdate_ssse3_16_31() # recall that $Xi starts wtih 4
369 my @insns = (&$body,&$body,&$body,&$body); # 40 instructions
372 &movdqa (@X[0],@X[-3&7]);
375 &movdqa (@Tx[0],@X[-1&7]);
376 &palignr(@X[0],@X[-4&7],8); # compose "X[-14]" in "X[0]"
380 &paddd (@Tx[1],@X[-1&7]);
383 &psrldq (@Tx[0],4); # "X[-3]", 3 dwords
386 &pxor (@X[0],@X[-4&7]); # "X[0]"^="X[-16]"
390 &pxor (@Tx[0],@X[-2&7]); # "X[-3]"^"X[-8]"
396 &pxor (@X[0],@Tx[0]); # "X[0]"^="X[-3]"^"X[-8]"
399 &movdqa (eval(16*(($Xi-1)&3))."(%rsp)",@Tx[1]); # X[]+K xfer to IALU
403 &movdqa (@Tx[2],@X[0]);
404 &movdqa (@Tx[0],@X[0]);
410 &pslldq (@Tx[2],12); # "X[0]"<<96, extract one dword
411 &paddd (@X[0],@X[0]);
420 &movdqa (@Tx[1],@Tx[2]);
425 &por (@X[0],@Tx[0]); # "X[0]"<<<=1
432 &pxor (@X[0],@Tx[2]);
435 &movdqa (@Tx[2],eval(16*(($Xi)/5))."($K_XX_XX)"); # K_XX_XX
439 &pxor (@X[0],@Tx[1]); # "X[0]"^=("X[0]">>96)<<<2
441 foreach (@insns) { eval; } # remaining instructions [if any]
443 $Xi++; push(@X,shift(@X)); # "rotate" X[]
444 push(@Tx,shift(@Tx));
447 sub Xupdate_ssse3_32_79()
450 my @insns = (&$body,&$body,&$body,&$body); # 32 to 48 instructions
453 &movdqa (@Tx[0],@X[-1&7]) if ($Xi==8);
454 eval(shift(@insns)); # body_20_39
455 &pxor (@X[0],@X[-4&7]); # "X[0]"="X[-32]"^"X[-16]"
456 &palignr(@Tx[0],@X[-2&7],8); # compose "X[-6]"
459 eval(shift(@insns)); # rol
461 &pxor (@X[0],@X[-7&7]); # "X[0]"^="X[-28]"
463 eval(shift(@insns)) if (@insns[0] !~ /&ro[rl]/);
465 &movdqa (@Tx[2],@Tx[1]);# "perpetuate" K_XX_XX...
466 } else { # ... or load next one
467 &movdqa (@Tx[2],eval(16*($Xi/5))."($K_XX_XX)");
469 &paddd (@Tx[1],@X[-1&7]);
470 eval(shift(@insns)); # ror
473 &pxor (@X[0],@Tx[0]); # "X[0]"^="X[-6]"
474 eval(shift(@insns)); # body_20_39
477 eval(shift(@insns)); # rol
479 &movdqa (@Tx[0],@X[0]);
480 &movdqa (eval(16*(($Xi-1)&3))."(%rsp)",@Tx[1]); # X[]+K xfer to IALU
483 eval(shift(@insns)); # ror
487 eval(shift(@insns)); # body_20_39
491 eval(shift(@insns)); # rol
494 eval(shift(@insns)); # ror
497 &por (@X[0],@Tx[0]); # "X[0]"<<<=2
498 eval(shift(@insns)); # body_20_39
500 &movdqa (@Tx[1],@X[0]) if ($Xi<19);
502 eval(shift(@insns)); # rol
505 eval(shift(@insns)); # rol
508 foreach (@insns) { eval; } # remaining instructions
510 $Xi++; push(@X,shift(@X)); # "rotate" X[]
511 push(@Tx,shift(@Tx));
514 sub Xuplast_ssse3_80()
517 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions
521 &paddd (@Tx[1],@X[-1&7]);
527 &movdqa (eval(16*(($Xi-1)&3))."(%rsp)",@Tx[1]); # X[]+K xfer IALU
529 foreach (@insns) { eval; } # remaining instructions
532 &je (".Ldone_ssse3");
534 unshift(@Tx,pop(@Tx));
536 &movdqa (@X[2],"64($K_XX_XX)"); # pbswap mask
537 &movdqa (@Tx[1],"0($K_XX_XX)"); # K_00_19
538 &movdqu (@X[-4&7],"0($inp)"); # load input
539 &movdqu (@X[-3&7],"16($inp)");
540 &movdqu (@X[-2&7],"32($inp)");
541 &movdqu (@X[-1&7],"48($inp)");
542 &pshufb (@X[-4&7],@X[2]); # byte swap
551 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions
556 &pshufb (@X[($Xi-3)&7],@X[2]);
559 &paddd (@X[($Xi-4)&7],@Tx[1]);
564 &movdqa (eval(16*$Xi)."(%rsp)",@X[($Xi-4)&7]); # X[]+K xfer to IALU
567 &psubd (@X[($Xi-4)&7],@Tx[1]);
569 foreach (@insns) { eval; }
576 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions
579 foreach (@insns) { eval; }
584 '($a,$b,$c,$d,$e)=@V;'.
585 '&add ($e,eval(4*($j&15))."(%rsp)");', # X[]+K xfer
587 '&mov (@T[1],$a);', # $b in next round
589 '&and (@T[0],$c);', # ($b&($c^$d))
590 '&xor ($c,$d);', # restore $c
593 '&$_ror ($b,$j?7:2);', # $b>>>2
594 '&add ($e,@T[0]);' .'$j++; unshift(@V,pop(@V)); unshift(@T,pop(@T));'
600 '($a,$b,$c,$d,$e)=@V;'.
601 '&add ($e,eval(4*($j++&15))."(%rsp)");', # X[]+K xfer
602 '&xor (@T[0],$d);', # ($b^$d)
603 '&mov (@T[1],$a);', # $b in next round
605 '&xor (@T[0],$c);', # ($b^$d^$c)
607 '&$_ror ($b,7);', # $b>>>2
608 '&add ($e,@T[0]);' .'unshift(@V,pop(@V)); unshift(@T,pop(@T));'
614 '($a,$b,$c,$d,$e)=@V;'.
617 '&add ($e,eval(4*($j++&15))."(%rsp)");', # X[]+K xfer
619 '&and (@T[0],$c);', # ($b&($c^$d))
620 '&$_ror ($b,7);', # $b>>>2
622 '&mov (@T[1],$a);', # $b in next round
625 '&xor ($c,$d);', # restore $c
626 '&add ($e,$a);' .'unshift(@V,pop(@V)); unshift(@T,pop(@T));'
633 &Xupdate_ssse3_16_31(\&body_00_19);
634 &Xupdate_ssse3_16_31(\&body_00_19);
635 &Xupdate_ssse3_16_31(\&body_00_19);
636 &Xupdate_ssse3_16_31(\&body_00_19);
637 &Xupdate_ssse3_32_79(\&body_00_19);
638 &Xupdate_ssse3_32_79(\&body_20_39);
639 &Xupdate_ssse3_32_79(\&body_20_39);
640 &Xupdate_ssse3_32_79(\&body_20_39);
641 &Xupdate_ssse3_32_79(\&body_20_39);
642 &Xupdate_ssse3_32_79(\&body_20_39);
643 &Xupdate_ssse3_32_79(\&body_40_59);
644 &Xupdate_ssse3_32_79(\&body_40_59);
645 &Xupdate_ssse3_32_79(\&body_40_59);
646 &Xupdate_ssse3_32_79(\&body_40_59);
647 &Xupdate_ssse3_32_79(\&body_40_59);
648 &Xupdate_ssse3_32_79(\&body_20_39);
649 &Xuplast_ssse3_80(\&body_20_39); # can jump to "done"
651 $saved_j=$j; @saved_V=@V;
653 &Xloop_ssse3(\&body_20_39);
654 &Xloop_ssse3(\&body_20_39);
655 &Xloop_ssse3(\&body_20_39);
658 add 0($ctx),$A # update context
665 mov @T[0],$B # magic seed
674 $j=$saved_j; @V=@saved_V;
676 &Xtail_ssse3(\&body_20_39);
677 &Xtail_ssse3(\&body_20_39);
678 &Xtail_ssse3(\&body_20_39);
681 add 0($ctx),$A # update context
692 $code.=<<___ if ($win64);
693 movaps 64+0(%rsp),%xmm6
694 movaps 64+16(%rsp),%xmm7
695 movaps 64+32(%rsp),%xmm8
696 movaps 64+48(%rsp),%xmm9
697 movaps 64+64(%rsp),%xmm10
700 lea `64+($win64?6*16:0)`(%rsp),%rsi
707 .size sha1_block_data_order_ssse3,.-sha1_block_data_order_ssse3
712 my @X=map("%xmm$_",(4..7,0..3));
713 my @Tx=map("%xmm$_",(8..10));
714 my @V=($A,$B,$C,$D,$E)=("%eax","%ebx","%ecx","%edx","%ebp"); # size optimization
715 my @T=("%esi","%edi");
719 my $_rol=sub { &shld(@_[0],@_) };
720 my $_ror=sub { &shrd(@_[0],@_) };
723 .type sha1_block_data_order_avx,\@function,3
725 sha1_block_data_order_avx:
730 lea `-64-($win64?5*16:0)`(%rsp),%rsp
732 $code.=<<___ if ($win64);
733 movaps %xmm6,64+0(%rsp)
734 movaps %xmm7,64+16(%rsp)
735 movaps %xmm8,64+32(%rsp)
736 movaps %xmm9,64+48(%rsp)
737 movaps %xmm10,64+64(%rsp)
741 mov %rdi,$ctx # reassigned argument
742 mov %rsi,$inp # reassigned argument
743 mov %rdx,$num # reassigned argument
748 lea K_XX_XX(%rip),$K_XX_XX
750 mov 0($ctx),$A # load context
754 mov $B,@T[0] # magic seed
757 vmovdqa 64($K_XX_XX),@X[2] # pbswap mask
758 vmovdqa 0($K_XX_XX),@Tx[1] # K_00_19
759 vmovdqu 0($inp),@X[-4&7] # load input to %xmm[0-3]
760 vmovdqu 16($inp),@X[-3&7]
761 vmovdqu 32($inp),@X[-2&7]
762 vmovdqu 48($inp),@X[-1&7]
763 vpshufb @X[2],@X[-4&7],@X[-4&7] # byte swap
765 vpshufb @X[2],@X[-3&7],@X[-3&7]
766 vpshufb @X[2],@X[-2&7],@X[-2&7]
767 vpshufb @X[2],@X[-1&7],@X[-1&7]
768 vpaddd @Tx[1],@X[-4&7],@X[0] # add K_00_19
769 vpaddd @Tx[1],@X[-3&7],@X[1]
770 vpaddd @Tx[1],@X[-2&7],@X[2]
771 vmovdqa @X[0],0(%rsp) # X[]+K xfer to IALU
772 vmovdqa @X[1],16(%rsp)
773 vmovdqa @X[2],32(%rsp)
777 sub Xupdate_avx_16_31() # recall that $Xi starts wtih 4
780 my @insns = (&$body,&$body,&$body,&$body); # 40 instructions
785 &vpalignr(@X[0],@X[-3&7],@X[-4&7],8); # compose "X[-14]" in "X[0]"
789 &vpaddd (@Tx[1],@Tx[1],@X[-1&7]);
792 &vpsrldq(@Tx[0],@X[-1&7],4); # "X[-3]", 3 dwords
795 &vpxor (@X[0],@X[0],@X[-4&7]); # "X[0]"^="X[-16]"
799 &vpxor (@Tx[0],@Tx[0],@X[-2&7]); # "X[-3]"^"X[-8]"
805 &vpxor (@X[0],@X[0],@Tx[0]); # "X[0]"^="X[-3]"^"X[-8]"
808 &vmovdqa (eval(16*(($Xi-1)&3))."(%rsp)",@Tx[1]); # X[]+K xfer to IALU
812 &vpsrld (@Tx[0],@X[0],31);
818 &vpslldq(@Tx[2],@X[0],12); # "X[0]"<<96, extract one dword
819 &vpaddd (@X[0],@X[0],@X[0]);
825 &vpsrld (@Tx[1],@Tx[2],30);
826 &vpor (@X[0],@X[0],@Tx[0]); # "X[0]"<<<=1
832 &vpslld (@Tx[2],@Tx[2],2);
833 &vpxor (@X[0],@X[0],@Tx[1]);
839 &vpxor (@X[0],@X[0],@Tx[2]); # "X[0]"^=("X[0]">>96)<<<2
842 &vmovdqa (@Tx[2],eval(16*(($Xi)/5))."($K_XX_XX)"); # K_XX_XX
847 foreach (@insns) { eval; } # remaining instructions [if any]
849 $Xi++; push(@X,shift(@X)); # "rotate" X[]
850 push(@Tx,shift(@Tx));
853 sub Xupdate_avx_32_79()
856 my @insns = (&$body,&$body,&$body,&$body); # 32 to 48 instructions
859 &vpalignr(@Tx[0],@X[-1&7],@X[-2&7],8); # compose "X[-6]"
860 &vpxor (@X[0],@X[0],@X[-4&7]); # "X[0]"="X[-32]"^"X[-16]"
861 eval(shift(@insns)); # body_20_39
864 eval(shift(@insns)); # rol
866 &vpxor (@X[0],@X[0],@X[-7&7]); # "X[0]"^="X[-28]"
868 eval(shift(@insns)) if (@insns[0] !~ /&ro[rl]/);
870 &vmovdqa (@Tx[2],@Tx[1]);# "perpetuate" K_XX_XX...
871 } else { # ... or load next one
872 &vmovdqa (@Tx[2],eval(16*($Xi/5))."($K_XX_XX)");
874 &vpaddd (@Tx[1],@Tx[1],@X[-1&7]);
875 eval(shift(@insns)); # ror
878 &vpxor (@X[0],@X[0],@Tx[0]); # "X[0]"^="X[-6]"
879 eval(shift(@insns)); # body_20_39
882 eval(shift(@insns)); # rol
884 &vpsrld (@Tx[0],@X[0],30);
885 &vmovdqa (eval(16*(($Xi-1)&3))."(%rsp)",@Tx[1]); # X[]+K xfer to IALU
888 eval(shift(@insns)); # ror
891 &vpslld (@X[0],@X[0],2);
892 eval(shift(@insns)); # body_20_39
895 eval(shift(@insns)); # rol
898 eval(shift(@insns)); # ror
901 &vpor (@X[0],@X[0],@Tx[0]); # "X[0]"<<<=2
902 eval(shift(@insns)); # body_20_39
904 &vmovdqa (@Tx[1],@X[0]) if ($Xi<19);
906 eval(shift(@insns)); # rol
909 eval(shift(@insns)); # rol
912 foreach (@insns) { eval; } # remaining instructions
914 $Xi++; push(@X,shift(@X)); # "rotate" X[]
915 push(@Tx,shift(@Tx));
921 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions
925 &vpaddd (@Tx[1],@Tx[1],@X[-1&7]);
931 &movdqa (eval(16*(($Xi-1)&3))."(%rsp)",@Tx[1]); # X[]+K xfer IALU
933 foreach (@insns) { eval; } # remaining instructions
938 unshift(@Tx,pop(@Tx));
940 &vmovdqa(@X[2],"64($K_XX_XX)"); # pbswap mask
941 &vmovdqa(@Tx[1],"0($K_XX_XX)"); # K_00_19
942 &vmovdqu(@X[-4&7],"0($inp)"); # load input
943 &vmovdqu(@X[-3&7],"16($inp)");
944 &vmovdqu(@X[-2&7],"32($inp)");
945 &vmovdqu(@X[-1&7],"48($inp)");
946 &vpshufb(@X[-4&7],@X[-4&7],@X[2]); # byte swap
955 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions
960 &vpshufb(@X[($Xi-3)&7],@X[($Xi-3)&7],@X[2]);
963 &vpaddd (@X[$Xi&7],@X[($Xi-4)&7],@Tx[1]);
968 &vmovdqa(eval(16*$Xi)."(%rsp)",@X[$Xi&7]); # X[]+K xfer to IALU
972 foreach (@insns) { eval; }
979 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions
982 foreach (@insns) { eval; }
989 &Xupdate_avx_16_31(\&body_00_19);
990 &Xupdate_avx_16_31(\&body_00_19);
991 &Xupdate_avx_16_31(\&body_00_19);
992 &Xupdate_avx_16_31(\&body_00_19);
993 &Xupdate_avx_32_79(\&body_00_19);
994 &Xupdate_avx_32_79(\&body_20_39);
995 &Xupdate_avx_32_79(\&body_20_39);
996 &Xupdate_avx_32_79(\&body_20_39);
997 &Xupdate_avx_32_79(\&body_20_39);
998 &Xupdate_avx_32_79(\&body_20_39);
999 &Xupdate_avx_32_79(\&body_40_59);
1000 &Xupdate_avx_32_79(\&body_40_59);
1001 &Xupdate_avx_32_79(\&body_40_59);
1002 &Xupdate_avx_32_79(\&body_40_59);
1003 &Xupdate_avx_32_79(\&body_40_59);
1004 &Xupdate_avx_32_79(\&body_20_39);
1005 &Xuplast_avx_80(\&body_20_39); # can jump to "done"
1007 $saved_j=$j; @saved_V=@V;
1009 &Xloop_avx(\&body_20_39);
1010 &Xloop_avx(\&body_20_39);
1011 &Xloop_avx(\&body_20_39);
1014 add 0($ctx),$A # update context
1021 mov @T[0],$B # magic seed
1030 $j=$saved_j; @V=@saved_V;
1032 &Xtail_avx(\&body_20_39);
1033 &Xtail_avx(\&body_20_39);
1034 &Xtail_avx(\&body_20_39);
1039 add 0($ctx),$A # update context
1050 $code.=<<___ if ($win64);
1051 movaps 64+0(%rsp),%xmm6
1052 movaps 64+16(%rsp),%xmm7
1053 movaps 64+32(%rsp),%xmm8
1054 movaps 64+48(%rsp),%xmm9
1055 movaps 64+64(%rsp),%xmm10
1058 lea `64+($win64?6*16:0)`(%rsp),%rsi
1065 .size sha1_block_data_order_avx,.-sha1_block_data_order_avx
1071 .long 0x5a827999,0x5a827999,0x5a827999,0x5a827999 # K_00_19
1072 .long 0x6ed9eba1,0x6ed9eba1,0x6ed9eba1,0x6ed9eba1 # K_20_39
1073 .long 0x8f1bbcdc,0x8f1bbcdc,0x8f1bbcdc,0x8f1bbcdc # K_40_59
1074 .long 0xca62c1d6,0xca62c1d6,0xca62c1d6,0xca62c1d6 # K_60_79
1075 .long 0x00010203,0x04050607,0x08090a0b,0x0c0d0e0f # pbswap mask
1079 .asciz "SHA1 block transform for x86_64, CRYPTOGAMS by <appro\@openssl.org>"
1083 # EXCEPTION_DISPOSITION handler (EXCEPTION_RECORD *rec,ULONG64 frame,
1084 # CONTEXT *context,DISPATCHER_CONTEXT *disp)
1092 .extern __imp_RtlVirtualUnwind
1093 .type se_handler,\@abi-omnipotent
1107 mov 120($context),%rax # pull context->Rax
1108 mov 248($context),%rbx # pull context->Rip
1110 lea .Lprologue(%rip),%r10
1111 cmp %r10,%rbx # context->Rip<.Lprologue
1112 jb .Lcommon_seh_tail
1114 mov 152($context),%rax # pull context->Rsp
1116 lea .Lepilogue(%rip),%r10
1117 cmp %r10,%rbx # context->Rip>=.Lepilogue
1118 jae .Lcommon_seh_tail
1120 mov `16*4`(%rax),%rax # pull saved stack pointer
1127 mov %rbx,144($context) # restore context->Rbx
1128 mov %rbp,160($context) # restore context->Rbp
1129 mov %r12,216($context) # restore context->R12
1130 mov %r13,224($context) # restore context->R13
1132 jmp .Lcommon_seh_tail
1133 .size se_handler,.-se_handler
1135 .type ssse3_handler,\@abi-omnipotent
1149 mov 120($context),%rax # pull context->Rax
1150 mov 248($context),%rbx # pull context->Rip
1152 mov 8($disp),%rsi # disp->ImageBase
1153 mov 56($disp),%r11 # disp->HandlerData
1155 mov 0(%r11),%r10d # HandlerData[0]
1156 lea (%rsi,%r10),%r10 # prologue label
1157 cmp %r10,%rbx # context->Rip<prologue label
1158 jb .Lcommon_seh_tail
1160 mov 152($context),%rax # pull context->Rsp
1162 mov 4(%r11),%r10d # HandlerData[1]
1163 lea (%rsi,%r10),%r10 # epilogue label
1164 cmp %r10,%rbx # context->Rip>=epilogue label
1165 jae .Lcommon_seh_tail
1168 lea 512($context),%rdi # &context.Xmm6
1170 .long 0xa548f3fc # cld; rep movsq
1171 lea 24+5*16(%rax),%rax # adjust stack pointer
1175 mov %rbx,144($context) # restore context->Rbx
1176 mov %rbp,160($context) # restore context->Rbp
1181 mov %rax,152($context) # restore context->Rsp
1182 mov %rsi,168($context) # restore context->Rsi
1183 mov %rdi,176($context) # restore context->Rdi
1185 mov 40($disp),%rdi # disp->ContextRecord
1186 mov $context,%rsi # context
1187 mov \$154,%ecx # sizeof(CONTEXT)
1188 .long 0xa548f3fc # cld; rep movsq
1191 xor %rcx,%rcx # arg1, UNW_FLAG_NHANDLER
1192 mov 8(%rsi),%rdx # arg2, disp->ImageBase
1193 mov 0(%rsi),%r8 # arg3, disp->ControlPc
1194 mov 16(%rsi),%r9 # arg4, disp->FunctionEntry
1195 mov 40(%rsi),%r10 # disp->ContextRecord
1196 lea 56(%rsi),%r11 # &disp->HandlerData
1197 lea 24(%rsi),%r12 # &disp->EstablisherFrame
1198 mov %r10,32(%rsp) # arg5
1199 mov %r11,40(%rsp) # arg6
1200 mov %r12,48(%rsp) # arg7
1201 mov %rcx,56(%rsp) # arg8, (NULL)
1202 call *__imp_RtlVirtualUnwind(%rip)
1204 mov \$1,%eax # ExceptionContinueSearch
1216 .size ssse3_handler,.-ssse3_handler
1220 .rva .LSEH_begin_sha1_block_data_order
1221 .rva .LSEH_end_sha1_block_data_order
1222 .rva .LSEH_info_sha1_block_data_order
1223 .rva .LSEH_begin_sha1_block_data_order_ssse3
1224 .rva .LSEH_end_sha1_block_data_order_ssse3
1225 .rva .LSEH_info_sha1_block_data_order_ssse3
1227 $code.=<<___ if ($avx);
1228 .rva .LSEH_begin_sha1_block_data_order_avx
1229 .rva .LSEH_end_sha1_block_data_order_avx
1230 .rva .LSEH_info_sha1_block_data_order_avx
1235 .LSEH_info_sha1_block_data_order:
1238 .LSEH_info_sha1_block_data_order_ssse3:
1241 .rva .Lprologue_ssse3,.Lepilogue_ssse3 # HandlerData[]
1243 $code.=<<___ if ($avx);
1244 .LSEH_info_sha1_block_data_order_avx:
1247 .rva .Lprologue_avx,.Lepilogue_avx # HandlerData[]
1251 ####################################################################
1253 $code =~ s/\`([^\`]*)\`/eval $1/gem;