3 # ====================================================================
4 # Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
5 # project. The module is, however, dual licensed under OpenSSL and
6 # CRYPTOGAMS licenses depending on where you obtain it. For further
7 # details see http://www.openssl.org/~appro/cryptogams/.
8 # ====================================================================
10 # sha1_block procedure for x86_64.
12 # It was brought to my attention that on EM64T compiler-generated code
13 # was far behind 32-bit assembler implementation. This is unlike on
14 # Opteron where compiler-generated code was only 15% behind 32-bit
15 # assembler, which originally made it hard to motivate the effort.
16 # There was suggestion to mechanically translate 32-bit code, but I
17 # dismissed it, reasoning that x86_64 offers enough register bank
18 # capacity to fully utilize SHA-1 parallelism. Therefore this fresh
19 # implementation:-) However! While 64-bit code does perform better
20 # on Opteron, I failed to beat 32-bit assembler on EM64T core. Well,
21 # x86_64 does offer larger *addressable* bank, but out-of-order core
22 # reaches for even more registers through dynamic aliasing, and EM64T
23 # core must have managed to run-time optimize even 32-bit code just as
24 # good as 64-bit one. Performance improvement is summarized in the
27 # gcc 3.4 32-bit asm cycles/byte
28 # Opteron +45% +20% 6.8
29 # Xeon P4 +65% +0% 9.9
34 # The code was revised to minimize code size and to maximize
35 # "distance" between instructions producing input to 'lea'
36 # instruction and the 'lea' instruction itself, which is essential
37 # for Intel Atom core.
41 # Add SSSE3, Supplemental[!] SSE3, implementation. The idea behind it
42 # is to offload message schedule denoted by Wt in NIST specification,
43 # or Xupdate in OpenSSL source, to SIMD unit. See sha1-586.pl module
44 # for background and implementation details. The only difference from
45 # 32-bit code is that 64-bit code doesn't have to spill @X[] elements
46 # to free temporary registers.
50 # Add AVX code path. See sha1-586.pl for further information.
52 ######################################################################
53 # Current performance is summarized in following table. Numbers are
54 # CPU clock cycles spent to process single byte (less is better).
59 # Core2 6.7 6.1/+10% -
60 # Atom 11.0 9.7/+13% -
61 # Westmere 7.1 5.6/+27% -
62 # Sandy Bridge 7.9 6.3/+25% 5.2/+51%
63 # Ivy Bridge 6.4 4.8/+33% 4.7/+36%
64 # Bulldozer 10.9 6.1/+79%
65 # VIA Nano 10.2 7.4/+38%
69 if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
71 $win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
73 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
74 ( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
75 ( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
76 die "can't locate x86_64-xlate.pl";
78 $avx=1 if (`$ENV{CC} -Wa,-v -c -o /dev/null -x assembler /dev/null 2>&1`
79 =~ /GNU assembler version ([2-9]\.[0-9]+)/ &&
81 $avx=1 if (!$avx && $win64 && ($flavour =~ /nasm/ || $ENV{ASM} =~ /nasm/) &&
82 `nasm -v 2>&1` =~ /NASM version ([2-9]\.[0-9]+)/ &&
84 $avx=1 if (!$avx && $win64 && ($flavour =~ /masm/ || $ENV{ASM} =~ /ml64/) &&
85 `ml64 2>&1` =~ /Version ([0-9]+)\./ &&
88 open STDOUT,"| \"$^X\" $xlate $flavour $output";
90 $ctx="%rdi"; # 1st arg
91 $inp="%rsi"; # 2nd arg
92 $num="%rdx"; # 3rd arg
94 # reassign arguments in order to produce more compact code
112 my ($i,$a,$b,$c,$d,$e)=@_;
114 $code.=<<___ if ($i==0);
115 mov `4*$i`($inp),$xi[0]
117 mov $xi[0],`4*$i`(%rsp)
119 $code.=<<___ if ($i<15);
121 mov `4*$j`($inp),$xi[1]
126 lea 0x5a827999($xi[0],$e),$e
128 mov $xi[1],`4*$j`(%rsp)
134 $code.=<<___ if ($i>=15);
135 mov `4*($j%16)`(%rsp),$xi[1]
138 xor `4*(($j+2)%16)`(%rsp),$xi[1]
141 xor `4*(($j+8)%16)`(%rsp),$xi[1]
143 lea 0x5a827999($xi[0],$e),$e
144 xor `4*(($j+13)%16)`(%rsp),$xi[1]
149 mov $xi[1],`4*($j%16)`(%rsp)
152 unshift(@xi,pop(@xi));
156 my ($i,$a,$b,$c,$d,$e)=@_;
158 my $K=($i<40)?0x6ed9eba1:0xca62c1d6;
159 $code.=<<___ if ($i<79);
160 mov `4*($j%16)`(%rsp),$xi[1]
163 xor `4*(($j+2)%16)`(%rsp),$xi[1]
167 xor `4*(($j+8)%16)`(%rsp),$xi[1]
170 xor `4*(($j+13)%16)`(%rsp),$xi[1]
175 $code.=<<___ if ($i<76);
176 mov $xi[1],`4*($j%16)`(%rsp)
178 $code.=<<___ if ($i==79);
189 unshift(@xi,pop(@xi));
193 my ($i,$a,$b,$c,$d,$e)=@_;
196 mov `4*($j%16)`(%rsp),$xi[1]
199 xor `4*(($j+2)%16)`(%rsp),$xi[1]
202 xor `4*(($j+8)%16)`(%rsp),$xi[1]
204 lea 0x8f1bbcdc($xi[0],$e),$e
206 xor `4*(($j+13)%16)`(%rsp),$xi[1]
212 mov $xi[1],`4*($j%16)`(%rsp)
215 unshift(@xi,pop(@xi));
220 .extern OPENSSL_ia32cap_P
222 .globl sha1_block_data_order
223 .type sha1_block_data_order,\@function,3
225 sha1_block_data_order:
226 mov OPENSSL_ia32cap_P+0(%rip),%r9d
227 mov OPENSSL_ia32cap_P+4(%rip),%r8d
228 test \$`1<<9`,%r8d # check SSSE3 bit
231 $code.=<<___ if ($avx);
232 and \$`1<<28`,%r8d # mask AVX bit
233 and \$`1<<30`,%r9d # mask "Intel CPU" bit
235 cmp \$`1<<28|1<<30`,%r8d
248 mov %rdi,$ctx # reassigned argument
250 mov %rsi,$inp # reassigned argument
252 mov %rdx,$num # reassigned argument
253 mov %r11,`16*4`(%rsp)
266 for($i=0;$i<20;$i++) { &BODY_00_19($i,@V); unshift(@V,pop(@V)); }
267 for(;$i<40;$i++) { &BODY_20_39($i,@V); unshift(@V,pop(@V)); }
268 for(;$i<60;$i++) { &BODY_40_59($i,@V); unshift(@V,pop(@V)); }
269 for(;$i<80;$i++) { &BODY_20_39($i,@V); unshift(@V,pop(@V)); }
283 lea `16*4`($inp),$inp
286 mov `16*4`(%rsp),%rsi
294 .size sha1_block_data_order,.-sha1_block_data_order
298 my @X=map("%xmm$_",(4..7,0..3));
299 my @Tx=map("%xmm$_",(8..10));
300 my @V=($A,$B,$C,$D,$E)=("%eax","%ebx","%ecx","%edx","%ebp"); # size optimization
301 my @T=("%esi","%edi");
305 my $_rol=sub { &rol(@_) };
306 my $_ror=sub { &ror(@_) };
309 .type sha1_block_data_order_ssse3,\@function,3
311 sha1_block_data_order_ssse3:
316 lea `-64-($win64?5*16:0)`(%rsp),%rsp
318 $code.=<<___ if ($win64);
319 movaps %xmm6,64+0(%rsp)
320 movaps %xmm7,64+16(%rsp)
321 movaps %xmm8,64+32(%rsp)
322 movaps %xmm9,64+48(%rsp)
323 movaps %xmm10,64+64(%rsp)
327 mov %rdi,$ctx # reassigned argument
328 mov %rsi,$inp # reassigned argument
329 mov %rdx,$num # reassigned argument
333 lea K_XX_XX(%rip),$K_XX_XX
335 mov 0($ctx),$A # load context
339 mov $B,@T[0] # magic seed
342 movdqa 64($K_XX_XX),@X[2] # pbswap mask
343 movdqa 0($K_XX_XX),@Tx[1] # K_00_19
344 movdqu 0($inp),@X[-4&7] # load input to %xmm[0-3]
345 movdqu 16($inp),@X[-3&7]
346 movdqu 32($inp),@X[-2&7]
347 movdqu 48($inp),@X[-1&7]
348 pshufb @X[2],@X[-4&7] # byte swap
350 pshufb @X[2],@X[-3&7]
351 pshufb @X[2],@X[-2&7]
352 pshufb @X[2],@X[-1&7]
353 paddd @Tx[1],@X[-4&7] # add K_00_19
354 paddd @Tx[1],@X[-3&7]
355 paddd @Tx[1],@X[-2&7]
356 movdqa @X[-4&7],0(%rsp) # X[]+K xfer to IALU
357 psubd @Tx[1],@X[-4&7] # restore X[]
358 movdqa @X[-3&7],16(%rsp)
359 psubd @Tx[1],@X[-3&7]
360 movdqa @X[-2&7],32(%rsp)
361 psubd @Tx[1],@X[-2&7]
365 sub AUTOLOAD() # thunk [simplified] 32-bit style perlasm
366 { my $opcode = $AUTOLOAD; $opcode =~ s/.*:://;
368 $arg = "\$$arg" if ($arg*1 eq $arg);
369 $code .= "\t$opcode\t".join(',',$arg,reverse @_)."\n";
372 sub Xupdate_ssse3_16_31() # recall that $Xi starts wtih 4
375 my @insns = (&$body,&$body,&$body,&$body); # 40 instructions
378 &movdqa (@X[0],@X[-3&7]);
381 &movdqa (@Tx[0],@X[-1&7]);
382 &palignr(@X[0],@X[-4&7],8); # compose "X[-14]" in "X[0]"
386 &paddd (@Tx[1],@X[-1&7]);
389 &psrldq (@Tx[0],4); # "X[-3]", 3 dwords
392 &pxor (@X[0],@X[-4&7]); # "X[0]"^="X[-16]"
396 &pxor (@Tx[0],@X[-2&7]); # "X[-3]"^"X[-8]"
402 &pxor (@X[0],@Tx[0]); # "X[0]"^="X[-3]"^"X[-8]"
405 &movdqa (eval(16*(($Xi-1)&3))."(%rsp)",@Tx[1]); # X[]+K xfer to IALU
409 &movdqa (@Tx[2],@X[0]);
410 &movdqa (@Tx[0],@X[0]);
416 &pslldq (@Tx[2],12); # "X[0]"<<96, extract one dword
417 &paddd (@X[0],@X[0]);
426 &movdqa (@Tx[1],@Tx[2]);
431 &por (@X[0],@Tx[0]); # "X[0]"<<<=1
438 &pxor (@X[0],@Tx[2]);
441 &movdqa (@Tx[2],eval(16*(($Xi)/5))."($K_XX_XX)"); # K_XX_XX
445 &pxor (@X[0],@Tx[1]); # "X[0]"^=("X[0]">>96)<<<2
447 foreach (@insns) { eval; } # remaining instructions [if any]
449 $Xi++; push(@X,shift(@X)); # "rotate" X[]
450 push(@Tx,shift(@Tx));
453 sub Xupdate_ssse3_32_79()
456 my @insns = (&$body,&$body,&$body,&$body); # 32 to 48 instructions
459 &movdqa (@Tx[0],@X[-1&7]) if ($Xi==8);
460 eval(shift(@insns)); # body_20_39
461 &pxor (@X[0],@X[-4&7]); # "X[0]"="X[-32]"^"X[-16]"
462 &palignr(@Tx[0],@X[-2&7],8); # compose "X[-6]"
465 eval(shift(@insns)); # rol
467 &pxor (@X[0],@X[-7&7]); # "X[0]"^="X[-28]"
469 eval(shift(@insns)) if (@insns[0] !~ /&ro[rl]/);
471 &movdqa (@Tx[2],@Tx[1]);# "perpetuate" K_XX_XX...
472 } else { # ... or load next one
473 &movdqa (@Tx[2],eval(16*($Xi/5))."($K_XX_XX)");
475 &paddd (@Tx[1],@X[-1&7]);
476 eval(shift(@insns)); # ror
479 &pxor (@X[0],@Tx[0]); # "X[0]"^="X[-6]"
480 eval(shift(@insns)); # body_20_39
483 eval(shift(@insns)); # rol
485 &movdqa (@Tx[0],@X[0]);
486 &movdqa (eval(16*(($Xi-1)&3))."(%rsp)",@Tx[1]); # X[]+K xfer to IALU
489 eval(shift(@insns)); # ror
493 eval(shift(@insns)); # body_20_39
497 eval(shift(@insns)); # rol
500 eval(shift(@insns)); # ror
503 &por (@X[0],@Tx[0]); # "X[0]"<<<=2
504 eval(shift(@insns)); # body_20_39
506 &movdqa (@Tx[1],@X[0]) if ($Xi<19);
508 eval(shift(@insns)); # rol
511 eval(shift(@insns)); # rol
514 foreach (@insns) { eval; } # remaining instructions
516 $Xi++; push(@X,shift(@X)); # "rotate" X[]
517 push(@Tx,shift(@Tx));
520 sub Xuplast_ssse3_80()
523 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions
527 &paddd (@Tx[1],@X[-1&7]);
533 &movdqa (eval(16*(($Xi-1)&3))."(%rsp)",@Tx[1]); # X[]+K xfer IALU
535 foreach (@insns) { eval; } # remaining instructions
538 &je (".Ldone_ssse3");
540 unshift(@Tx,pop(@Tx));
542 &movdqa (@X[2],"64($K_XX_XX)"); # pbswap mask
543 &movdqa (@Tx[1],"0($K_XX_XX)"); # K_00_19
544 &movdqu (@X[-4&7],"0($inp)"); # load input
545 &movdqu (@X[-3&7],"16($inp)");
546 &movdqu (@X[-2&7],"32($inp)");
547 &movdqu (@X[-1&7],"48($inp)");
548 &pshufb (@X[-4&7],@X[2]); # byte swap
557 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions
562 &pshufb (@X[($Xi-3)&7],@X[2]);
565 &paddd (@X[($Xi-4)&7],@Tx[1]);
570 &movdqa (eval(16*$Xi)."(%rsp)",@X[($Xi-4)&7]); # X[]+K xfer to IALU
573 &psubd (@X[($Xi-4)&7],@Tx[1]);
575 foreach (@insns) { eval; }
582 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions
585 foreach (@insns) { eval; }
590 '($a,$b,$c,$d,$e)=@V;'.
591 '&add ($e,eval(4*($j&15))."(%rsp)");', # X[]+K xfer
593 '&mov (@T[1],$a);', # $b in next round
595 '&and (@T[0],$c);', # ($b&($c^$d))
596 '&xor ($c,$d);', # restore $c
599 '&$_ror ($b,$j?7:2);', # $b>>>2
600 '&add ($e,@T[0]);' .'$j++; unshift(@V,pop(@V)); unshift(@T,pop(@T));'
606 '($a,$b,$c,$d,$e)=@V;'.
607 '&add ($e,eval(4*($j++&15))."(%rsp)");', # X[]+K xfer
608 '&xor (@T[0],$d);', # ($b^$d)
609 '&mov (@T[1],$a);', # $b in next round
611 '&xor (@T[0],$c);', # ($b^$d^$c)
613 '&$_ror ($b,7);', # $b>>>2
614 '&add ($e,@T[0]);' .'unshift(@V,pop(@V)); unshift(@T,pop(@T));'
620 '($a,$b,$c,$d,$e)=@V;'.
623 '&add ($e,eval(4*($j++&15))."(%rsp)");', # X[]+K xfer
625 '&and (@T[0],$c);', # ($b&($c^$d))
626 '&$_ror ($b,7);', # $b>>>2
628 '&mov (@T[1],$a);', # $b in next round
631 '&xor ($c,$d);', # restore $c
632 '&add ($e,$a);' .'unshift(@V,pop(@V)); unshift(@T,pop(@T));'
639 &Xupdate_ssse3_16_31(\&body_00_19);
640 &Xupdate_ssse3_16_31(\&body_00_19);
641 &Xupdate_ssse3_16_31(\&body_00_19);
642 &Xupdate_ssse3_16_31(\&body_00_19);
643 &Xupdate_ssse3_32_79(\&body_00_19);
644 &Xupdate_ssse3_32_79(\&body_20_39);
645 &Xupdate_ssse3_32_79(\&body_20_39);
646 &Xupdate_ssse3_32_79(\&body_20_39);
647 &Xupdate_ssse3_32_79(\&body_20_39);
648 &Xupdate_ssse3_32_79(\&body_20_39);
649 &Xupdate_ssse3_32_79(\&body_40_59);
650 &Xupdate_ssse3_32_79(\&body_40_59);
651 &Xupdate_ssse3_32_79(\&body_40_59);
652 &Xupdate_ssse3_32_79(\&body_40_59);
653 &Xupdate_ssse3_32_79(\&body_40_59);
654 &Xupdate_ssse3_32_79(\&body_20_39);
655 &Xuplast_ssse3_80(\&body_20_39); # can jump to "done"
657 $saved_j=$j; @saved_V=@V;
659 &Xloop_ssse3(\&body_20_39);
660 &Xloop_ssse3(\&body_20_39);
661 &Xloop_ssse3(\&body_20_39);
664 add 0($ctx),$A # update context
671 mov @T[0],$B # magic seed
680 $j=$saved_j; @V=@saved_V;
682 &Xtail_ssse3(\&body_20_39);
683 &Xtail_ssse3(\&body_20_39);
684 &Xtail_ssse3(\&body_20_39);
687 add 0($ctx),$A # update context
698 $code.=<<___ if ($win64);
699 movaps 64+0(%rsp),%xmm6
700 movaps 64+16(%rsp),%xmm7
701 movaps 64+32(%rsp),%xmm8
702 movaps 64+48(%rsp),%xmm9
703 movaps 64+64(%rsp),%xmm10
706 lea `64+($win64?5*16:0)`(%rsp),%rsi
713 .size sha1_block_data_order_ssse3,.-sha1_block_data_order_ssse3
718 my @X=map("%xmm$_",(4..7,0..3));
719 my @Tx=map("%xmm$_",(8..10));
720 my @V=($A,$B,$C,$D,$E)=("%eax","%ebx","%ecx","%edx","%ebp"); # size optimization
721 my @T=("%esi","%edi");
725 my $_rol=sub { &shld(@_[0],@_) };
726 my $_ror=sub { &shrd(@_[0],@_) };
729 .type sha1_block_data_order_avx,\@function,3
731 sha1_block_data_order_avx:
736 lea `-64-($win64?5*16:0)`(%rsp),%rsp
738 $code.=<<___ if ($win64);
739 movaps %xmm6,64+0(%rsp)
740 movaps %xmm7,64+16(%rsp)
741 movaps %xmm8,64+32(%rsp)
742 movaps %xmm9,64+48(%rsp)
743 movaps %xmm10,64+64(%rsp)
747 mov %rdi,$ctx # reassigned argument
748 mov %rsi,$inp # reassigned argument
749 mov %rdx,$num # reassigned argument
754 lea K_XX_XX(%rip),$K_XX_XX
756 mov 0($ctx),$A # load context
760 mov $B,@T[0] # magic seed
763 vmovdqa 64($K_XX_XX),@X[2] # pbswap mask
764 vmovdqa 0($K_XX_XX),@Tx[1] # K_00_19
765 vmovdqu 0($inp),@X[-4&7] # load input to %xmm[0-3]
766 vmovdqu 16($inp),@X[-3&7]
767 vmovdqu 32($inp),@X[-2&7]
768 vmovdqu 48($inp),@X[-1&7]
769 vpshufb @X[2],@X[-4&7],@X[-4&7] # byte swap
771 vpshufb @X[2],@X[-3&7],@X[-3&7]
772 vpshufb @X[2],@X[-2&7],@X[-2&7]
773 vpshufb @X[2],@X[-1&7],@X[-1&7]
774 vpaddd @Tx[1],@X[-4&7],@X[0] # add K_00_19
775 vpaddd @Tx[1],@X[-3&7],@X[1]
776 vpaddd @Tx[1],@X[-2&7],@X[2]
777 vmovdqa @X[0],0(%rsp) # X[]+K xfer to IALU
778 vmovdqa @X[1],16(%rsp)
779 vmovdqa @X[2],32(%rsp)
783 sub Xupdate_avx_16_31() # recall that $Xi starts wtih 4
786 my @insns = (&$body,&$body,&$body,&$body); # 40 instructions
791 &vpalignr(@X[0],@X[-3&7],@X[-4&7],8); # compose "X[-14]" in "X[0]"
795 &vpaddd (@Tx[1],@Tx[1],@X[-1&7]);
798 &vpsrldq(@Tx[0],@X[-1&7],4); # "X[-3]", 3 dwords
801 &vpxor (@X[0],@X[0],@X[-4&7]); # "X[0]"^="X[-16]"
805 &vpxor (@Tx[0],@Tx[0],@X[-2&7]); # "X[-3]"^"X[-8]"
811 &vpxor (@X[0],@X[0],@Tx[0]); # "X[0]"^="X[-3]"^"X[-8]"
814 &vmovdqa (eval(16*(($Xi-1)&3))."(%rsp)",@Tx[1]); # X[]+K xfer to IALU
818 &vpsrld (@Tx[0],@X[0],31);
824 &vpslldq(@Tx[2],@X[0],12); # "X[0]"<<96, extract one dword
825 &vpaddd (@X[0],@X[0],@X[0]);
831 &vpsrld (@Tx[1],@Tx[2],30);
832 &vpor (@X[0],@X[0],@Tx[0]); # "X[0]"<<<=1
838 &vpslld (@Tx[2],@Tx[2],2);
839 &vpxor (@X[0],@X[0],@Tx[1]);
845 &vpxor (@X[0],@X[0],@Tx[2]); # "X[0]"^=("X[0]">>96)<<<2
848 &vmovdqa (@Tx[2],eval(16*(($Xi)/5))."($K_XX_XX)"); # K_XX_XX
853 foreach (@insns) { eval; } # remaining instructions [if any]
855 $Xi++; push(@X,shift(@X)); # "rotate" X[]
856 push(@Tx,shift(@Tx));
859 sub Xupdate_avx_32_79()
862 my @insns = (&$body,&$body,&$body,&$body); # 32 to 48 instructions
865 &vpalignr(@Tx[0],@X[-1&7],@X[-2&7],8); # compose "X[-6]"
866 &vpxor (@X[0],@X[0],@X[-4&7]); # "X[0]"="X[-32]"^"X[-16]"
867 eval(shift(@insns)); # body_20_39
870 eval(shift(@insns)); # rol
872 &vpxor (@X[0],@X[0],@X[-7&7]); # "X[0]"^="X[-28]"
874 eval(shift(@insns)) if (@insns[0] !~ /&ro[rl]/);
876 &vmovdqa (@Tx[2],@Tx[1]);# "perpetuate" K_XX_XX...
877 } else { # ... or load next one
878 &vmovdqa (@Tx[2],eval(16*($Xi/5))."($K_XX_XX)");
880 &vpaddd (@Tx[1],@Tx[1],@X[-1&7]);
881 eval(shift(@insns)); # ror
884 &vpxor (@X[0],@X[0],@Tx[0]); # "X[0]"^="X[-6]"
885 eval(shift(@insns)); # body_20_39
888 eval(shift(@insns)); # rol
890 &vpsrld (@Tx[0],@X[0],30);
891 &vmovdqa (eval(16*(($Xi-1)&3))."(%rsp)",@Tx[1]); # X[]+K xfer to IALU
894 eval(shift(@insns)); # ror
897 &vpslld (@X[0],@X[0],2);
898 eval(shift(@insns)); # body_20_39
901 eval(shift(@insns)); # rol
904 eval(shift(@insns)); # ror
907 &vpor (@X[0],@X[0],@Tx[0]); # "X[0]"<<<=2
908 eval(shift(@insns)); # body_20_39
910 &vmovdqa (@Tx[1],@X[0]) if ($Xi<19);
912 eval(shift(@insns)); # rol
915 eval(shift(@insns)); # rol
918 foreach (@insns) { eval; } # remaining instructions
920 $Xi++; push(@X,shift(@X)); # "rotate" X[]
921 push(@Tx,shift(@Tx));
927 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions
931 &vpaddd (@Tx[1],@Tx[1],@X[-1&7]);
937 &movdqa (eval(16*(($Xi-1)&3))."(%rsp)",@Tx[1]); # X[]+K xfer IALU
939 foreach (@insns) { eval; } # remaining instructions
944 unshift(@Tx,pop(@Tx));
946 &vmovdqa(@X[2],"64($K_XX_XX)"); # pbswap mask
947 &vmovdqa(@Tx[1],"0($K_XX_XX)"); # K_00_19
948 &vmovdqu(@X[-4&7],"0($inp)"); # load input
949 &vmovdqu(@X[-3&7],"16($inp)");
950 &vmovdqu(@X[-2&7],"32($inp)");
951 &vmovdqu(@X[-1&7],"48($inp)");
952 &vpshufb(@X[-4&7],@X[-4&7],@X[2]); # byte swap
961 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions
966 &vpshufb(@X[($Xi-3)&7],@X[($Xi-3)&7],@X[2]);
969 &vpaddd (@X[$Xi&7],@X[($Xi-4)&7],@Tx[1]);
974 &vmovdqa(eval(16*$Xi)."(%rsp)",@X[$Xi&7]); # X[]+K xfer to IALU
978 foreach (@insns) { eval; }
985 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions
988 foreach (@insns) { eval; }
995 &Xupdate_avx_16_31(\&body_00_19);
996 &Xupdate_avx_16_31(\&body_00_19);
997 &Xupdate_avx_16_31(\&body_00_19);
998 &Xupdate_avx_16_31(\&body_00_19);
999 &Xupdate_avx_32_79(\&body_00_19);
1000 &Xupdate_avx_32_79(\&body_20_39);
1001 &Xupdate_avx_32_79(\&body_20_39);
1002 &Xupdate_avx_32_79(\&body_20_39);
1003 &Xupdate_avx_32_79(\&body_20_39);
1004 &Xupdate_avx_32_79(\&body_20_39);
1005 &Xupdate_avx_32_79(\&body_40_59);
1006 &Xupdate_avx_32_79(\&body_40_59);
1007 &Xupdate_avx_32_79(\&body_40_59);
1008 &Xupdate_avx_32_79(\&body_40_59);
1009 &Xupdate_avx_32_79(\&body_40_59);
1010 &Xupdate_avx_32_79(\&body_20_39);
1011 &Xuplast_avx_80(\&body_20_39); # can jump to "done"
1013 $saved_j=$j; @saved_V=@V;
1015 &Xloop_avx(\&body_20_39);
1016 &Xloop_avx(\&body_20_39);
1017 &Xloop_avx(\&body_20_39);
1020 add 0($ctx),$A # update context
1027 mov @T[0],$B # magic seed
1036 $j=$saved_j; @V=@saved_V;
1038 &Xtail_avx(\&body_20_39);
1039 &Xtail_avx(\&body_20_39);
1040 &Xtail_avx(\&body_20_39);
1045 add 0($ctx),$A # update context
1056 $code.=<<___ if ($win64);
1057 movaps 64+0(%rsp),%xmm6
1058 movaps 64+16(%rsp),%xmm7
1059 movaps 64+32(%rsp),%xmm8
1060 movaps 64+48(%rsp),%xmm9
1061 movaps 64+64(%rsp),%xmm10
1064 lea `64+($win64?5*16:0)`(%rsp),%rsi
1071 .size sha1_block_data_order_avx,.-sha1_block_data_order_avx
1077 .long 0x5a827999,0x5a827999,0x5a827999,0x5a827999 # K_00_19
1078 .long 0x6ed9eba1,0x6ed9eba1,0x6ed9eba1,0x6ed9eba1 # K_20_39
1079 .long 0x8f1bbcdc,0x8f1bbcdc,0x8f1bbcdc,0x8f1bbcdc # K_40_59
1080 .long 0xca62c1d6,0xca62c1d6,0xca62c1d6,0xca62c1d6 # K_60_79
1081 .long 0x00010203,0x04050607,0x08090a0b,0x0c0d0e0f # pbswap mask
1085 .asciz "SHA1 block transform for x86_64, CRYPTOGAMS by <appro\@openssl.org>"
1089 # EXCEPTION_DISPOSITION handler (EXCEPTION_RECORD *rec,ULONG64 frame,
1090 # CONTEXT *context,DISPATCHER_CONTEXT *disp)
1098 .extern __imp_RtlVirtualUnwind
1099 .type se_handler,\@abi-omnipotent
1113 mov 120($context),%rax # pull context->Rax
1114 mov 248($context),%rbx # pull context->Rip
1116 lea .Lprologue(%rip),%r10
1117 cmp %r10,%rbx # context->Rip<.Lprologue
1118 jb .Lcommon_seh_tail
1120 mov 152($context),%rax # pull context->Rsp
1122 lea .Lepilogue(%rip),%r10
1123 cmp %r10,%rbx # context->Rip>=.Lepilogue
1124 jae .Lcommon_seh_tail
1126 mov `16*4`(%rax),%rax # pull saved stack pointer
1133 mov %rbx,144($context) # restore context->Rbx
1134 mov %rbp,160($context) # restore context->Rbp
1135 mov %r12,216($context) # restore context->R12
1136 mov %r13,224($context) # restore context->R13
1138 jmp .Lcommon_seh_tail
1139 .size se_handler,.-se_handler
1141 .type ssse3_handler,\@abi-omnipotent
1155 mov 120($context),%rax # pull context->Rax
1156 mov 248($context),%rbx # pull context->Rip
1158 mov 8($disp),%rsi # disp->ImageBase
1159 mov 56($disp),%r11 # disp->HandlerData
1161 mov 0(%r11),%r10d # HandlerData[0]
1162 lea (%rsi,%r10),%r10 # prologue label
1163 cmp %r10,%rbx # context->Rip<prologue label
1164 jb .Lcommon_seh_tail
1166 mov 152($context),%rax # pull context->Rsp
1168 mov 4(%r11),%r10d # HandlerData[1]
1169 lea (%rsi,%r10),%r10 # epilogue label
1170 cmp %r10,%rbx # context->Rip>=epilogue label
1171 jae .Lcommon_seh_tail
1174 lea 512($context),%rdi # &context.Xmm6
1176 .long 0xa548f3fc # cld; rep movsq
1177 lea `24+64+5*16`(%rax),%rax # adjust stack pointer
1182 mov %rbx,144($context) # restore context->Rbx
1183 mov %rbp,160($context) # restore context->Rbp
1184 mov %r12,216($context) # restore cotnext->R12
1189 mov %rax,152($context) # restore context->Rsp
1190 mov %rsi,168($context) # restore context->Rsi
1191 mov %rdi,176($context) # restore context->Rdi
1193 mov 40($disp),%rdi # disp->ContextRecord
1194 mov $context,%rsi # context
1195 mov \$154,%ecx # sizeof(CONTEXT)
1196 .long 0xa548f3fc # cld; rep movsq
1199 xor %rcx,%rcx # arg1, UNW_FLAG_NHANDLER
1200 mov 8(%rsi),%rdx # arg2, disp->ImageBase
1201 mov 0(%rsi),%r8 # arg3, disp->ControlPc
1202 mov 16(%rsi),%r9 # arg4, disp->FunctionEntry
1203 mov 40(%rsi),%r10 # disp->ContextRecord
1204 lea 56(%rsi),%r11 # &disp->HandlerData
1205 lea 24(%rsi),%r12 # &disp->EstablisherFrame
1206 mov %r10,32(%rsp) # arg5
1207 mov %r11,40(%rsp) # arg6
1208 mov %r12,48(%rsp) # arg7
1209 mov %rcx,56(%rsp) # arg8, (NULL)
1210 call *__imp_RtlVirtualUnwind(%rip)
1212 mov \$1,%eax # ExceptionContinueSearch
1224 .size ssse3_handler,.-ssse3_handler
1228 .rva .LSEH_begin_sha1_block_data_order
1229 .rva .LSEH_end_sha1_block_data_order
1230 .rva .LSEH_info_sha1_block_data_order
1231 .rva .LSEH_begin_sha1_block_data_order_ssse3
1232 .rva .LSEH_end_sha1_block_data_order_ssse3
1233 .rva .LSEH_info_sha1_block_data_order_ssse3
1235 $code.=<<___ if ($avx);
1236 .rva .LSEH_begin_sha1_block_data_order_avx
1237 .rva .LSEH_end_sha1_block_data_order_avx
1238 .rva .LSEH_info_sha1_block_data_order_avx
1243 .LSEH_info_sha1_block_data_order:
1246 .LSEH_info_sha1_block_data_order_ssse3:
1249 .rva .Lprologue_ssse3,.Lepilogue_ssse3 # HandlerData[]
1251 $code.=<<___ if ($avx);
1252 .LSEH_info_sha1_block_data_order_avx:
1255 .rva .Lprologue_avx,.Lepilogue_avx # HandlerData[]
1259 ####################################################################
1261 $code =~ s/\`([^\`]*)\`/eval $1/gem;