3 # ====================================================================
4 # [Re]written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
5 # project. The module is, however, dual licensed under OpenSSL and
6 # CRYPTOGAMS licenses depending on where you obtain it. For further
7 # details see http://www.openssl.org/~appro/cryptogams/.
8 # ====================================================================
10 # At some point it became apparent that the original SSLeay RC4
11 # assembler implementation performs suboptimally on latest IA-32
12 # microarchitectures. After re-tuning performance has changed as
20 # (*) This number is actually a trade-off:-) It's possible to
21 # achieve +72%, but at the cost of -48% off PIII performance.
22 # In other words code performing further 13% faster on AMD
23 # would perform almost 2 times slower on Intel PIII...
24 # For reference! This code delivers ~80% of rc4-amd64.pl
25 # performance on the same Opteron machine.
26 # (**) This number requires compressed key schedule set up by
27 # RC4_set_key [see commentary below for further details].
29 # <appro@fy.chalmers.se>
33 # Optimize for Core2 and Westmere [and Opteron]. Current performance
34 # in cycles per processed byte (less is better) is:
36 # Pentium 10.2 # original numbers
40 # Opteron 6.4/+14% # new MMX numbers
42 # Westmere 5.5/+80%(**)
45 # (*) PIII can actually deliver 6.6 cycles per byte with MMX code,
46 # but this specific code performs poorly on Core2. While below
47 # MMX code delivering 5.8 on Core2 performs at 8.0 on PIII:-(
48 # As PIII is not a "hot" CPU [anymore], I chose not to introduce
49 # PIII-specific code path, which is why MMX code path is quarded
50 # by SSE2 bit (see below), not MMX.
51 # (**) Performance vs. block size on Core2 and Westmere had a maximum
52 # at ... 64 bytes block size. And it was quite a maximum, 40-60%
53 # in comparison to largest 8KB block size. Above improvement
54 # coefficients are for the largest block size.
56 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
57 push(@INC,"${dir}","${dir}../../perlasm");
60 &asm_init($ARGV[0],"rc4-586.pl");
72 my $func = ($i==0)?*mov:*or;
74 &add (&LB($yy),&LB($tx));
75 &mov ($ty,&DWP(0,$dat,$yy,4));
76 &mov (&DWP(0,$dat,$yy,4),$tx);
77 &mov (&DWP(0,$dat,$xx,4),$ty);
81 &ror ($out,8) if ($i!=0);
83 &mov ($tx,&DWP(0,$dat,$xx,4));
85 &mov ($tx,&wparam(3)); # reload [re-biased] out
87 &$func ($out,&DWP(0,$dat,$ty,4));
91 # works ~5% faster on Atom and ~20% slower on Core2
98 &lea (@XX[1],&DWP(1,@XX[0]));
99 &psllq ("mm1",8*(($i-1)&7)) if (abs($i)!=1);
101 &mov ($ty,&DWP(0,$dat,$yy,4));
102 &mov (&DWP(0,$dat,$yy,4),$tx);
103 &mov (&DWP(0,$dat,$XX[0],4),$ty);
105 &movd (@XX[0],"mm7") if ($i==0);
106 &movz ($ty,&LB($ty));
107 &mov ($tx,&DWP(0,$dat,@XX[1],4));
108 &pxor ("mm2",$i==1?"mm0":"mm1") if ($i>=0);
109 &movq ("mm0",&QWP(0,$inp)) if ($i<=0);
110 &movq (&QWP(-8,(@XX[0],$inp)),"mm2") if ($i==0);
111 &movd ($i>0?"mm1":"mm2",&DWP(0,$dat,$ty,4));
113 push (@XX,shift(@XX)) if ($i>=0);
116 $RC4_loop_mmx = sub {
120 &movz ($yy,&LB($yy)); # (*)
121 &psllq ("mm1",8*(($i-1)&7)) if (abs($i)!=1);
122 &mov ($ty,&DWP(0,$dat,$yy,4));
123 &mov (&DWP(0,$dat,$yy,4),$tx);
124 &mov (&DWP(0,$dat,$xx,4),$ty);
127 &movz ($xx,&LB($xx)); # (*)
128 &movz ($ty,&LB($ty)); # (*)
129 &pxor ("mm2",$i==1?"mm0":"mm1") if ($i>=0);
130 &movq ("mm0",&QWP(0,$inp)) if ($i<=0);
131 &movq (&QWP(-8,($out,$inp)),"mm2") if ($i==0);
132 &mov ($tx,&DWP(0,$dat,$xx,4));
133 &movd ($i>0?"mm1":"mm2",&DWP(0,$dat,$ty,4));
135 # (*) This is the key to Core2 and Westmere performance.
136 # Whithout movz out-of-order execution logic confuses
137 # itself and fails to reorder loads and stores. Problem
138 # appears to be fixed in Sandy Bridge...
142 &external_label("OPENSSL_ia32cap_P");
144 # void RC4(RC4_KEY *key,size_t len,const unsigned char *inp,unsigned char *out);
145 &function_begin("RC4");
146 &mov ($dat,&wparam(0)); # load key schedule pointer
147 &mov ($ty, &wparam(1)); # load len
148 &mov ($inp,&wparam(2)); # load inp
149 &mov ($out,&wparam(3)); # load out
151 &xor ($xx,$xx); # avoid partial register stalls
154 &cmp ($ty,0); # safety net
155 &je (&label("abort"));
157 &mov (&LB($xx),&BP(0,$dat)); # load key->x
158 &mov (&LB($yy),&BP(4,$dat)); # load key->y
161 &lea ($tx,&DWP(0,$inp,$ty));
162 &sub ($out,$inp); # re-bias out
163 &mov (&wparam(1),$tx); # save input+len
167 # detect compressed key schedule...
168 &cmp (&DWP(256,$dat),-1);
169 &je (&label("RC4_CHAR"));
171 &mov ($tx,&DWP(0,$dat,$xx,4));
173 &and ($ty,-4); # how many 4-byte chunks?
174 &jz (&label("loop1"));
177 &mov (&wparam(3),$out); # $out as accumulator in these loops
178 &jz (&label("go4loop4"));
180 &picmeup($out,"OPENSSL_ia32cap_P");
181 &bt (&DWP(0,$out),26); # check SSE2 bit [could have been MMX]
182 &jnc (&label("go4loop4"));
184 &mov ($out,&wparam(3)) if (!$alt);
185 &movd ("mm7",&wparam(3)) if ($alt);
187 &lea ($ty,&DWP(-8,$inp,$ty));
188 &mov (&wparam(2),$ty);
190 &mov (&DWP(-4,$dat),$ty); # save input+(len/8)*8-8
193 &jmp(&label("loop_mmx_enter"));
195 &set_label("loop_mmx",16);
197 &set_label("loop_mmx_enter");
198 for ($i=1;$i<8;$i++) { &$RC4_loop_mmx($i); }
199 &cmp ($inp,&DWP(-4,$dat));
200 &lea ($inp,&DWP(8,$inp));
201 &jb (&label("loop_mmx"));
203 &movd ($out,"mm7") if ($alt);
206 &movq (&QWP(-8,$out,$inp),"mm2");
209 &cmp ($inp,&wparam(1)); # compare to input+len
210 &je (&label("done"));
211 &jmp (&label("loop1"));
213 &set_label("go4loop4",16);
214 &lea ($ty,&DWP(-4,$inp,$ty));
215 &mov (&wparam(2),$ty); # save input+(len/4)*4-4
218 for ($i=0;$i<4;$i++) { RC4_loop($i); }
220 &xor ($out,&DWP(0,$inp));
221 &cmp ($inp,&wparam(2)); # compare to input+(len/4)*4-4
222 &mov (&DWP(0,$tx,$inp),$out);# $tx holds re-biased out here
223 &lea ($inp,&DWP(4,$inp));
224 &mov ($tx,&DWP(0,$dat,$xx,4));
225 &jb (&label("loop4"));
227 &cmp ($inp,&wparam(1)); # compare to input+len
228 &je (&label("done"));
229 &mov ($out,&wparam(3)); # restore $out
231 &set_label("loop1",16);
232 &add (&LB($yy),&LB($tx));
233 &mov ($ty,&DWP(0,$dat,$yy,4));
234 &mov (&DWP(0,$dat,$yy,4),$tx);
235 &mov (&DWP(0,$dat,$xx,4),$ty);
239 &mov ($ty,&DWP(0,$dat,$ty,4));
240 &xor (&LB($ty),&BP(0,$inp));
241 &lea ($inp,&DWP(1,$inp));
242 &mov ($tx,&DWP(0,$dat,$xx,4));
243 &cmp ($inp,&wparam(1)); # compare to input+len
244 &mov (&BP(-1,$out,$inp),&LB($ty));
245 &jb (&label("loop1"));
247 &jmp (&label("done"));
249 # this is essentially Intel P4 specific codepath...
250 &set_label("RC4_CHAR",16);
251 &movz ($tx,&BP(0,$dat,$xx));
252 # strangely enough unrolled loop performs over 20% slower...
253 &set_label("cloop1");
254 &add (&LB($yy),&LB($tx));
255 &movz ($ty,&BP(0,$dat,$yy));
256 &mov (&BP(0,$dat,$yy),&LB($tx));
257 &mov (&BP(0,$dat,$xx),&LB($ty));
258 &add (&LB($ty),&LB($tx));
259 &movz ($ty,&BP(0,$dat,$ty));
261 &xor (&LB($ty),&BP(0,$inp));
262 &lea ($inp,&DWP(1,$inp));
263 &movz ($tx,&BP(0,$dat,$xx));
264 &cmp ($inp,&wparam(1));
265 &mov (&BP(-1,$out,$inp),&LB($ty));
266 &jb (&label("cloop1"));
270 &mov (&BP(-4,$dat),&LB($yy)); # save key->y
271 &mov (&BP(-8,$dat),&LB($xx)); # save key->x
273 &function_end("RC4");
275 ########################################################################
283 # void RC4_set_key(RC4_KEY *key,int len,const unsigned char *data);
284 &function_begin("RC4_set_key");
285 &mov ($out,&wparam(0)); # load key
286 &mov ($idi,&wparam(1)); # load len
287 &mov ($inp,&wparam(2)); # load data
288 &picmeup($idx,"OPENSSL_ia32cap_P");
290 &lea ($out,&DWP(2*4,$out)); # &key->data
291 &lea ($inp,&DWP(0,$inp,$idi)); # $inp to point at the end
294 &mov (&DWP(-4,$out),$idi); # borrow key->y
296 &bt (&DWP(0,$idx),20); # check for bit#20
297 &jc (&label("c1stloop"));
299 &set_label("w1stloop",16);
300 &mov (&DWP(0,$out,"eax",4),"eax"); # key->data[i]=i;
301 &add (&LB("eax"),1); # i++;
302 &jnc (&label("w1stloop"));
307 &set_label("w2ndloop",16);
308 &mov ("eax",&DWP(0,$out,$ido,4));
309 &add (&LB($idx),&BP(0,$inp,$idi));
310 &add (&LB($idx),&LB("eax"));
312 &mov ("ebx",&DWP(0,$out,$idx,4));
313 &jnz (&label("wnowrap"));
314 &mov ($idi,&DWP(-4,$out));
315 &set_label("wnowrap");
316 &mov (&DWP(0,$out,$idx,4),"eax");
317 &mov (&DWP(0,$out,$ido,4),"ebx");
319 &jnc (&label("w2ndloop"));
320 &jmp (&label("exit"));
322 # Unlike all other x86 [and x86_64] implementations, Intel P4 core
323 # [including EM64T] was found to perform poorly with above "32-bit" key
324 # schedule, a.k.a. RC4_INT. Performance improvement for IA-32 hand-coded
325 # assembler turned out to be 3.5x if re-coded for compressed 8-bit one,
326 # a.k.a. RC4_CHAR! It's however inappropriate to just switch to 8-bit
327 # schedule for x86[_64], because non-P4 implementations suffer from
328 # significant performance losses then, e.g. PIII exhibits >2x
329 # deterioration, and so does Opteron. In order to assure optimal
330 # all-round performance, we detect P4 at run-time and set up compressed
331 # key schedule, which is recognized by RC4 procedure.
333 &set_label("c1stloop",16);
334 &mov (&BP(0,$out,"eax"),&LB("eax")); # key->data[i]=i;
335 &add (&LB("eax"),1); # i++;
336 &jnc (&label("c1stloop"));
342 &set_label("c2ndloop",16);
343 &mov (&LB("eax"),&BP(0,$out,$ido));
344 &add (&LB($idx),&BP(0,$inp,$idi));
345 &add (&LB($idx),&LB("eax"));
347 &mov (&LB("ebx"),&BP(0,$out,$idx));
348 &jnz (&label("cnowrap"));
349 &mov ($idi,&DWP(-4,$out));
350 &set_label("cnowrap");
351 &mov (&BP(0,$out,$idx),&LB("eax"));
352 &mov (&BP(0,$out,$ido),&LB("ebx"));
354 &jnc (&label("c2ndloop"));
356 &mov (&DWP(256,$out),-1); # mark schedule as compressed
360 &mov (&DWP(-8,$out),"eax"); # key->x=0;
361 &mov (&DWP(-4,$out),"eax"); # key->y=0;
362 &function_end("RC4_set_key");
364 # const char *RC4_options(void);
365 &function_begin_B("RC4_options");
366 &call (&label("pic_point"));
367 &set_label("pic_point");
369 &lea ("eax",&DWP(&label("opts")."-".&label("pic_point"),"eax"));
370 &picmeup("edx","OPENSSL_ia32cap_P");
371 &mov ("edx",&DWP(0,"edx"));
373 &jc (&label("1xchar"));
375 &jnc (&label("ret"));
378 &set_label("1xchar");
382 &set_label("opts",64);
383 &asciz ("rc4(4x,int)");
384 &asciz ("rc4(1x,char)");
385 &asciz ("rc4(8x,mmx)");
386 &asciz ("RC4 for x86, CRYPTOGAMS by <appro\@openssl.org>");
388 &function_end_B("RC4_options");