crypto/modes/asm/ghashv8-armx.pl

   1 #! /usr/bin/env perl
   2 # Copyright 2014-2016 The OpenSSL Project Authors. All Rights Reserved.
   3 #
   4 # Licensed under the OpenSSL license (the "License").  You may not use
   5 # this file except in compliance with the License.  You can obtain a copy
   6 # in the file LICENSE in the source distribution or at
   7 # https://www.openssl.org/source/license.html
   8
   9 #
  10 # ====================================================================
  11 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
  12 # project. The module is, however, dual licensed under OpenSSL and
  13 # CRYPTOGAMS licenses depending on where you obtain it. For further
  14 # details see http://www.openssl.org/~appro/cryptogams/.
  15 # ====================================================================
  16 #
  17 # GHASH for ARMv8 Crypto Extension, 64-bit polynomial multiplication.
  18 #
  19 # June 2014
  20 #
  21 # Initial version was developed in tight cooperation with Ard
  22 # Biesheuvel <ard.biesheuvel@linaro.org> from bits-n-pieces from
  23 # other assembly modules. Just like aesv8-armx.pl this module
  24 # supports both AArch32 and AArch64 execution modes.
  25 #
  26 # July 2014
  27 #
  28 # Implement 2x aggregated reduction [see ghash-x86.pl for background
  29 # information].
  30 #
  31 # Current performance in cycles per processed byte:
  32 #
  33 #               PMULL[2]        32-bit NEON(*)
  34 # Apple A7      0.92            5.62
  35 # Cortex-A53    1.01            8.39
  36 # Cortex-A57    1.17            7.61
  37 # Denver        0.71            6.02
  38 # Mongoose      1.10            8.06
  39 #
  40 # (*)   presented for reference/comparison purposes;
  41
  42 $flavour = shift;
  43 $output  = shift;
  44
  45 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
  46 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
  47 ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or
  48 die "can't locate arm-xlate.pl";
  49
  50 open OUT,"| \"$^X\" $xlate $flavour $output";
  51 *STDOUT=*OUT;
  52
  53 $Xi="x0";       # argument block
  54 $Htbl="x1";
  55 $inp="x2";
  56 $len="x3";
  57
  58 $inc="x12";
  59
  60 {
  61 my ($Xl,$Xm,$Xh,$IN)=map("q$_",(0..3));
  62 my ($t0,$t1,$t2,$xC2,$H,$Hhl,$H2)=map("q$_",(8..14));
  63
  64 $code=<<___;
  65 #include "arm_arch.h"
  66
  67 .text
  68 ___
  69 $code.=".arch   armv8-a+crypto\n"       if ($flavour =~ /64/);
  70 $code.=".fpu    neon\n.code     32\n"   if ($flavour !~ /64/);
  71
  72 ################################################################################
  73 # void gcm_init_v8(u128 Htable[16],const u64 H[2]);
  74 #
  75 # input:        128-bit H - secret parameter E(K,0^128)
  76 # output:       precomputed table filled with degrees of twisted H;
  77 #               H is twisted to handle reverse bitness of GHASH;
  78 #               only few of 16 slots of Htable[16] are used;
  79 #               data is opaque to outside world (which allows to
  80 #               optimize the code independently);
  81 #
  82 $code.=<<___;
  83 .global gcm_init_v8
  84 .type   gcm_init_v8,%function
  85 .align  4
  86 gcm_init_v8:
  87         vld1.64         {$t1},[x1]              @ load input H
  88         vmov.i8         $xC2,#0xe1
  89         vshl.i64        $xC2,$xC2,#57           @ 0xc2.0
  90         vext.8          $IN,$t1,$t1,#8
  91         vshr.u64        $t2,$xC2,#63
  92         vdup.32         $t1,${t1}[1]
  93         vext.8          $t0,$t2,$xC2,#8         @ t0=0xc2....01
  94         vshr.u64        $t2,$IN,#63
  95         vshr.s32        $t1,$t1,#31             @ broadcast carry bit
  96         vand            $t2,$t2,$t0
  97         vshl.i64        $IN,$IN,#1
  98         vext.8          $t2,$t2,$t2,#8
  99         vand            $t0,$t0,$t1
 100         vorr            $IN,$IN,$t2             @ H<<<=1
 101         veor            $H,$IN,$t0              @ twisted H
 102         vst1.64         {$H},[x0],#16           @ store Htable[0]
 103
 104         @ calculate H^2
 105         vext.8          $t0,$H,$H,#8            @ Karatsuba pre-processing
 106         vpmull.p64      $Xl,$H,$H
 107         veor            $t0,$t0,$H
 108         vpmull2.p64     $Xh,$H,$H
 109         vpmull.p64      $Xm,$t0,$t0
 110
 111         vext.8          $t1,$Xl,$Xh,#8          @ Karatsuba post-processing
 112         veor            $t2,$Xl,$Xh
 113         veor            $Xm,$Xm,$t1
 114         veor            $Xm,$Xm,$t2
 115         vpmull.p64      $t2,$Xl,$xC2            @ 1st phase
 116
 117         vmov            $Xh#lo,$Xm#hi           @ Xh|Xm - 256-bit result
 118         vmov            $Xm#hi,$Xl#lo           @ Xm is rotated Xl
 119         veor            $Xl,$Xm,$t2
 120
 121         vext.8          $t2,$Xl,$Xl,#8          @ 2nd phase
 122         vpmull.p64      $Xl,$Xl,$xC2
 123         veor            $t2,$t2,$Xh
 124         veor            $H2,$Xl,$t2
 125
 126         vext.8          $t1,$H2,$H2,#8          @ Karatsuba pre-processing
 127         veor            $t1,$t1,$H2
 128         vext.8          $Hhl,$t0,$t1,#8         @ pack Karatsuba pre-processed
 129         vst1.64         {$Hhl-$H2},[x0]         @ store Htable[1..2]
 130
 131         ret
 132 .size   gcm_init_v8,.-gcm_init_v8
 133 ___
 134 ################################################################################
 135 # void gcm_gmult_v8(u64 Xi[2],const u128 Htable[16]);
 136 #
 137 # input:        Xi - current hash value;
 138 #               Htable - table precomputed in gcm_init_v8;
 139 # output:       Xi - next hash value Xi;
 140 #
 141 $code.=<<___;
 142 .global gcm_gmult_v8
 143 .type   gcm_gmult_v8,%function
 144 .align  4
 145 gcm_gmult_v8:
 146         vld1.64         {$t1},[$Xi]             @ load Xi
 147         vmov.i8         $xC2,#0xe1
 148         vld1.64         {$H-$Hhl},[$Htbl]       @ load twisted H, ...
 149         vshl.u64        $xC2,$xC2,#57
 150 #ifndef __ARMEB__
 151         vrev64.8        $t1,$t1
 152 #endif
 153         vext.8          $IN,$t1,$t1,#8
 154
 155         vpmull.p64      $Xl,$H,$IN              @ H.lo·Xi.lo
 156         veor            $t1,$t1,$IN             @ Karatsuba pre-processing
 157         vpmull2.p64     $Xh,$H,$IN              @ H.hi·Xi.hi
 158         vpmull.p64      $Xm,$Hhl,$t1            @ (H.lo+H.hi)·(Xi.lo+Xi.hi)
 159
 160         vext.8          $t1,$Xl,$Xh,#8          @ Karatsuba post-processing
 161         veor            $t2,$Xl,$Xh
 162         veor            $Xm,$Xm,$t1
 163         veor            $Xm,$Xm,$t2
 164         vpmull.p64      $t2,$Xl,$xC2            @ 1st phase of reduction
 165
 166         vmov            $Xh#lo,$Xm#hi           @ Xh|Xm - 256-bit result
 167         vmov            $Xm#hi,$Xl#lo           @ Xm is rotated Xl
 168         veor            $Xl,$Xm,$t2
 169
 170         vext.8          $t2,$Xl,$Xl,#8          @ 2nd phase of reduction
 171         vpmull.p64      $Xl,$Xl,$xC2
 172         veor            $t2,$t2,$Xh
 173         veor            $Xl,$Xl,$t2
 174
 175 #ifndef __ARMEB__
 176         vrev64.8        $Xl,$Xl
 177 #endif
 178         vext.8          $Xl,$Xl,$Xl,#8
 179         vst1.64         {$Xl},[$Xi]             @ write out Xi
 180
 181         ret
 182 .size   gcm_gmult_v8,.-gcm_gmult_v8
 183 ___
 184 ################################################################################
 185 # void gcm_ghash_v8(u64 Xi[2],const u128 Htable[16],const u8 *inp,size_t len);
 186 #
 187 # input:        table precomputed in gcm_init_v8;
 188 #               current hash value Xi;
 189 #               pointer to input data;
 190 #               length of input data in bytes, but divisible by block size;
 191 # output:       next hash value Xi;
 192 #
 193 $code.=<<___;
 194 .global gcm_ghash_v8
 195 .type   gcm_ghash_v8,%function
 196 .align  4
 197 gcm_ghash_v8:
 198 ___
 199 $code.=<<___            if ($flavour !~ /64/);
 200         vstmdb          sp!,{d8-d15}            @ 32-bit ABI says so
 201 ___
 202 $code.=<<___;
 203         vld1.64         {$Xl},[$Xi]             @ load [rotated] Xi
 204                                                 @ "[rotated]" means that
 205                                                 @ loaded value would have
 206                                                 @ to be rotated in order to
 207                                                 @ make it appear as in
 208                                                 @ alorithm specification
 209         subs            $len,$len,#32           @ see if $len is 32 or larger
 210         mov             $inc,#16                @ $inc is used as post-
 211                                                 @ increment for input pointer;
 212                                                 @ as loop is modulo-scheduled
 213                                                 @ $inc is zeroed just in time
 214                                                 @ to preclude oversteping
 215                                                 @ inp[len], which means that
 216                                                 @ last block[s] are actually
 217                                                 @ loaded twice, but last
 218                                                 @ copy is not processed
 219         vld1.64         {$H-$Hhl},[$Htbl],#32   @ load twisted H, ..., H^2
 220         vmov.i8         $xC2,#0xe1
 221         vld1.64         {$H2},[$Htbl]
 222         cclr            $inc,eq                 @ is it time to zero $inc?
 223         vext.8          $Xl,$Xl,$Xl,#8          @ rotate Xi
 224         vld1.64         {$t0},[$inp],#16        @ load [rotated] I[0]
 225         vshl.u64        $xC2,$xC2,#57           @ compose 0xc2.0 constant
 226 #ifndef __ARMEB__
 227         vrev64.8        $t0,$t0
 228         vrev64.8        $Xl,$Xl
 229 #endif
 230         vext.8          $IN,$t0,$t0,#8          @ rotate I[0]
 231         b.lo            .Lodd_tail_v8           @ $len was less than 32
 232 ___
 233 { my ($Xln,$Xmn,$Xhn,$In) = map("q$_",(4..7));
 234         #######
 235         # Xi+2 =[H*(Ii+1 + Xi+1)] mod P =
 236         #       [(H*Ii+1) + (H*Xi+1)] mod P =
 237         #       [(H*Ii+1) + H^2*(Ii+Xi)] mod P
 238         #
 239 $code.=<<___;
 240         vld1.64         {$t1},[$inp],$inc       @ load [rotated] I[1]
 241 #ifndef __ARMEB__
 242         vrev64.8        $t1,$t1
 243 #endif
 244         vext.8          $In,$t1,$t1,#8
 245         veor            $IN,$IN,$Xl             @ I[i]^=Xi
 246         vpmull.p64      $Xln,$H,$In             @ H·Ii+1
 247         veor            $t1,$t1,$In             @ Karatsuba pre-processing
 248         vpmull2.p64     $Xhn,$H,$In
 249         b               .Loop_mod2x_v8
 250
 251 .align  4
 252 .Loop_mod2x_v8:
 253         vext.8          $t2,$IN,$IN,#8
 254         subs            $len,$len,#32           @ is there more data?
 255         vpmull.p64      $Xl,$H2,$IN             @ H^2.lo·Xi.lo
 256         cclr            $inc,lo                 @ is it time to zero $inc?
 257
 258          vpmull.p64     $Xmn,$Hhl,$t1
 259         veor            $t2,$t2,$IN             @ Karatsuba pre-processing
 260         vpmull2.p64     $Xh,$H2,$IN             @ H^2.hi·Xi.hi
 261         veor            $Xl,$Xl,$Xln            @ accumulate
 262         vpmull2.p64     $Xm,$Hhl,$t2            @ (H^2.lo+H^2.hi)·(Xi.lo+Xi.hi)
 263          vld1.64        {$t0},[$inp],$inc       @ load [rotated] I[i+2]
 264
 265         veor            $Xh,$Xh,$Xhn
 266          cclr           $inc,eq                 @ is it time to zero $inc?
 267         veor            $Xm,$Xm,$Xmn
 268
 269         vext.8          $t1,$Xl,$Xh,#8          @ Karatsuba post-processing
 270         veor            $t2,$Xl,$Xh
 271         veor            $Xm,$Xm,$t1
 272          vld1.64        {$t1},[$inp],$inc       @ load [rotated] I[i+3]
 273 #ifndef __ARMEB__
 274          vrev64.8       $t0,$t0
 275 #endif
 276         veor            $Xm,$Xm,$t2
 277         vpmull.p64      $t2,$Xl,$xC2            @ 1st phase of reduction
 278
 279 #ifndef __ARMEB__
 280          vrev64.8       $t1,$t1
 281 #endif
 282         vmov            $Xh#lo,$Xm#hi           @ Xh|Xm - 256-bit result
 283         vmov            $Xm#hi,$Xl#lo           @ Xm is rotated Xl
 284          vext.8         $In,$t1,$t1,#8
 285          vext.8         $IN,$t0,$t0,#8
 286         veor            $Xl,$Xm,$t2
 287          vpmull.p64     $Xln,$H,$In             @ H·Ii+1
 288         veor            $IN,$IN,$Xh             @ accumulate $IN early
 289
 290         vext.8          $t2,$Xl,$Xl,#8          @ 2nd phase of reduction
 291         vpmull.p64      $Xl,$Xl,$xC2
 292         veor            $IN,$IN,$t2
 293          veor           $t1,$t1,$In             @ Karatsuba pre-processing
 294         veor            $IN,$IN,$Xl
 295          vpmull2.p64    $Xhn,$H,$In
 296         b.hs            .Loop_mod2x_v8          @ there was at least 32 more bytes
 297
 298         veor            $Xh,$Xh,$t2
 299         vext.8          $IN,$t0,$t0,#8          @ re-construct $IN
 300         adds            $len,$len,#32           @ re-construct $len
 301         veor            $Xl,$Xl,$Xh             @ re-construct $Xl
 302         b.eq            .Ldone_v8               @ is $len zero?
 303 ___
 304 }
 305 $code.=<<___;
 306 .Lodd_tail_v8:
 307         vext.8          $t2,$Xl,$Xl,#8
 308         veor            $IN,$IN,$Xl             @ inp^=Xi
 309         veor            $t1,$t0,$t2             @ $t1 is rotated inp^Xi
 310
 311         vpmull.p64      $Xl,$H,$IN              @ H.lo·Xi.lo
 312         veor            $t1,$t1,$IN             @ Karatsuba pre-processing
 313         vpmull2.p64     $Xh,$H,$IN              @ H.hi·Xi.hi
 314         vpmull.p64      $Xm,$Hhl,$t1            @ (H.lo+H.hi)·(Xi.lo+Xi.hi)
 315
 316         vext.8          $t1,$Xl,$Xh,#8          @ Karatsuba post-processing
 317         veor            $t2,$Xl,$Xh
 318         veor            $Xm,$Xm,$t1
 319         veor            $Xm,$Xm,$t2
 320         vpmull.p64      $t2,$Xl,$xC2            @ 1st phase of reduction
 321
 322         vmov            $Xh#lo,$Xm#hi           @ Xh|Xm - 256-bit result
 323         vmov            $Xm#hi,$Xl#lo           @ Xm is rotated Xl
 324         veor            $Xl,$Xm,$t2
 325
 326         vext.8          $t2,$Xl,$Xl,#8          @ 2nd phase of reduction
 327         vpmull.p64      $Xl,$Xl,$xC2
 328         veor            $t2,$t2,$Xh
 329         veor            $Xl,$Xl,$t2
 330
 331 .Ldone_v8:
 332 #ifndef __ARMEB__
 333         vrev64.8        $Xl,$Xl
 334 #endif
 335         vext.8          $Xl,$Xl,$Xl,#8
 336         vst1.64         {$Xl},[$Xi]             @ write out Xi
 337
 338 ___
 339 $code.=<<___            if ($flavour !~ /64/);
 340         vldmia          sp!,{d8-d15}            @ 32-bit ABI says so
 341 ___
 342 $code.=<<___;
 343         ret
 344 .size   gcm_ghash_v8,.-gcm_ghash_v8
 345 ___
 346 }
 347 $code.=<<___;
 348 .asciz  "GHASH for ARMv8, CRYPTOGAMS by <appro\@openssl.org>"
 349 .align  2
 350 ___
 351
 352 if ($flavour =~ /64/) {                 ######## 64-bit code
 353     sub unvmov {
 354         my $arg=shift;
 355
 356         $arg =~ m/q([0-9]+)#(lo|hi),\s*q([0-9]+)#(lo|hi)/o &&
 357         sprintf "ins    v%d.d[%d],v%d.d[%d]",$1,($2 eq "lo")?0:1,$3,($4 eq "lo")?0:1;
 358     }
 359     foreach(split("\n",$code)) {
 360         s/cclr\s+([wx])([^,]+),\s*([a-z]+)/csel $1$2,$1zr,$1$2,$3/o     or
 361         s/vmov\.i8/movi/o               or      # fix up legacy mnemonics
 362         s/vmov\s+(.*)/unvmov($1)/geo    or
 363         s/vext\.8/ext/o                 or
 364         s/vshr\.s/sshr\.s/o             or
 365         s/vshr/ushr/o                   or
 366         s/^(\s+)v/$1/o                  or      # strip off v prefix
 367         s/\bbx\s+lr\b/ret/o;
 368
 369         s/\bq([0-9]+)\b/"v".($1<8?$1:$1+8).".16b"/geo;  # old->new registers
 370         s/@\s/\/\//o;                           # old->new style commentary
 371
 372         # fix up remainig legacy suffixes
 373         s/\.[ui]?8(\s)/$1/o;
 374         s/\.[uis]?32//o and s/\.16b/\.4s/go;
 375         m/\.p64/o and s/\.16b/\.1q/o;           # 1st pmull argument
 376         m/l\.p64/o and s/\.16b/\.1d/go;         # 2nd and 3rd pmull arguments
 377         s/\.[uisp]?64//o and s/\.16b/\.2d/go;
 378         s/\.[42]([sd])\[([0-3])\]/\.$1\[$2\]/o;
 379
 380         print $_,"\n";
 381     }
 382 } else {                                ######## 32-bit code
 383     sub unvdup32 {
 384         my $arg=shift;
 385
 386         $arg =~ m/q([0-9]+),\s*q([0-9]+)\[([0-3])\]/o &&
 387         sprintf "vdup.32        q%d,d%d[%d]",$1,2*$2+($3>>1),$3&1;
 388     }
 389     sub unvpmullp64 {
 390         my ($mnemonic,$arg)=@_;
 391
 392         if ($arg =~ m/q([0-9]+),\s*q([0-9]+),\s*q([0-9]+)/o) {
 393             my $word = 0xf2a00e00|(($1&7)<<13)|(($1&8)<<19)
 394                                  |(($2&7)<<17)|(($2&8)<<4)
 395                                  |(($3&7)<<1) |(($3&8)<<2);
 396             $word |= 0x00010001  if ($mnemonic =~ "2");
 397             # since ARMv7 instructions are always encoded little-endian.
 398             # correct solution is to use .inst directive, but older
 399             # assemblers don't implement it:-(
 400             sprintf ".byte\t0x%02x,0x%02x,0x%02x,0x%02x\t@ %s %s",
 401                         $word&0xff,($word>>8)&0xff,
 402                         ($word>>16)&0xff,($word>>24)&0xff,
 403                         $mnemonic,$arg;
 404         }
 405     }
 406
 407     foreach(split("\n",$code)) {
 408         s/\b[wx]([0-9]+)\b/r$1/go;              # new->old registers
 409         s/\bv([0-9])\.[12468]+[bsd]\b/q$1/go;   # new->old registers
 410         s/\/\/\s?/@ /o;                         # new->old style commentary
 411
 412         # fix up remainig new-style suffixes
 413         s/\],#[0-9]+/]!/o;
 414
 415         s/cclr\s+([^,]+),\s*([a-z]+)/mov$2      $1,#0/o                 or
 416         s/vdup\.32\s+(.*)/unvdup32($1)/geo                              or
 417         s/v?(pmull2?)\.p64\s+(.*)/unvpmullp64($1,$2)/geo                or
 418         s/\bq([0-9]+)#(lo|hi)/sprintf "d%d",2*$1+($2 eq "hi")/geo       or
 419         s/^(\s+)b\./$1b/o                                               or
 420         s/^(\s+)ret/$1bx\tlr/o;
 421
 422         print $_,"\n";
 423     }
 424 }
 425
 426 close STDOUT; # enforce flush