crypto/modes/asm/ghash-x86_64.pl

   1 #! /usr/bin/env perl
   2 # Copyright 2010-2016 The OpenSSL Project Authors. All Rights Reserved.
   3 #
   4 # Licensed under the Apache License 2.0 (the "License").  You may not use
   5 # this file except in compliance with the License.  You can obtain a copy
   6 # in the file LICENSE in the source distribution or at
   7 # https://www.openssl.org/source/license.html
   8
   9 #
  10 # ====================================================================
  11 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
  12 # project. The module is, however, dual licensed under OpenSSL and
  13 # CRYPTOGAMS licenses depending on where you obtain it. For further
  14 # details see http://www.openssl.org/~appro/cryptogams/.
  15 # ====================================================================
  16 #
  17 # March, June 2010
  18 #
  19 # The module implements "4-bit" GCM GHASH function and underlying
  20 # single multiplication operation in GF(2^128). "4-bit" means that
  21 # it uses 256 bytes per-key table [+128 bytes shared table]. GHASH
  22 # function features so called "528B" variant utilizing additional
  23 # 256+16 bytes of per-key storage [+512 bytes shared table].
  24 # Performance results are for this streamed GHASH subroutine and are
  25 # expressed in cycles per processed byte, less is better:
  26 #
  27 #               gcc 3.4.x(*)    assembler
  28 #
  29 # P4            28.6            14.0            +100%
  30 # Opteron       19.3            7.7             +150%
  31 # Core2         17.8            8.1(**)         +120%
  32 # Atom          31.6            16.8            +88%
  33 # VIA Nano      21.8            10.1            +115%
  34 #
  35 # (*)   comparison is not completely fair, because C results are
  36 #       for vanilla "256B" implementation, while assembler results
  37 #       are for "528B";-)
  38 # (**)  it's mystery [to me] why Core2 result is not same as for
  39 #       Opteron;
  40
  41 # May 2010
  42 #
  43 # Add PCLMULQDQ version performing at 2.02 cycles per processed byte.
  44 # See ghash-x86.pl for background information and details about coding
  45 # techniques.
  46 #
  47 # Special thanks to David Woodhouse for providing access to a
  48 # Westmere-based system on behalf of Intel Open Source Technology Centre.
  49
  50 # December 2012
  51 #
  52 # Overhaul: aggregate Karatsuba post-processing, improve ILP in
  53 # reduction_alg9, increase reduction aggregate factor to 4x. As for
  54 # the latter. ghash-x86.pl discusses that it makes lesser sense to
  55 # increase aggregate factor. Then why increase here? Critical path
  56 # consists of 3 independent pclmulqdq instructions, Karatsuba post-
  57 # processing and reduction. "On top" of this we lay down aggregated
  58 # multiplication operations, triplets of independent pclmulqdq's. As
  59 # issue rate for pclmulqdq is limited, it makes lesser sense to
  60 # aggregate more multiplications than it takes to perform remaining
  61 # non-multiplication operations. 2x is near-optimal coefficient for
  62 # contemporary Intel CPUs (therefore modest improvement coefficient),
  63 # but not for Bulldozer. Latter is because logical SIMD operations
  64 # are twice as slow in comparison to Intel, so that critical path is
  65 # longer. A CPU with higher pclmulqdq issue rate would also benefit
  66 # from higher aggregate factor...
  67 #
  68 # Westmere      1.78(+13%)
  69 # Sandy Bridge  1.80(+8%)
  70 # Ivy Bridge    1.80(+7%)
  71 # Haswell       0.55(+93%) (if system doesn't support AVX)
  72 # Broadwell     0.45(+110%)(if system doesn't support AVX)
  73 # Skylake       0.44(+110%)(if system doesn't support AVX)
  74 # Bulldozer     1.49(+27%)
  75 # Silvermont    2.88(+13%)
  76 # Knights L     2.12(-)    (if system doesn't support AVX)
  77 # Goldmont      1.08(+24%)
  78
  79 # March 2013
  80 #
  81 # ... 8x aggregate factor AVX code path is using reduction algorithm
  82 # suggested by Shay Gueron[1]. Even though contemporary AVX-capable
  83 # CPUs such as Sandy and Ivy Bridge can execute it, the code performs
  84 # sub-optimally in comparison to above mentioned version. But thanks
  85 # to Ilya Albrekht and Max Locktyukhin of Intel Corp. we knew that
  86 # it performs in 0.41 cycles per byte on Haswell processor, in
  87 # 0.29 on Broadwell, and in 0.36 on Skylake.
  88 #
  89 # Knights Landing achieves 1.09 cpb.
  90 #
  91 # [1] http://rt.openssl.org/Ticket/Display.html?id=2900&user=guest&pass=guest
  92
  93 # $output is the last argument if it looks like a file (it has an extension)
  94 # $flavour is the first argument if it doesn't look like a file
  95 $output = $#ARGV >= 0 && $ARGV[$#ARGV] =~ m|\.\w+$| ? pop : undef;
  96 $flavour = $#ARGV >= 0 && $ARGV[0] !~ m|\.| ? shift : undef;
  97
  98 $win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
  99
 100 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
 101 ( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
 102 ( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
 103 die "can't locate x86_64-xlate.pl";
 104
 105 if (`$ENV{CC} -Wa,-v -c -o /dev/null -x assembler /dev/null 2>&1`
 106                 =~ /GNU assembler version ([2-9]\.[0-9]+)/) {
 107         $avx = ($1>=2.20) + ($1>=2.22);
 108 }
 109
 110 if (!$avx && $win64 && ($flavour =~ /nasm/ || $ENV{ASM} =~ /nasm/) &&
 111             `nasm -v 2>&1` =~ /NASM version ([2-9]\.[0-9]+)/) {
 112         $avx = ($1>=2.09) + ($1>=2.10);
 113 }
 114
 115 if (!$avx && $win64 && ($flavour =~ /masm/ || $ENV{ASM} =~ /ml64/) &&
 116             `ml64 2>&1` =~ /Version ([0-9]+)\./) {
 117         $avx = ($1>=10) + ($1>=11);
 118 }
 119
 120 if (!$avx && `$ENV{CC} -v 2>&1` =~ /((?:^clang|LLVM) version|.*based on LLVM) ([0-9]+\.[0-9]+)/) {
 121         $avx = ($2>=3.0) + ($2>3.0);
 122 }
 123
 124 open OUT,"| \"$^X\" \"$xlate\" $flavour \"$output\""
 125     or die "can't call $xlate: $!";
 126 *STDOUT=*OUT;
 127
 128 $do4xaggr=1;
 129
 130 # common register layout
 131 $nlo="%rax";
 132 $nhi="%rbx";
 133 $Zlo="%r8";
 134 $Zhi="%r9";
 135 $tmp="%r10";
 136 $rem_4bit = "%r11";
 137
 138 $Xi="%rdi";
 139 $Htbl="%rsi";
 140
 141 # per-function register layout
 142 $cnt="%rcx";
 143 $rem="%rdx";
 144
 145 sub LB() { my $r=shift; $r =~ s/%[er]([a-d])x/%\1l/     or
 146                         $r =~ s/%[er]([sd]i)/%\1l/      or
 147                         $r =~ s/%[er](bp)/%\1l/         or
 148                         $r =~ s/%(r[0-9]+)[d]?/%\1b/;   $r; }
 149
 150 sub AUTOLOAD()          # thunk [simplified] 32-bit style perlasm
 151 { my $opcode = $AUTOLOAD; $opcode =~ s/.*:://;
 152   my $arg = pop;
 153     $arg = "\$$arg" if ($arg*1 eq $arg);
 154     $code .= "\t$opcode\t".join(',',$arg,reverse @_)."\n";
 155 }
 156 \f
 157 { my $N;
 158   sub loop() {
 159   my $inp = shift;
 160
 161         $N++;
 162 $code.=<<___;
 163         xor     $nlo,$nlo
 164         xor     $nhi,$nhi
 165         mov     `&LB("$Zlo")`,`&LB("$nlo")`
 166         mov     `&LB("$Zlo")`,`&LB("$nhi")`
 167         shl     \$4,`&LB("$nlo")`
 168         mov     \$14,$cnt
 169         mov     8($Htbl,$nlo),$Zlo
 170         mov     ($Htbl,$nlo),$Zhi
 171         and     \$0xf0,`&LB("$nhi")`
 172         mov     $Zlo,$rem
 173         jmp     .Loop$N
 174
 175 .align  16
 176 .Loop$N:
 177         shr     \$4,$Zlo
 178         and     \$0xf,$rem
 179         mov     $Zhi,$tmp
 180         mov     ($inp,$cnt),`&LB("$nlo")`
 181         shr     \$4,$Zhi
 182         xor     8($Htbl,$nhi),$Zlo
 183         shl     \$60,$tmp
 184         xor     ($Htbl,$nhi),$Zhi
 185         mov     `&LB("$nlo")`,`&LB("$nhi")`
 186         xor     ($rem_4bit,$rem,8),$Zhi
 187         mov     $Zlo,$rem
 188         shl     \$4,`&LB("$nlo")`
 189         xor     $tmp,$Zlo
 190         dec     $cnt
 191         js      .Lbreak$N
 192
 193         shr     \$4,$Zlo
 194         and     \$0xf,$rem
 195         mov     $Zhi,$tmp
 196         shr     \$4,$Zhi
 197         xor     8($Htbl,$nlo),$Zlo
 198         shl     \$60,$tmp
 199         xor     ($Htbl,$nlo),$Zhi
 200         and     \$0xf0,`&LB("$nhi")`
 201         xor     ($rem_4bit,$rem,8),$Zhi
 202         mov     $Zlo,$rem
 203         xor     $tmp,$Zlo
 204         jmp     .Loop$N
 205
 206 .align  16
 207 .Lbreak$N:
 208         shr     \$4,$Zlo
 209         and     \$0xf,$rem
 210         mov     $Zhi,$tmp
 211         shr     \$4,$Zhi
 212         xor     8($Htbl,$nlo),$Zlo
 213         shl     \$60,$tmp
 214         xor     ($Htbl,$nlo),$Zhi
 215         and     \$0xf0,`&LB("$nhi")`
 216         xor     ($rem_4bit,$rem,8),$Zhi
 217         mov     $Zlo,$rem
 218         xor     $tmp,$Zlo
 219
 220         shr     \$4,$Zlo
 221         and     \$0xf,$rem
 222         mov     $Zhi,$tmp
 223         shr     \$4,$Zhi
 224         xor     8($Htbl,$nhi),$Zlo
 225         shl     \$60,$tmp
 226         xor     ($Htbl,$nhi),$Zhi
 227         xor     $tmp,$Zlo
 228         xor     ($rem_4bit,$rem,8),$Zhi
 229
 230         bswap   $Zlo
 231         bswap   $Zhi
 232 ___
 233 }}
 234
 235 $code=<<___;
 236 .text
 237 .extern OPENSSL_ia32cap_P
 238
 239 .globl  gcm_gmult_4bit
 240 .type   gcm_gmult_4bit,\@function,2
 241 .align  16
 242 gcm_gmult_4bit:
 243 .cfi_startproc
 244         push    %rbx
 245 .cfi_push       %rbx
 246         push    %rbp            # %rbp and others are pushed exclusively in
 247 .cfi_push       %rbp
 248         push    %r12            # order to reuse Win64 exception handler...
 249 .cfi_push       %r12
 250         push    %r13
 251 .cfi_push       %r13
 252         push    %r14
 253 .cfi_push       %r14
 254         push    %r15
 255 .cfi_push       %r15
 256         sub     \$280,%rsp
 257 .cfi_adjust_cfa_offset  280
 258 .Lgmult_prologue:
 259
 260         movzb   15($Xi),$Zlo
 261         lea     .Lrem_4bit(%rip),$rem_4bit
 262 ___
 263         &loop   ($Xi);
 264 $code.=<<___;
 265         mov     $Zlo,8($Xi)
 266         mov     $Zhi,($Xi)
 267
 268         lea     280+48(%rsp),%rsi
 269 .cfi_def_cfa    %rsi,8
 270         mov     -8(%rsi),%rbx
 271 .cfi_restore    %rbx
 272         lea     (%rsi),%rsp
 273 .cfi_def_cfa_register   %rsp
 274 .Lgmult_epilogue:
 275         ret
 276 .cfi_endproc
 277 .size   gcm_gmult_4bit,.-gcm_gmult_4bit
 278 ___
 279 \f
 280 # per-function register layout
 281 $inp="%rdx";
 282 $len="%rcx";
 283 $rem_8bit=$rem_4bit;
 284
 285 $code.=<<___;
 286 .globl  gcm_ghash_4bit
 287 .type   gcm_ghash_4bit,\@function,4
 288 .align  16
 289 gcm_ghash_4bit:
 290 .cfi_startproc
 291         push    %rbx
 292 .cfi_push       %rbx
 293         push    %rbp
 294 .cfi_push       %rbp
 295         push    %r12
 296 .cfi_push       %r12
 297         push    %r13
 298 .cfi_push       %r13
 299         push    %r14
 300 .cfi_push       %r14
 301         push    %r15
 302 .cfi_push       %r15
 303         sub     \$280,%rsp
 304 .cfi_adjust_cfa_offset  280
 305 .Lghash_prologue:
 306         mov     $inp,%r14               # reassign couple of args
 307         mov     $len,%r15
 308 ___
 309 { my $inp="%r14";
 310   my $dat="%edx";
 311   my $len="%r15";
 312   my @nhi=("%ebx","%ecx");
 313   my @rem=("%r12","%r13");
 314   my $Hshr4="%rbp";
 315
 316         &sub    ($Htbl,-128);           # size optimization
 317         &lea    ($Hshr4,"16+128(%rsp)");
 318         { my @lo =($nlo,$nhi);
 319           my @hi =($Zlo,$Zhi);
 320
 321           &xor  ($dat,$dat);
 322           for ($i=0,$j=-2;$i<18;$i++,$j++) {
 323             &mov        ("$j(%rsp)",&LB($dat))          if ($i>1);
 324             &or         ($lo[0],$tmp)                   if ($i>1);
 325             &mov        (&LB($dat),&LB($lo[1]))         if ($i>0 && $i<17);
 326             &shr        ($lo[1],4)                      if ($i>0 && $i<17);
 327             &mov        ($tmp,$hi[1])                   if ($i>0 && $i<17);
 328             &shr        ($hi[1],4)                      if ($i>0 && $i<17);
 329             &mov        ("8*$j($Hshr4)",$hi[0])         if ($i>1);
 330             &mov        ($hi[0],"16*$i+0-128($Htbl)")   if ($i<16);
 331             &shl        (&LB($dat),4)                   if ($i>0 && $i<17);
 332             &mov        ("8*$j-128($Hshr4)",$lo[0])     if ($i>1);
 333             &mov        ($lo[0],"16*$i+8-128($Htbl)")   if ($i<16);
 334             &shl        ($tmp,60)                       if ($i>0 && $i<17);
 335
 336             push        (@lo,shift(@lo));
 337             push        (@hi,shift(@hi));
 338           }
 339         }
 340         &add    ($Htbl,-128);
 341         &mov    ($Zlo,"8($Xi)");
 342         &mov    ($Zhi,"0($Xi)");
 343         &add    ($len,$inp);            # pointer to the end of data
 344         &lea    ($rem_8bit,".Lrem_8bit(%rip)");
 345         &jmp    (".Louter_loop");
 346
 347 $code.=".align  16\n.Louter_loop:\n";
 348         &xor    ($Zhi,"($inp)");
 349         &mov    ("%rdx","8($inp)");
 350         &lea    ($inp,"16($inp)");
 351         &xor    ("%rdx",$Zlo);
 352         &mov    ("($Xi)",$Zhi);
 353         &mov    ("8($Xi)","%rdx");
 354         &shr    ("%rdx",32);
 355
 356         &xor    ($nlo,$nlo);
 357         &rol    ($dat,8);
 358         &mov    (&LB($nlo),&LB($dat));
 359         &movz   ($nhi[0],&LB($dat));
 360         &shl    (&LB($nlo),4);
 361         &shr    ($nhi[0],4);
 362
 363         for ($j=11,$i=0;$i<15;$i++) {
 364             &rol        ($dat,8);
 365             &xor        ($Zlo,"8($Htbl,$nlo)")                  if ($i>0);
 366             &xor        ($Zhi,"($Htbl,$nlo)")                   if ($i>0);
 367             &mov        ($Zlo,"8($Htbl,$nlo)")                  if ($i==0);
 368             &mov        ($Zhi,"($Htbl,$nlo)")                   if ($i==0);
 369
 370             &mov        (&LB($nlo),&LB($dat));
 371             &xor        ($Zlo,$tmp)                             if ($i>0);
 372             &movzw      ($rem[1],"($rem_8bit,$rem[1],2)")       if ($i>0);
 373
 374             &movz       ($nhi[1],&LB($dat));
 375             &shl        (&LB($nlo),4);
 376             &movzb      ($rem[0],"(%rsp,$nhi[0])");
 377
 378             &shr        ($nhi[1],4)                             if ($i<14);
 379             &and        ($nhi[1],0xf0)                          if ($i==14);
 380             &shl        ($rem[1],48)                            if ($i>0);
 381             &xor        ($rem[0],$Zlo);
 382
 383             &mov        ($tmp,$Zhi);
 384             &xor        ($Zhi,$rem[1])                          if ($i>0);
 385             &shr        ($Zlo,8);
 386
 387             &movz       ($rem[0],&LB($rem[0]));
 388             &mov        ($dat,"$j($Xi)")                        if (--$j%4==0);
 389             &shr        ($Zhi,8);
 390
 391             &xor        ($Zlo,"-128($Hshr4,$nhi[0],8)");
 392             &shl        ($tmp,56);
 393             &xor        ($Zhi,"($Hshr4,$nhi[0],8)");
 394
 395             unshift     (@nhi,pop(@nhi));               # "rotate" registers
 396             unshift     (@rem,pop(@rem));
 397         }
 398         &movzw  ($rem[1],"($rem_8bit,$rem[1],2)");
 399         &xor    ($Zlo,"8($Htbl,$nlo)");
 400         &xor    ($Zhi,"($Htbl,$nlo)");
 401
 402         &shl    ($rem[1],48);
 403         &xor    ($Zlo,$tmp);
 404
 405         &xor    ($Zhi,$rem[1]);
 406         &movz   ($rem[0],&LB($Zlo));
 407         &shr    ($Zlo,4);
 408
 409         &mov    ($tmp,$Zhi);
 410         &shl    (&LB($rem[0]),4);
 411         &shr    ($Zhi,4);
 412
 413         &xor    ($Zlo,"8($Htbl,$nhi[0])");
 414         &movzw  ($rem[0],"($rem_8bit,$rem[0],2)");
 415         &shl    ($tmp,60);
 416
 417         &xor    ($Zhi,"($Htbl,$nhi[0])");
 418         &xor    ($Zlo,$tmp);
 419         &shl    ($rem[0],48);
 420
 421         &bswap  ($Zlo);
 422         &xor    ($Zhi,$rem[0]);
 423
 424         &bswap  ($Zhi);
 425         &cmp    ($inp,$len);
 426         &jb     (".Louter_loop");
 427 }
 428 $code.=<<___;
 429         mov     $Zlo,8($Xi)
 430         mov     $Zhi,($Xi)
 431
 432         lea     280+48(%rsp),%rsi
 433 .cfi_def_cfa    %rsi,8
 434         mov     -48(%rsi),%r15
 435 .cfi_restore    %r15
 436         mov     -40(%rsi),%r14
 437 .cfi_restore    %r14
 438         mov     -32(%rsi),%r13
 439 .cfi_restore    %r13
 440         mov     -24(%rsi),%r12
 441 .cfi_restore    %r12
 442         mov     -16(%rsi),%rbp
 443 .cfi_restore    %rbp
 444         mov     -8(%rsi),%rbx
 445 .cfi_restore    %rbx
 446         lea     0(%rsi),%rsp
 447 .cfi_def_cfa_register   %rsp
 448 .Lghash_epilogue:
 449         ret
 450 .cfi_endproc
 451 .size   gcm_ghash_4bit,.-gcm_ghash_4bit
 452 ___
 453 \f
 454 ######################################################################
 455 # PCLMULQDQ version.
 456
 457 @_4args=$win64? ("%rcx","%rdx","%r8", "%r9") :  # Win64 order
 458                 ("%rdi","%rsi","%rdx","%rcx");  # Unix order
 459
 460 ($Xi,$Xhi)=("%xmm0","%xmm1");   $Hkey="%xmm2";
 461 ($T1,$T2,$T3)=("%xmm3","%xmm4","%xmm5");
 462
 463 sub clmul64x64_T2 {     # minimal register pressure
 464 my ($Xhi,$Xi,$Hkey,$HK)=@_;
 465
 466 if (!defined($HK)) {    $HK = $T2;
 467 $code.=<<___;
 468         movdqa          $Xi,$Xhi                #
 469         pshufd          \$0b01001110,$Xi,$T1
 470         pshufd          \$0b01001110,$Hkey,$T2
 471         pxor            $Xi,$T1                 #
 472         pxor            $Hkey,$T2
 473 ___
 474 } else {
 475 $code.=<<___;
 476         movdqa          $Xi,$Xhi                #
 477         pshufd          \$0b01001110,$Xi,$T1
 478         pxor            $Xi,$T1                 #
 479 ___
 480 }
 481 $code.=<<___;
 482         pclmulqdq       \$0x00,$Hkey,$Xi        #######
 483         pclmulqdq       \$0x11,$Hkey,$Xhi       #######
 484         pclmulqdq       \$0x00,$HK,$T1          #######
 485         pxor            $Xi,$T1                 #
 486         pxor            $Xhi,$T1                #
 487
 488         movdqa          $T1,$T2                 #
 489         psrldq          \$8,$T1
 490         pslldq          \$8,$T2                 #
 491         pxor            $T1,$Xhi
 492         pxor            $T2,$Xi                 #
 493 ___
 494 }
 495
 496 sub reduction_alg9 {    # 17/11 times faster than Intel version
 497 my ($Xhi,$Xi) = @_;
 498
 499 $code.=<<___;
 500         # 1st phase
 501         movdqa          $Xi,$T2                 #
 502         movdqa          $Xi,$T1
 503         psllq           \$5,$Xi
 504         pxor            $Xi,$T1                 #
 505         psllq           \$1,$Xi
 506         pxor            $T1,$Xi                 #
 507         psllq           \$57,$Xi                #
 508         movdqa          $Xi,$T1                 #
 509         pslldq          \$8,$Xi
 510         psrldq          \$8,$T1                 #
 511         pxor            $T2,$Xi
 512         pxor            $T1,$Xhi                #
 513
 514         # 2nd phase
 515         movdqa          $Xi,$T2
 516         psrlq           \$1,$Xi
 517         pxor            $T2,$Xhi                #
 518         pxor            $Xi,$T2
 519         psrlq           \$5,$Xi
 520         pxor            $T2,$Xi                 #
 521         psrlq           \$1,$Xi                 #
 522         pxor            $Xhi,$Xi                #
 523 ___
 524 }
 525 \f
 526 { my ($Htbl,$Xip)=@_4args;
 527   my $HK="%xmm6";
 528
 529 $code.=<<___;
 530 .globl  gcm_init_clmul
 531 .type   gcm_init_clmul,\@abi-omnipotent
 532 .align  16
 533 gcm_init_clmul:
 534 .cfi_startproc
 535 .L_init_clmul:
 536 ___
 537 $code.=<<___ if ($win64);
 538 .LSEH_begin_gcm_init_clmul:
 539         # I can't trust assembler to use specific encoding:-(
 540         .byte   0x48,0x83,0xec,0x18             #sub    $0x18,%rsp
 541         .byte   0x0f,0x29,0x34,0x24             #movaps %xmm6,(%rsp)
 542 ___
 543 $code.=<<___;
 544         movdqu          ($Xip),$Hkey
 545         pshufd          \$0b01001110,$Hkey,$Hkey        # dword swap
 546
 547         # <<1 twist
 548         pshufd          \$0b11111111,$Hkey,$T2  # broadcast uppermost dword
 549         movdqa          $Hkey,$T1
 550         psllq           \$1,$Hkey
 551         pxor            $T3,$T3                 #
 552         psrlq           \$63,$T1
 553         pcmpgtd         $T2,$T3                 # broadcast carry bit
 554         pslldq          \$8,$T1
 555         por             $T1,$Hkey               # H<<=1
 556
 557         # magic reduction
 558         pand            .L0x1c2_polynomial(%rip),$T3
 559         pxor            $T3,$Hkey               # if(carry) H^=0x1c2_polynomial
 560
 561         # calculate H^2
 562         pshufd          \$0b01001110,$Hkey,$HK
 563         movdqa          $Hkey,$Xi
 564         pxor            $Hkey,$HK
 565 ___
 566         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$HK);
 567         &reduction_alg9 ($Xhi,$Xi);
 568 $code.=<<___;
 569         pshufd          \$0b01001110,$Hkey,$T1
 570         pshufd          \$0b01001110,$Xi,$T2
 571         pxor            $Hkey,$T1               # Karatsuba pre-processing
 572         movdqu          $Hkey,0x00($Htbl)       # save H
 573         pxor            $Xi,$T2                 # Karatsuba pre-processing
 574         movdqu          $Xi,0x10($Htbl)         # save H^2
 575         palignr         \$8,$T1,$T2             # low part is H.lo^H.hi...
 576         movdqu          $T2,0x20($Htbl)         # save Karatsuba "salt"
 577 ___
 578 if ($do4xaggr) {
 579         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$HK);   # H^3
 580         &reduction_alg9 ($Xhi,$Xi);
 581 $code.=<<___;
 582         movdqa          $Xi,$T3
 583 ___
 584         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$HK);   # H^4
 585         &reduction_alg9 ($Xhi,$Xi);
 586 $code.=<<___;
 587         pshufd          \$0b01001110,$T3,$T1
 588         pshufd          \$0b01001110,$Xi,$T2
 589         pxor            $T3,$T1                 # Karatsuba pre-processing
 590         movdqu          $T3,0x30($Htbl)         # save H^3
 591         pxor            $Xi,$T2                 # Karatsuba pre-processing
 592         movdqu          $Xi,0x40($Htbl)         # save H^4
 593         palignr         \$8,$T1,$T2             # low part is H^3.lo^H^3.hi...
 594         movdqu          $T2,0x50($Htbl)         # save Karatsuba "salt"
 595 ___
 596 }
 597 $code.=<<___ if ($win64);
 598         movaps  (%rsp),%xmm6
 599         lea     0x18(%rsp),%rsp
 600 .LSEH_end_gcm_init_clmul:
 601 ___
 602 $code.=<<___;
 603         ret
 604 .cfi_endproc
 605 .size   gcm_init_clmul,.-gcm_init_clmul
 606 ___
 607 }
 608
 609 { my ($Xip,$Htbl)=@_4args;
 610
 611 $code.=<<___;
 612 .globl  gcm_gmult_clmul
 613 .type   gcm_gmult_clmul,\@abi-omnipotent
 614 .align  16
 615 gcm_gmult_clmul:
 616 .cfi_startproc
 617 .L_gmult_clmul:
 618         movdqu          ($Xip),$Xi
 619         movdqa          .Lbswap_mask(%rip),$T3
 620         movdqu          ($Htbl),$Hkey
 621         movdqu          0x20($Htbl),$T2
 622         pshufb          $T3,$Xi
 623 ___
 624         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$T2);
 625 $code.=<<___ if (0 || (&reduction_alg9($Xhi,$Xi)&&0));
 626         # experimental alternative. special thing about is that there
 627         # no dependency between the two multiplications...
 628         mov             \$`0xE1<<1`,%eax
 629         mov             \$0xA040608020C0E000,%r10       # ((7..0)·0xE0)&0xff
 630         mov             \$0x07,%r11d
 631         movq            %rax,$T1
 632         movq            %r10,$T2
 633         movq            %r11,$T3                # borrow $T3
 634         pand            $Xi,$T3
 635         pshufb          $T3,$T2                 # ($Xi&7)·0xE0
 636         movq            %rax,$T3
 637         pclmulqdq       \$0x00,$Xi,$T1          # ·(0xE1<<1)
 638         pxor            $Xi,$T2
 639         pslldq          \$15,$T2
 640         paddd           $T2,$T2                 # <<(64+56+1)
 641         pxor            $T2,$Xi
 642         pclmulqdq       \$0x01,$T3,$Xi
 643         movdqa          .Lbswap_mask(%rip),$T3  # reload $T3
 644         psrldq          \$1,$T1
 645         pxor            $T1,$Xhi
 646         pslldq          \$7,$Xi
 647         pxor            $Xhi,$Xi
 648 ___
 649 $code.=<<___;
 650         pshufb          $T3,$Xi
 651         movdqu          $Xi,($Xip)
 652         ret
 653 .cfi_endproc
 654 .size   gcm_gmult_clmul,.-gcm_gmult_clmul
 655 ___
 656 }
 657 \f
 658 { my ($Xip,$Htbl,$inp,$len)=@_4args;
 659   my ($Xln,$Xmn,$Xhn,$Hkey2,$HK) = map("%xmm$_",(3..7));
 660   my ($T1,$T2,$T3)=map("%xmm$_",(8..10));
 661
 662 $code.=<<___;
 663 .globl  gcm_ghash_clmul
 664 .type   gcm_ghash_clmul,\@abi-omnipotent
 665 .align  32
 666 gcm_ghash_clmul:
 667 .cfi_startproc
 668 .L_ghash_clmul:
 669 ___
 670 $code.=<<___ if ($win64);
 671         lea     -0x88(%rsp),%rax
 672 .LSEH_begin_gcm_ghash_clmul:
 673         # I can't trust assembler to use specific encoding:-(
 674         .byte   0x48,0x8d,0x60,0xe0             #lea    -0x20(%rax),%rsp
 675         .byte   0x0f,0x29,0x70,0xe0             #movaps %xmm6,-0x20(%rax)
 676         .byte   0x0f,0x29,0x78,0xf0             #movaps %xmm7,-0x10(%rax)
 677         .byte   0x44,0x0f,0x29,0x00             #movaps %xmm8,0(%rax)
 678         .byte   0x44,0x0f,0x29,0x48,0x10        #movaps %xmm9,0x10(%rax)
 679         .byte   0x44,0x0f,0x29,0x50,0x20        #movaps %xmm10,0x20(%rax)
 680         .byte   0x44,0x0f,0x29,0x58,0x30        #movaps %xmm11,0x30(%rax)
 681         .byte   0x44,0x0f,0x29,0x60,0x40        #movaps %xmm12,0x40(%rax)
 682         .byte   0x44,0x0f,0x29,0x68,0x50        #movaps %xmm13,0x50(%rax)
 683         .byte   0x44,0x0f,0x29,0x70,0x60        #movaps %xmm14,0x60(%rax)
 684         .byte   0x44,0x0f,0x29,0x78,0x70        #movaps %xmm15,0x70(%rax)
 685 ___
 686 $code.=<<___;
 687         movdqa          .Lbswap_mask(%rip),$T3
 688
 689         movdqu          ($Xip),$Xi
 690         movdqu          ($Htbl),$Hkey
 691         movdqu          0x20($Htbl),$HK
 692         pshufb          $T3,$Xi
 693
 694         sub             \$0x10,$len
 695         jz              .Lodd_tail
 696
 697         movdqu          0x10($Htbl),$Hkey2
 698 ___
 699 if ($do4xaggr) {
 700 my ($Xl,$Xm,$Xh,$Hkey3,$Hkey4)=map("%xmm$_",(11..15));
 701
 702 $code.=<<___;
 703         mov             OPENSSL_ia32cap_P+4(%rip),%eax
 704         cmp             \$0x30,$len
 705         jb              .Lskip4x
 706
 707         and             \$`1<<26|1<<22`,%eax    # isolate MOVBE+XSAVE
 708         cmp             \$`1<<22`,%eax          # check for MOVBE without XSAVE
 709         je              .Lskip4x
 710
 711         sub             \$0x30,$len
 712         mov             \$0xA040608020C0E000,%rax       # ((7..0)·0xE0)&0xff
 713         movdqu          0x30($Htbl),$Hkey3
 714         movdqu          0x40($Htbl),$Hkey4
 715
 716         #######
 717         # Xi+4 =[(H*Ii+3) + (H^2*Ii+2) + (H^3*Ii+1) + H^4*(Ii+Xi)] mod P
 718         #
 719         movdqu          0x30($inp),$Xln
 720          movdqu         0x20($inp),$Xl
 721         pshufb          $T3,$Xln
 722          pshufb         $T3,$Xl
 723         movdqa          $Xln,$Xhn
 724         pshufd          \$0b01001110,$Xln,$Xmn
 725         pxor            $Xln,$Xmn
 726         pclmulqdq       \$0x00,$Hkey,$Xln
 727         pclmulqdq       \$0x11,$Hkey,$Xhn
 728         pclmulqdq       \$0x00,$HK,$Xmn
 729
 730         movdqa          $Xl,$Xh
 731         pshufd          \$0b01001110,$Xl,$Xm
 732         pxor            $Xl,$Xm
 733         pclmulqdq       \$0x00,$Hkey2,$Xl
 734         pclmulqdq       \$0x11,$Hkey2,$Xh
 735         pclmulqdq       \$0x10,$HK,$Xm
 736         xorps           $Xl,$Xln
 737         xorps           $Xh,$Xhn
 738         movups          0x50($Htbl),$HK
 739         xorps           $Xm,$Xmn
 740
 741         movdqu          0x10($inp),$Xl
 742          movdqu         0($inp),$T1
 743         pshufb          $T3,$Xl
 744          pshufb         $T3,$T1
 745         movdqa          $Xl,$Xh
 746         pshufd          \$0b01001110,$Xl,$Xm
 747          pxor           $T1,$Xi
 748         pxor            $Xl,$Xm
 749         pclmulqdq       \$0x00,$Hkey3,$Xl
 750          movdqa         $Xi,$Xhi
 751          pshufd         \$0b01001110,$Xi,$T1
 752          pxor           $Xi,$T1
 753         pclmulqdq       \$0x11,$Hkey3,$Xh
 754         pclmulqdq       \$0x00,$HK,$Xm
 755         xorps           $Xl,$Xln
 756         xorps           $Xh,$Xhn
 757
 758         lea     0x40($inp),$inp
 759         sub     \$0x40,$len
 760         jc      .Ltail4x
 761
 762         jmp     .Lmod4_loop
 763 .align  32
 764 .Lmod4_loop:
 765         pclmulqdq       \$0x00,$Hkey4,$Xi
 766         xorps           $Xm,$Xmn
 767          movdqu         0x30($inp),$Xl
 768          pshufb         $T3,$Xl
 769         pclmulqdq       \$0x11,$Hkey4,$Xhi
 770         xorps           $Xln,$Xi
 771          movdqu         0x20($inp),$Xln
 772          movdqa         $Xl,$Xh
 773         pclmulqdq       \$0x10,$HK,$T1
 774          pshufd         \$0b01001110,$Xl,$Xm
 775         xorps           $Xhn,$Xhi
 776          pxor           $Xl,$Xm
 777          pshufb         $T3,$Xln
 778         movups          0x20($Htbl),$HK
 779         xorps           $Xmn,$T1
 780          pclmulqdq      \$0x00,$Hkey,$Xl
 781          pshufd         \$0b01001110,$Xln,$Xmn
 782
 783         pxor            $Xi,$T1                 # aggregated Karatsuba post-processing
 784          movdqa         $Xln,$Xhn
 785         pxor            $Xhi,$T1                #
 786          pxor           $Xln,$Xmn
 787         movdqa          $T1,$T2                 #
 788          pclmulqdq      \$0x11,$Hkey,$Xh
 789         pslldq          \$8,$T1
 790         psrldq          \$8,$T2                 #
 791         pxor            $T1,$Xi
 792         movdqa          .L7_mask(%rip),$T1
 793         pxor            $T2,$Xhi                #
 794         movq            %rax,$T2
 795
 796         pand            $Xi,$T1                 # 1st phase
 797         pshufb          $T1,$T2                 #
 798         pxor            $Xi,$T2                 #
 799          pclmulqdq      \$0x00,$HK,$Xm
 800         psllq           \$57,$T2                #
 801         movdqa          $T2,$T1                 #
 802         pslldq          \$8,$T2
 803          pclmulqdq      \$0x00,$Hkey2,$Xln
 804         psrldq          \$8,$T1                 #
 805         pxor            $T2,$Xi
 806         pxor            $T1,$Xhi                #
 807         movdqu          0($inp),$T1
 808
 809         movdqa          $Xi,$T2                 # 2nd phase
 810         psrlq           \$1,$Xi
 811          pclmulqdq      \$0x11,$Hkey2,$Xhn
 812          xorps          $Xl,$Xln
 813          movdqu         0x10($inp),$Xl
 814          pshufb         $T3,$Xl
 815          pclmulqdq      \$0x10,$HK,$Xmn
 816          xorps          $Xh,$Xhn
 817          movups         0x50($Htbl),$HK
 818         pshufb          $T3,$T1
 819         pxor            $T2,$Xhi                #
 820         pxor            $Xi,$T2
 821         psrlq           \$5,$Xi
 822
 823          movdqa         $Xl,$Xh
 824          pxor           $Xm,$Xmn
 825          pshufd         \$0b01001110,$Xl,$Xm
 826         pxor            $T2,$Xi                 #
 827         pxor            $T1,$Xhi
 828          pxor           $Xl,$Xm
 829          pclmulqdq      \$0x00,$Hkey3,$Xl
 830         psrlq           \$1,$Xi                 #
 831         pxor            $Xhi,$Xi                #
 832         movdqa          $Xi,$Xhi
 833          pclmulqdq      \$0x11,$Hkey3,$Xh
 834          xorps          $Xl,$Xln
 835         pshufd          \$0b01001110,$Xi,$T1
 836         pxor            $Xi,$T1
 837
 838          pclmulqdq      \$0x00,$HK,$Xm
 839          xorps          $Xh,$Xhn
 840
 841         lea     0x40($inp),$inp
 842         sub     \$0x40,$len
 843         jnc     .Lmod4_loop
 844
 845 .Ltail4x:
 846         pclmulqdq       \$0x00,$Hkey4,$Xi
 847         pclmulqdq       \$0x11,$Hkey4,$Xhi
 848         pclmulqdq       \$0x10,$HK,$T1
 849         xorps           $Xm,$Xmn
 850         xorps           $Xln,$Xi
 851         xorps           $Xhn,$Xhi
 852         pxor            $Xi,$Xhi                # aggregated Karatsuba post-processing
 853         pxor            $Xmn,$T1
 854
 855         pxor            $Xhi,$T1                #
 856         pxor            $Xi,$Xhi
 857
 858         movdqa          $T1,$T2                 #
 859         psrldq          \$8,$T1
 860         pslldq          \$8,$T2                 #
 861         pxor            $T1,$Xhi
 862         pxor            $T2,$Xi                 #
 863 ___
 864         &reduction_alg9($Xhi,$Xi);
 865 $code.=<<___;
 866         add     \$0x40,$len
 867         jz      .Ldone
 868         movdqu  0x20($Htbl),$HK
 869         sub     \$0x10,$len
 870         jz      .Lodd_tail
 871 .Lskip4x:
 872 ___
 873 }
 874 $code.=<<___;
 875         #######
 876         # Xi+2 =[H*(Ii+1 + Xi+1)] mod P =
 877         #       [(H*Ii+1) + (H*Xi+1)] mod P =
 878         #       [(H*Ii+1) + H^2*(Ii+Xi)] mod P
 879         #
 880         movdqu          ($inp),$T1              # Ii
 881         movdqu          16($inp),$Xln           # Ii+1
 882         pshufb          $T3,$T1
 883         pshufb          $T3,$Xln
 884         pxor            $T1,$Xi                 # Ii+Xi
 885
 886         movdqa          $Xln,$Xhn
 887         pshufd          \$0b01001110,$Xln,$Xmn
 888         pxor            $Xln,$Xmn
 889         pclmulqdq       \$0x00,$Hkey,$Xln
 890         pclmulqdq       \$0x11,$Hkey,$Xhn
 891         pclmulqdq       \$0x00,$HK,$Xmn
 892
 893         lea             32($inp),$inp           # i+=2
 894         nop
 895         sub             \$0x20,$len
 896         jbe             .Leven_tail
 897         nop
 898         jmp             .Lmod_loop
 899
 900 .align  32
 901 .Lmod_loop:
 902         movdqa          $Xi,$Xhi
 903         movdqa          $Xmn,$T1
 904         pshufd          \$0b01001110,$Xi,$Xmn   #
 905         pxor            $Xi,$Xmn                #
 906
 907         pclmulqdq       \$0x00,$Hkey2,$Xi
 908         pclmulqdq       \$0x11,$Hkey2,$Xhi
 909         pclmulqdq       \$0x10,$HK,$Xmn
 910
 911         pxor            $Xln,$Xi                # (H*Ii+1) + H^2*(Ii+Xi)
 912         pxor            $Xhn,$Xhi
 913           movdqu        ($inp),$T2              # Ii
 914         pxor            $Xi,$T1                 # aggregated Karatsuba post-processing
 915           pshufb        $T3,$T2
 916           movdqu        16($inp),$Xln           # Ii+1
 917
 918         pxor            $Xhi,$T1
 919           pxor          $T2,$Xhi                # "Ii+Xi", consume early
 920         pxor            $T1,$Xmn
 921          pshufb         $T3,$Xln
 922         movdqa          $Xmn,$T1                #
 923         psrldq          \$8,$T1
 924         pslldq          \$8,$Xmn                #
 925         pxor            $T1,$Xhi
 926         pxor            $Xmn,$Xi                #
 927
 928         movdqa          $Xln,$Xhn               #
 929
 930           movdqa        $Xi,$T2                 # 1st phase
 931           movdqa        $Xi,$T1
 932           psllq         \$5,$Xi
 933           pxor          $Xi,$T1                 #
 934         pclmulqdq       \$0x00,$Hkey,$Xln       #######
 935           psllq         \$1,$Xi
 936           pxor          $T1,$Xi                 #
 937           psllq         \$57,$Xi                #
 938           movdqa        $Xi,$T1                 #
 939           pslldq        \$8,$Xi
 940           psrldq        \$8,$T1                 #
 941           pxor          $T2,$Xi
 942         pshufd          \$0b01001110,$Xhn,$Xmn
 943           pxor          $T1,$Xhi                #
 944         pxor            $Xhn,$Xmn               #
 945
 946           movdqa        $Xi,$T2                 # 2nd phase
 947           psrlq         \$1,$Xi
 948         pclmulqdq       \$0x11,$Hkey,$Xhn       #######
 949           pxor          $T2,$Xhi                #
 950           pxor          $Xi,$T2
 951           psrlq         \$5,$Xi
 952           pxor          $T2,$Xi                 #
 953         lea             32($inp),$inp
 954           psrlq         \$1,$Xi                 #
 955         pclmulqdq       \$0x00,$HK,$Xmn         #######
 956           pxor          $Xhi,$Xi                #
 957
 958         sub             \$0x20,$len
 959         ja              .Lmod_loop
 960
 961 .Leven_tail:
 962          movdqa         $Xi,$Xhi
 963          movdqa         $Xmn,$T1
 964          pshufd         \$0b01001110,$Xi,$Xmn   #
 965          pxor           $Xi,$Xmn                #
 966
 967         pclmulqdq       \$0x00,$Hkey2,$Xi
 968         pclmulqdq       \$0x11,$Hkey2,$Xhi
 969         pclmulqdq       \$0x10,$HK,$Xmn
 970
 971         pxor            $Xln,$Xi                # (H*Ii+1) + H^2*(Ii+Xi)
 972         pxor            $Xhn,$Xhi
 973         pxor            $Xi,$T1
 974         pxor            $Xhi,$T1
 975         pxor            $T1,$Xmn
 976         movdqa          $Xmn,$T1                #
 977         psrldq          \$8,$T1
 978         pslldq          \$8,$Xmn                #
 979         pxor            $T1,$Xhi
 980         pxor            $Xmn,$Xi                #
 981 ___
 982         &reduction_alg9 ($Xhi,$Xi);
 983 $code.=<<___;
 984         test            $len,$len
 985         jnz             .Ldone
 986
 987 .Lodd_tail:
 988         movdqu          ($inp),$T1              # Ii
 989         pshufb          $T3,$T1
 990         pxor            $T1,$Xi                 # Ii+Xi
 991 ___
 992         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$HK);   # H*(Ii+Xi)
 993         &reduction_alg9 ($Xhi,$Xi);
 994 $code.=<<___;
 995 .Ldone:
 996         pshufb          $T3,$Xi
 997         movdqu          $Xi,($Xip)
 998 ___
 999 $code.=<<___ if ($win64);
1000         movaps  (%rsp),%xmm6
1001         movaps  0x10(%rsp),%xmm7
1002         movaps  0x20(%rsp),%xmm8
1003         movaps  0x30(%rsp),%xmm9
1004         movaps  0x40(%rsp),%xmm10
1005         movaps  0x50(%rsp),%xmm11
1006         movaps  0x60(%rsp),%xmm12
1007         movaps  0x70(%rsp),%xmm13
1008         movaps  0x80(%rsp),%xmm14
1009         movaps  0x90(%rsp),%xmm15
1010         lea     0xa8(%rsp),%rsp
1011 .LSEH_end_gcm_ghash_clmul:
1012 ___
1013 $code.=<<___;
1014         ret
1015 .cfi_endproc
1016 .size   gcm_ghash_clmul,.-gcm_ghash_clmul
1017 ___
1018 }
1019 \f
1020 $code.=<<___;
1021 .globl  gcm_init_avx
1022 .type   gcm_init_avx,\@abi-omnipotent
1023 .align  32
1024 gcm_init_avx:
1025 .cfi_startproc
1026 ___
1027 if ($avx) {
1028 my ($Htbl,$Xip)=@_4args;
1029 my $HK="%xmm6";
1030
1031 $code.=<<___ if ($win64);
1032 .LSEH_begin_gcm_init_avx:
1033         # I can't trust assembler to use specific encoding:-(
1034         .byte   0x48,0x83,0xec,0x18             #sub    $0x18,%rsp
1035         .byte   0x0f,0x29,0x34,0x24             #movaps %xmm6,(%rsp)
1036 ___
1037 $code.=<<___;
1038         vzeroupper
1039
1040         vmovdqu         ($Xip),$Hkey
1041         vpshufd         \$0b01001110,$Hkey,$Hkey        # dword swap
1042
1043         # <<1 twist
1044         vpshufd         \$0b11111111,$Hkey,$T2  # broadcast uppermost dword
1045         vpsrlq          \$63,$Hkey,$T1
1046         vpsllq          \$1,$Hkey,$Hkey
1047         vpxor           $T3,$T3,$T3             #
1048         vpcmpgtd        $T2,$T3,$T3             # broadcast carry bit
1049         vpslldq         \$8,$T1,$T1
1050         vpor            $T1,$Hkey,$Hkey         # H<<=1
1051
1052         # magic reduction
1053         vpand           .L0x1c2_polynomial(%rip),$T3,$T3
1054         vpxor           $T3,$Hkey,$Hkey         # if(carry) H^=0x1c2_polynomial
1055
1056         vpunpckhqdq     $Hkey,$Hkey,$HK
1057         vmovdqa         $Hkey,$Xi
1058         vpxor           $Hkey,$HK,$HK
1059         mov             \$4,%r10                # up to H^8
1060         jmp             .Linit_start_avx
1061 ___
1062
1063 sub clmul64x64_avx {
1064 my ($Xhi,$Xi,$Hkey,$HK)=@_;
1065
1066 if (!defined($HK)) {    $HK = $T2;
1067 $code.=<<___;
1068         vpunpckhqdq     $Xi,$Xi,$T1
1069         vpunpckhqdq     $Hkey,$Hkey,$T2
1070         vpxor           $Xi,$T1,$T1             #
1071         vpxor           $Hkey,$T2,$T2
1072 ___
1073 } else {
1074 $code.=<<___;
1075         vpunpckhqdq     $Xi,$Xi,$T1
1076         vpxor           $Xi,$T1,$T1             #
1077 ___
1078 }
1079 $code.=<<___;
1080         vpclmulqdq      \$0x11,$Hkey,$Xi,$Xhi   #######
1081         vpclmulqdq      \$0x00,$Hkey,$Xi,$Xi    #######
1082         vpclmulqdq      \$0x00,$HK,$T1,$T1      #######
1083         vpxor           $Xi,$Xhi,$T2            #
1084         vpxor           $T2,$T1,$T1             #
1085
1086         vpslldq         \$8,$T1,$T2             #
1087         vpsrldq         \$8,$T1,$T1
1088         vpxor           $T2,$Xi,$Xi             #
1089         vpxor           $T1,$Xhi,$Xhi
1090 ___
1091 }
1092
1093 sub reduction_avx {
1094 my ($Xhi,$Xi) = @_;
1095
1096 $code.=<<___;
1097         vpsllq          \$57,$Xi,$T1            # 1st phase
1098         vpsllq          \$62,$Xi,$T2
1099         vpxor           $T1,$T2,$T2             #
1100         vpsllq          \$63,$Xi,$T1
1101         vpxor           $T1,$T2,$T2             #
1102         vpslldq         \$8,$T2,$T1             #
1103         vpsrldq         \$8,$T2,$T2
1104         vpxor           $T1,$Xi,$Xi             #
1105         vpxor           $T2,$Xhi,$Xhi
1106
1107         vpsrlq          \$1,$Xi,$T2             # 2nd phase
1108         vpxor           $Xi,$Xhi,$Xhi
1109         vpxor           $T2,$Xi,$Xi             #
1110         vpsrlq          \$5,$T2,$T2
1111         vpxor           $T2,$Xi,$Xi             #
1112         vpsrlq          \$1,$Xi,$Xi             #
1113         vpxor           $Xhi,$Xi,$Xi            #
1114 ___
1115 }
1116
1117 $code.=<<___;
1118 .align  32
1119 .Linit_loop_avx:
1120         vpalignr        \$8,$T1,$T2,$T3         # low part is H.lo^H.hi...
1121         vmovdqu         $T3,-0x10($Htbl)        # save Karatsuba "salt"
1122 ___
1123         &clmul64x64_avx ($Xhi,$Xi,$Hkey,$HK);   # calculate H^3,5,7
1124         &reduction_avx  ($Xhi,$Xi);
1125 $code.=<<___;
1126 .Linit_start_avx:
1127         vmovdqa         $Xi,$T3
1128 ___
1129         &clmul64x64_avx ($Xhi,$Xi,$Hkey,$HK);   # calculate H^2,4,6,8
1130         &reduction_avx  ($Xhi,$Xi);
1131 $code.=<<___;
1132         vpshufd         \$0b01001110,$T3,$T1
1133         vpshufd         \$0b01001110,$Xi,$T2
1134         vpxor           $T3,$T1,$T1             # Karatsuba pre-processing
1135         vmovdqu         $T3,0x00($Htbl)         # save H^1,3,5,7
1136         vpxor           $Xi,$T2,$T2             # Karatsuba pre-processing
1137         vmovdqu         $Xi,0x10($Htbl)         # save H^2,4,6,8
1138         lea             0x30($Htbl),$Htbl
1139         sub             \$1,%r10
1140         jnz             .Linit_loop_avx
1141
1142         vpalignr        \$8,$T2,$T1,$T3         # last "salt" is flipped
1143         vmovdqu         $T3,-0x10($Htbl)
1144
1145         vzeroupper
1146 ___
1147 $code.=<<___ if ($win64);
1148         movaps  (%rsp),%xmm6
1149         lea     0x18(%rsp),%rsp
1150 .LSEH_end_gcm_init_avx:
1151 ___
1152 $code.=<<___;
1153         ret
1154 .cfi_endproc
1155 .size   gcm_init_avx,.-gcm_init_avx
1156 ___
1157 } else {
1158 $code.=<<___;
1159         jmp     .L_init_clmul
1160 .cfi_endproc
1161 .size   gcm_init_avx,.-gcm_init_avx
1162 ___
1163 }
1164
1165 $code.=<<___;
1166 .globl  gcm_gmult_avx
1167 .type   gcm_gmult_avx,\@abi-omnipotent
1168 .align  32
1169 gcm_gmult_avx:
1170 .cfi_startproc
1171         jmp     .L_gmult_clmul
1172 .cfi_endproc
1173 .size   gcm_gmult_avx,.-gcm_gmult_avx
1174 ___
1175 \f
1176 $code.=<<___;
1177 .globl  gcm_ghash_avx
1178 .type   gcm_ghash_avx,\@abi-omnipotent
1179 .align  32
1180 gcm_ghash_avx:
1181 .cfi_startproc
1182 ___
1183 if ($avx) {
1184 my ($Xip,$Htbl,$inp,$len)=@_4args;
1185 my ($Xlo,$Xhi,$Xmi,
1186     $Zlo,$Zhi,$Zmi,
1187     $Hkey,$HK,$T1,$T2,
1188     $Xi,$Xo,$Tred,$bswap,$Ii,$Ij) = map("%xmm$_",(0..15));
1189
1190 $code.=<<___ if ($win64);
1191         lea     -0x88(%rsp),%rax
1192 .LSEH_begin_gcm_ghash_avx:
1193         # I can't trust assembler to use specific encoding:-(
1194         .byte   0x48,0x8d,0x60,0xe0             #lea    -0x20(%rax),%rsp
1195         .byte   0x0f,0x29,0x70,0xe0             #movaps %xmm6,-0x20(%rax)
1196         .byte   0x0f,0x29,0x78,0xf0             #movaps %xmm7,-0x10(%rax)
1197         .byte   0x44,0x0f,0x29,0x00             #movaps %xmm8,0(%rax)
1198         .byte   0x44,0x0f,0x29,0x48,0x10        #movaps %xmm9,0x10(%rax)
1199         .byte   0x44,0x0f,0x29,0x50,0x20        #movaps %xmm10,0x20(%rax)
1200         .byte   0x44,0x0f,0x29,0x58,0x30        #movaps %xmm11,0x30(%rax)
1201         .byte   0x44,0x0f,0x29,0x60,0x40        #movaps %xmm12,0x40(%rax)
1202         .byte   0x44,0x0f,0x29,0x68,0x50        #movaps %xmm13,0x50(%rax)
1203         .byte   0x44,0x0f,0x29,0x70,0x60        #movaps %xmm14,0x60(%rax)
1204         .byte   0x44,0x0f,0x29,0x78,0x70        #movaps %xmm15,0x70(%rax)
1205 ___
1206 $code.=<<___;
1207         vzeroupper
1208
1209         vmovdqu         ($Xip),$Xi              # load $Xi
1210         lea             .L0x1c2_polynomial(%rip),%r10
1211         lea             0x40($Htbl),$Htbl       # size optimization
1212         vmovdqu         .Lbswap_mask(%rip),$bswap
1213         vpshufb         $bswap,$Xi,$Xi
1214         cmp             \$0x80,$len
1215         jb              .Lshort_avx
1216         sub             \$0x80,$len
1217
1218         vmovdqu         0x70($inp),$Ii          # I[7]
1219         vmovdqu         0x00-0x40($Htbl),$Hkey  # $Hkey^1
1220         vpshufb         $bswap,$Ii,$Ii
1221         vmovdqu         0x20-0x40($Htbl),$HK
1222
1223         vpunpckhqdq     $Ii,$Ii,$T2
1224          vmovdqu        0x60($inp),$Ij          # I[6]
1225         vpclmulqdq      \$0x00,$Hkey,$Ii,$Xlo
1226         vpxor           $Ii,$T2,$T2
1227          vpshufb        $bswap,$Ij,$Ij
1228         vpclmulqdq      \$0x11,$Hkey,$Ii,$Xhi
1229          vmovdqu        0x10-0x40($Htbl),$Hkey  # $Hkey^2
1230          vpunpckhqdq    $Ij,$Ij,$T1
1231          vmovdqu        0x50($inp),$Ii          # I[5]
1232         vpclmulqdq      \$0x00,$HK,$T2,$Xmi
1233          vpxor          $Ij,$T1,$T1
1234
1235          vpshufb        $bswap,$Ii,$Ii
1236         vpclmulqdq      \$0x00,$Hkey,$Ij,$Zlo
1237          vpunpckhqdq    $Ii,$Ii,$T2
1238         vpclmulqdq      \$0x11,$Hkey,$Ij,$Zhi
1239          vmovdqu        0x30-0x40($Htbl),$Hkey  # $Hkey^3
1240          vpxor          $Ii,$T2,$T2
1241          vmovdqu        0x40($inp),$Ij          # I[4]
1242         vpclmulqdq      \$0x10,$HK,$T1,$Zmi
1243          vmovdqu        0x50-0x40($Htbl),$HK
1244
1245          vpshufb        $bswap,$Ij,$Ij
1246         vpxor           $Xlo,$Zlo,$Zlo
1247         vpclmulqdq      \$0x00,$Hkey,$Ii,$Xlo
1248         vpxor           $Xhi,$Zhi,$Zhi
1249          vpunpckhqdq    $Ij,$Ij,$T1
1250         vpclmulqdq      \$0x11,$Hkey,$Ii,$Xhi
1251          vmovdqu        0x40-0x40($Htbl),$Hkey  # $Hkey^4
1252         vpxor           $Xmi,$Zmi,$Zmi
1253         vpclmulqdq      \$0x00,$HK,$T2,$Xmi
1254          vpxor          $Ij,$T1,$T1
1255
1256          vmovdqu        0x30($inp),$Ii          # I[3]
1257         vpxor           $Zlo,$Xlo,$Xlo
1258         vpclmulqdq      \$0x00,$Hkey,$Ij,$Zlo
1259         vpxor           $Zhi,$Xhi,$Xhi
1260          vpshufb        $bswap,$Ii,$Ii
1261         vpclmulqdq      \$0x11,$Hkey,$Ij,$Zhi
1262          vmovdqu        0x60-0x40($Htbl),$Hkey  # $Hkey^5
1263         vpxor           $Zmi,$Xmi,$Xmi
1264          vpunpckhqdq    $Ii,$Ii,$T2
1265         vpclmulqdq      \$0x10,$HK,$T1,$Zmi
1266          vmovdqu        0x80-0x40($Htbl),$HK
1267          vpxor          $Ii,$T2,$T2
1268
1269          vmovdqu        0x20($inp),$Ij          # I[2]
1270         vpxor           $Xlo,$Zlo,$Zlo
1271         vpclmulqdq      \$0x00,$Hkey,$Ii,$Xlo
1272         vpxor           $Xhi,$Zhi,$Zhi
1273          vpshufb        $bswap,$Ij,$Ij
1274         vpclmulqdq      \$0x11,$Hkey,$Ii,$Xhi
1275          vmovdqu        0x70-0x40($Htbl),$Hkey  # $Hkey^6
1276         vpxor           $Xmi,$Zmi,$Zmi
1277          vpunpckhqdq    $Ij,$Ij,$T1
1278         vpclmulqdq      \$0x00,$HK,$T2,$Xmi
1279          vpxor          $Ij,$T1,$T1
1280
1281          vmovdqu        0x10($inp),$Ii          # I[1]
1282         vpxor           $Zlo,$Xlo,$Xlo
1283         vpclmulqdq      \$0x00,$Hkey,$Ij,$Zlo
1284         vpxor           $Zhi,$Xhi,$Xhi
1285          vpshufb        $bswap,$Ii,$Ii
1286         vpclmulqdq      \$0x11,$Hkey,$Ij,$Zhi
1287          vmovdqu        0x90-0x40($Htbl),$Hkey  # $Hkey^7
1288         vpxor           $Zmi,$Xmi,$Xmi
1289          vpunpckhqdq    $Ii,$Ii,$T2
1290         vpclmulqdq      \$0x10,$HK,$T1,$Zmi
1291          vmovdqu        0xb0-0x40($Htbl),$HK
1292          vpxor          $Ii,$T2,$T2
1293
1294          vmovdqu        ($inp),$Ij              # I[0]
1295         vpxor           $Xlo,$Zlo,$Zlo
1296         vpclmulqdq      \$0x00,$Hkey,$Ii,$Xlo
1297         vpxor           $Xhi,$Zhi,$Zhi
1298          vpshufb        $bswap,$Ij,$Ij
1299         vpclmulqdq      \$0x11,$Hkey,$Ii,$Xhi
1300          vmovdqu        0xa0-0x40($Htbl),$Hkey  # $Hkey^8
1301         vpxor           $Xmi,$Zmi,$Zmi
1302         vpclmulqdq      \$0x10,$HK,$T2,$Xmi
1303
1304         lea             0x80($inp),$inp
1305         cmp             \$0x80,$len
1306         jb              .Ltail_avx
1307
1308         vpxor           $Xi,$Ij,$Ij             # accumulate $Xi
1309         sub             \$0x80,$len
1310         jmp             .Loop8x_avx
1311
1312 .align  32
1313 .Loop8x_avx:
1314         vpunpckhqdq     $Ij,$Ij,$T1
1315          vmovdqu        0x70($inp),$Ii          # I[7]
1316         vpxor           $Xlo,$Zlo,$Zlo
1317         vpxor           $Ij,$T1,$T1
1318         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xi
1319          vpshufb        $bswap,$Ii,$Ii
1320         vpxor           $Xhi,$Zhi,$Zhi
1321         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xo
1322          vmovdqu        0x00-0x40($Htbl),$Hkey  # $Hkey^1
1323          vpunpckhqdq    $Ii,$Ii,$T2
1324         vpxor           $Xmi,$Zmi,$Zmi
1325         vpclmulqdq      \$0x00,$HK,$T1,$Tred
1326          vmovdqu        0x20-0x40($Htbl),$HK
1327          vpxor          $Ii,$T2,$T2
1328
1329           vmovdqu       0x60($inp),$Ij          # I[6]
1330          vpclmulqdq     \$0x00,$Hkey,$Ii,$Xlo
1331         vpxor           $Zlo,$Xi,$Xi            # collect result
1332           vpshufb       $bswap,$Ij,$Ij
1333          vpclmulqdq     \$0x11,$Hkey,$Ii,$Xhi
1334         vxorps          $Zhi,$Xo,$Xo
1335           vmovdqu       0x10-0x40($Htbl),$Hkey  # $Hkey^2
1336          vpunpckhqdq    $Ij,$Ij,$T1
1337          vpclmulqdq     \$0x00,$HK,  $T2,$Xmi
1338         vpxor           $Zmi,$Tred,$Tred
1339          vxorps         $Ij,$T1,$T1
1340
1341           vmovdqu       0x50($inp),$Ii          # I[5]
1342         vpxor           $Xi,$Tred,$Tred         # aggregated Karatsuba post-processing
1343          vpclmulqdq     \$0x00,$Hkey,$Ij,$Zlo
1344         vpxor           $Xo,$Tred,$Tred
1345         vpslldq         \$8,$Tred,$T2
1346          vpxor          $Xlo,$Zlo,$Zlo
1347          vpclmulqdq     \$0x11,$Hkey,$Ij,$Zhi
1348         vpsrldq         \$8,$Tred,$Tred
1349         vpxor           $T2, $Xi, $Xi
1350           vmovdqu       0x30-0x40($Htbl),$Hkey  # $Hkey^3
1351           vpshufb       $bswap,$Ii,$Ii
1352         vxorps          $Tred,$Xo, $Xo
1353          vpxor          $Xhi,$Zhi,$Zhi
1354          vpunpckhqdq    $Ii,$Ii,$T2
1355          vpclmulqdq     \$0x10,$HK,  $T1,$Zmi
1356           vmovdqu       0x50-0x40($Htbl),$HK
1357          vpxor          $Ii,$T2,$T2
1358          vpxor          $Xmi,$Zmi,$Zmi
1359
1360           vmovdqu       0x40($inp),$Ij          # I[4]
1361         vpalignr        \$8,$Xi,$Xi,$Tred       # 1st phase
1362          vpclmulqdq     \$0x00,$Hkey,$Ii,$Xlo
1363           vpshufb       $bswap,$Ij,$Ij
1364          vpxor          $Zlo,$Xlo,$Xlo
1365          vpclmulqdq     \$0x11,$Hkey,$Ii,$Xhi
1366           vmovdqu       0x40-0x40($Htbl),$Hkey  # $Hkey^4
1367          vpunpckhqdq    $Ij,$Ij,$T1
1368          vpxor          $Zhi,$Xhi,$Xhi
1369          vpclmulqdq     \$0x00,$HK,  $T2,$Xmi
1370          vxorps         $Ij,$T1,$T1
1371          vpxor          $Zmi,$Xmi,$Xmi
1372
1373           vmovdqu       0x30($inp),$Ii          # I[3]
1374         vpclmulqdq      \$0x10,(%r10),$Xi,$Xi
1375          vpclmulqdq     \$0x00,$Hkey,$Ij,$Zlo
1376           vpshufb       $bswap,$Ii,$Ii
1377          vpxor          $Xlo,$Zlo,$Zlo
1378          vpclmulqdq     \$0x11,$Hkey,$Ij,$Zhi
1379           vmovdqu       0x60-0x40($Htbl),$Hkey  # $Hkey^5
1380          vpunpckhqdq    $Ii,$Ii,$T2
1381          vpxor          $Xhi,$Zhi,$Zhi
1382          vpclmulqdq     \$0x10,$HK,  $T1,$Zmi
1383           vmovdqu       0x80-0x40($Htbl),$HK
1384          vpxor          $Ii,$T2,$T2
1385          vpxor          $Xmi,$Zmi,$Zmi
1386
1387           vmovdqu       0x20($inp),$Ij          # I[2]
1388          vpclmulqdq     \$0x00,$Hkey,$Ii,$Xlo
1389           vpshufb       $bswap,$Ij,$Ij
1390          vpxor          $Zlo,$Xlo,$Xlo
1391          vpclmulqdq     \$0x11,$Hkey,$Ii,$Xhi
1392           vmovdqu       0x70-0x40($Htbl),$Hkey  # $Hkey^6
1393          vpunpckhqdq    $Ij,$Ij,$T1
1394          vpxor          $Zhi,$Xhi,$Xhi
1395          vpclmulqdq     \$0x00,$HK,  $T2,$Xmi
1396          vpxor          $Ij,$T1,$T1
1397          vpxor          $Zmi,$Xmi,$Xmi
1398         vxorps          $Tred,$Xi,$Xi
1399
1400           vmovdqu       0x10($inp),$Ii          # I[1]
1401         vpalignr        \$8,$Xi,$Xi,$Tred       # 2nd phase
1402          vpclmulqdq     \$0x00,$Hkey,$Ij,$Zlo
1403           vpshufb       $bswap,$Ii,$Ii
1404          vpxor          $Xlo,$Zlo,$Zlo
1405          vpclmulqdq     \$0x11,$Hkey,$Ij,$Zhi
1406           vmovdqu       0x90-0x40($Htbl),$Hkey  # $Hkey^7
1407         vpclmulqdq      \$0x10,(%r10),$Xi,$Xi
1408         vxorps          $Xo,$Tred,$Tred
1409          vpunpckhqdq    $Ii,$Ii,$T2
1410          vpxor          $Xhi,$Zhi,$Zhi
1411          vpclmulqdq     \$0x10,$HK,  $T1,$Zmi
1412           vmovdqu       0xb0-0x40($Htbl),$HK
1413          vpxor          $Ii,$T2,$T2
1414          vpxor          $Xmi,$Zmi,$Zmi
1415
1416           vmovdqu       ($inp),$Ij              # I[0]
1417          vpclmulqdq     \$0x00,$Hkey,$Ii,$Xlo
1418           vpshufb       $bswap,$Ij,$Ij
1419          vpclmulqdq     \$0x11,$Hkey,$Ii,$Xhi
1420           vmovdqu       0xa0-0x40($Htbl),$Hkey  # $Hkey^8
1421         vpxor           $Tred,$Ij,$Ij
1422          vpclmulqdq     \$0x10,$HK,  $T2,$Xmi
1423         vpxor           $Xi,$Ij,$Ij             # accumulate $Xi
1424
1425         lea             0x80($inp),$inp
1426         sub             \$0x80,$len
1427         jnc             .Loop8x_avx
1428
1429         add             \$0x80,$len
1430         jmp             .Ltail_no_xor_avx
1431
1432 .align  32
1433 .Lshort_avx:
1434         vmovdqu         -0x10($inp,$len),$Ii    # very last word
1435         lea             ($inp,$len),$inp
1436         vmovdqu         0x00-0x40($Htbl),$Hkey  # $Hkey^1
1437         vmovdqu         0x20-0x40($Htbl),$HK
1438         vpshufb         $bswap,$Ii,$Ij
1439
1440         vmovdqa         $Xlo,$Zlo               # subtle way to zero $Zlo,
1441         vmovdqa         $Xhi,$Zhi               # $Zhi and
1442         vmovdqa         $Xmi,$Zmi               # $Zmi
1443         sub             \$0x10,$len
1444         jz              .Ltail_avx
1445
1446         vpunpckhqdq     $Ij,$Ij,$T1
1447         vpxor           $Xlo,$Zlo,$Zlo
1448         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1449         vpxor           $Ij,$T1,$T1
1450          vmovdqu        -0x20($inp),$Ii
1451         vpxor           $Xhi,$Zhi,$Zhi
1452         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1453         vmovdqu         0x10-0x40($Htbl),$Hkey  # $Hkey^2
1454          vpshufb        $bswap,$Ii,$Ij
1455         vpxor           $Xmi,$Zmi,$Zmi
1456         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1457         vpsrldq         \$8,$HK,$HK
1458         sub             \$0x10,$len
1459         jz              .Ltail_avx
1460
1461         vpunpckhqdq     $Ij,$Ij,$T1
1462         vpxor           $Xlo,$Zlo,$Zlo
1463         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1464         vpxor           $Ij,$T1,$T1
1465          vmovdqu        -0x30($inp),$Ii
1466         vpxor           $Xhi,$Zhi,$Zhi
1467         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1468         vmovdqu         0x30-0x40($Htbl),$Hkey  # $Hkey^3
1469          vpshufb        $bswap,$Ii,$Ij
1470         vpxor           $Xmi,$Zmi,$Zmi
1471         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1472         vmovdqu         0x50-0x40($Htbl),$HK
1473         sub             \$0x10,$len
1474         jz              .Ltail_avx
1475
1476         vpunpckhqdq     $Ij,$Ij,$T1
1477         vpxor           $Xlo,$Zlo,$Zlo
1478         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1479         vpxor           $Ij,$T1,$T1
1480          vmovdqu        -0x40($inp),$Ii
1481         vpxor           $Xhi,$Zhi,$Zhi
1482         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1483         vmovdqu         0x40-0x40($Htbl),$Hkey  # $Hkey^4
1484          vpshufb        $bswap,$Ii,$Ij
1485         vpxor           $Xmi,$Zmi,$Zmi
1486         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1487         vpsrldq         \$8,$HK,$HK
1488         sub             \$0x10,$len
1489         jz              .Ltail_avx
1490
1491         vpunpckhqdq     $Ij,$Ij,$T1
1492         vpxor           $Xlo,$Zlo,$Zlo
1493         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1494         vpxor           $Ij,$T1,$T1
1495          vmovdqu        -0x50($inp),$Ii
1496         vpxor           $Xhi,$Zhi,$Zhi
1497         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1498         vmovdqu         0x60-0x40($Htbl),$Hkey  # $Hkey^5
1499          vpshufb        $bswap,$Ii,$Ij
1500         vpxor           $Xmi,$Zmi,$Zmi
1501         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1502         vmovdqu         0x80-0x40($Htbl),$HK
1503         sub             \$0x10,$len
1504         jz              .Ltail_avx
1505
1506         vpunpckhqdq     $Ij,$Ij,$T1
1507         vpxor           $Xlo,$Zlo,$Zlo
1508         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1509         vpxor           $Ij,$T1,$T1
1510          vmovdqu        -0x60($inp),$Ii
1511         vpxor           $Xhi,$Zhi,$Zhi
1512         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1513         vmovdqu         0x70-0x40($Htbl),$Hkey  # $Hkey^6
1514          vpshufb        $bswap,$Ii,$Ij
1515         vpxor           $Xmi,$Zmi,$Zmi
1516         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1517         vpsrldq         \$8,$HK,$HK
1518         sub             \$0x10,$len
1519         jz              .Ltail_avx
1520
1521         vpunpckhqdq     $Ij,$Ij,$T1
1522         vpxor           $Xlo,$Zlo,$Zlo
1523         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1524         vpxor           $Ij,$T1,$T1
1525          vmovdqu        -0x70($inp),$Ii
1526         vpxor           $Xhi,$Zhi,$Zhi
1527         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1528         vmovdqu         0x90-0x40($Htbl),$Hkey  # $Hkey^7
1529          vpshufb        $bswap,$Ii,$Ij
1530         vpxor           $Xmi,$Zmi,$Zmi
1531         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1532         vmovq           0xb8-0x40($Htbl),$HK
1533         sub             \$0x10,$len
1534         jmp             .Ltail_avx
1535
1536 .align  32
1537 .Ltail_avx:
1538         vpxor           $Xi,$Ij,$Ij             # accumulate $Xi
1539 .Ltail_no_xor_avx:
1540         vpunpckhqdq     $Ij,$Ij,$T1
1541         vpxor           $Xlo,$Zlo,$Zlo
1542         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1543         vpxor           $Ij,$T1,$T1
1544         vpxor           $Xhi,$Zhi,$Zhi
1545         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1546         vpxor           $Xmi,$Zmi,$Zmi
1547         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1548
1549         vmovdqu         (%r10),$Tred
1550
1551         vpxor           $Xlo,$Zlo,$Xi
1552         vpxor           $Xhi,$Zhi,$Xo
1553         vpxor           $Xmi,$Zmi,$Zmi
1554
1555         vpxor           $Xi, $Zmi,$Zmi          # aggregated Karatsuba post-processing
1556         vpxor           $Xo, $Zmi,$Zmi
1557         vpslldq         \$8, $Zmi,$T2
1558         vpsrldq         \$8, $Zmi,$Zmi
1559         vpxor           $T2, $Xi, $Xi
1560         vpxor           $Zmi,$Xo, $Xo
1561
1562         vpclmulqdq      \$0x10,$Tred,$Xi,$T2    # 1st phase
1563         vpalignr        \$8,$Xi,$Xi,$Xi
1564         vpxor           $T2,$Xi,$Xi
1565
1566         vpclmulqdq      \$0x10,$Tred,$Xi,$T2    # 2nd phase
1567         vpalignr        \$8,$Xi,$Xi,$Xi
1568         vpxor           $Xo,$Xi,$Xi
1569         vpxor           $T2,$Xi,$Xi
1570
1571         cmp             \$0,$len
1572         jne             .Lshort_avx
1573
1574         vpshufb         $bswap,$Xi,$Xi
1575         vmovdqu         $Xi,($Xip)
1576         vzeroupper
1577 ___
1578 $code.=<<___ if ($win64);
1579         movaps  (%rsp),%xmm6
1580         movaps  0x10(%rsp),%xmm7
1581         movaps  0x20(%rsp),%xmm8
1582         movaps  0x30(%rsp),%xmm9
1583         movaps  0x40(%rsp),%xmm10
1584         movaps  0x50(%rsp),%xmm11
1585         movaps  0x60(%rsp),%xmm12
1586         movaps  0x70(%rsp),%xmm13
1587         movaps  0x80(%rsp),%xmm14
1588         movaps  0x90(%rsp),%xmm15
1589         lea     0xa8(%rsp),%rsp
1590 .LSEH_end_gcm_ghash_avx:
1591 ___
1592 $code.=<<___;
1593         ret
1594 .cfi_endproc
1595 .size   gcm_ghash_avx,.-gcm_ghash_avx
1596 ___
1597 } else {
1598 $code.=<<___;
1599         jmp     .L_ghash_clmul
1600 .cfi_endproc
1601 .size   gcm_ghash_avx,.-gcm_ghash_avx
1602 ___
1603 }
1604 \f
1605 $code.=<<___;
1606 .align  64
1607 .Lbswap_mask:
1608         .byte   15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0
1609 .L0x1c2_polynomial:
1610         .byte   1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0xc2
1611 .L7_mask:
1612         .long   7,0,7,0
1613 .L7_mask_poly:
1614         .long   7,0,`0xE1<<1`,0
1615 .align  64
1616 .type   .Lrem_4bit,\@object
1617 .Lrem_4bit:
1618         .long   0,`0x0000<<16`,0,`0x1C20<<16`,0,`0x3840<<16`,0,`0x2460<<16`
1619         .long   0,`0x7080<<16`,0,`0x6CA0<<16`,0,`0x48C0<<16`,0,`0x54E0<<16`
1620         .long   0,`0xE100<<16`,0,`0xFD20<<16`,0,`0xD940<<16`,0,`0xC560<<16`
1621         .long   0,`0x9180<<16`,0,`0x8DA0<<16`,0,`0xA9C0<<16`,0,`0xB5E0<<16`
1622 .type   .Lrem_8bit,\@object
1623 .Lrem_8bit:
1624         .value  0x0000,0x01C2,0x0384,0x0246,0x0708,0x06CA,0x048C,0x054E
1625         .value  0x0E10,0x0FD2,0x0D94,0x0C56,0x0918,0x08DA,0x0A9C,0x0B5E
1626         .value  0x1C20,0x1DE2,0x1FA4,0x1E66,0x1B28,0x1AEA,0x18AC,0x196E
1627         .value  0x1230,0x13F2,0x11B4,0x1076,0x1538,0x14FA,0x16BC,0x177E
1628         .value  0x3840,0x3982,0x3BC4,0x3A06,0x3F48,0x3E8A,0x3CCC,0x3D0E
1629         .value  0x3650,0x3792,0x35D4,0x3416,0x3158,0x309A,0x32DC,0x331E
1630         .value  0x2460,0x25A2,0x27E4,0x2626,0x2368,0x22AA,0x20EC,0x212E
1631         .value  0x2A70,0x2BB2,0x29F4,0x2836,0x2D78,0x2CBA,0x2EFC,0x2F3E
1632         .value  0x7080,0x7142,0x7304,0x72C6,0x7788,0x764A,0x740C,0x75CE
1633         .value  0x7E90,0x7F52,0x7D14,0x7CD6,0x7998,0x785A,0x7A1C,0x7BDE
1634         .value  0x6CA0,0x6D62,0x6F24,0x6EE6,0x6BA8,0x6A6A,0x682C,0x69EE
1635         .value  0x62B0,0x6372,0x6134,0x60F6,0x65B8,0x647A,0x663C,0x67FE
1636         .value  0x48C0,0x4902,0x4B44,0x4A86,0x4FC8,0x4E0A,0x4C4C,0x4D8E
1637         .value  0x46D0,0x4712,0x4554,0x4496,0x41D8,0x401A,0x425C,0x439E
1638         .value  0x54E0,0x5522,0x5764,0x56A6,0x53E8,0x522A,0x506C,0x51AE
1639         .value  0x5AF0,0x5B32,0x5974,0x58B6,0x5DF8,0x5C3A,0x5E7C,0x5FBE
1640         .value  0xE100,0xE0C2,0xE284,0xE346,0xE608,0xE7CA,0xE58C,0xE44E
1641         .value  0xEF10,0xEED2,0xEC94,0xED56,0xE818,0xE9DA,0xEB9C,0xEA5E
1642         .value  0xFD20,0xFCE2,0xFEA4,0xFF66,0xFA28,0xFBEA,0xF9AC,0xF86E
1643         .value  0xF330,0xF2F2,0xF0B4,0xF176,0xF438,0xF5FA,0xF7BC,0xF67E
1644         .value  0xD940,0xD882,0xDAC4,0xDB06,0xDE48,0xDF8A,0xDDCC,0xDC0E
1645         .value  0xD750,0xD692,0xD4D4,0xD516,0xD058,0xD19A,0xD3DC,0xD21E
1646         .value  0xC560,0xC4A2,0xC6E4,0xC726,0xC268,0xC3AA,0xC1EC,0xC02E
1647         .value  0xCB70,0xCAB2,0xC8F4,0xC936,0xCC78,0xCDBA,0xCFFC,0xCE3E
1648         .value  0x9180,0x9042,0x9204,0x93C6,0x9688,0x974A,0x950C,0x94CE
1649         .value  0x9F90,0x9E52,0x9C14,0x9DD6,0x9898,0x995A,0x9B1C,0x9ADE
1650         .value  0x8DA0,0x8C62,0x8E24,0x8FE6,0x8AA8,0x8B6A,0x892C,0x88EE
1651         .value  0x83B0,0x8272,0x8034,0x81F6,0x84B8,0x857A,0x873C,0x86FE
1652         .value  0xA9C0,0xA802,0xAA44,0xAB86,0xAEC8,0xAF0A,0xAD4C,0xAC8E
1653         .value  0xA7D0,0xA612,0xA454,0xA596,0xA0D8,0xA11A,0xA35C,0xA29E
1654         .value  0xB5E0,0xB422,0xB664,0xB7A6,0xB2E8,0xB32A,0xB16C,0xB0AE
1655         .value  0xBBF0,0xBA32,0xB874,0xB9B6,0xBCF8,0xBD3A,0xBF7C,0xBEBE
1656
1657 .asciz  "GHASH for x86_64, CRYPTOGAMS by <appro\@openssl.org>"
1658 .align  64
1659 ___
1660 \f
1661 # EXCEPTION_DISPOSITION handler (EXCEPTION_RECORD *rec,ULONG64 frame,
1662 #               CONTEXT *context,DISPATCHER_CONTEXT *disp)
1663 if ($win64) {
1664 $rec="%rcx";
1665 $frame="%rdx";
1666 $context="%r8";
1667 $disp="%r9";
1668
1669 $code.=<<___;
1670 .extern __imp_RtlVirtualUnwind
1671 .type   se_handler,\@abi-omnipotent
1672 .align  16
1673 se_handler:
1674         push    %rsi
1675         push    %rdi
1676         push    %rbx
1677         push    %rbp
1678         push    %r12
1679         push    %r13
1680         push    %r14
1681         push    %r15
1682         pushfq
1683         sub     \$64,%rsp
1684
1685         mov     120($context),%rax      # pull context->Rax
1686         mov     248($context),%rbx      # pull context->Rip
1687
1688         mov     8($disp),%rsi           # disp->ImageBase
1689         mov     56($disp),%r11          # disp->HandlerData
1690
1691         mov     0(%r11),%r10d           # HandlerData[0]
1692         lea     (%rsi,%r10),%r10        # prologue label
1693         cmp     %r10,%rbx               # context->Rip<prologue label
1694         jb      .Lin_prologue
1695
1696         mov     152($context),%rax      # pull context->Rsp
1697
1698         mov     4(%r11),%r10d           # HandlerData[1]
1699         lea     (%rsi,%r10),%r10        # epilogue label
1700         cmp     %r10,%rbx               # context->Rip>=epilogue label
1701         jae     .Lin_prologue
1702
1703         lea     48+280(%rax),%rax       # adjust "rsp"
1704
1705         mov     -8(%rax),%rbx
1706         mov     -16(%rax),%rbp
1707         mov     -24(%rax),%r12
1708         mov     -32(%rax),%r13
1709         mov     -40(%rax),%r14
1710         mov     -48(%rax),%r15
1711         mov     %rbx,144($context)      # restore context->Rbx
1712         mov     %rbp,160($context)      # restore context->Rbp
1713         mov     %r12,216($context)      # restore context->R12
1714         mov     %r13,224($context)      # restore context->R13
1715         mov     %r14,232($context)      # restore context->R14
1716         mov     %r15,240($context)      # restore context->R15
1717
1718 .Lin_prologue:
1719         mov     8(%rax),%rdi
1720         mov     16(%rax),%rsi
1721         mov     %rax,152($context)      # restore context->Rsp
1722         mov     %rsi,168($context)      # restore context->Rsi
1723         mov     %rdi,176($context)      # restore context->Rdi
1724
1725         mov     40($disp),%rdi          # disp->ContextRecord
1726         mov     $context,%rsi           # context
1727         mov     \$`1232/8`,%ecx         # sizeof(CONTEXT)
1728         .long   0xa548f3fc              # cld; rep movsq
1729
1730         mov     $disp,%rsi
1731         xor     %rcx,%rcx               # arg1, UNW_FLAG_NHANDLER
1732         mov     8(%rsi),%rdx            # arg2, disp->ImageBase
1733         mov     0(%rsi),%r8             # arg3, disp->ControlPc
1734         mov     16(%rsi),%r9            # arg4, disp->FunctionEntry
1735         mov     40(%rsi),%r10           # disp->ContextRecord
1736         lea     56(%rsi),%r11           # &disp->HandlerData
1737         lea     24(%rsi),%r12           # &disp->EstablisherFrame
1738         mov     %r10,32(%rsp)           # arg5
1739         mov     %r11,40(%rsp)           # arg6
1740         mov     %r12,48(%rsp)           # arg7
1741         mov     %rcx,56(%rsp)           # arg8, (NULL)
1742         call    *__imp_RtlVirtualUnwind(%rip)
1743
1744         mov     \$1,%eax                # ExceptionContinueSearch
1745         add     \$64,%rsp
1746         popfq
1747         pop     %r15
1748         pop     %r14
1749         pop     %r13
1750         pop     %r12
1751         pop     %rbp
1752         pop     %rbx
1753         pop     %rdi
1754         pop     %rsi
1755         ret
1756 .size   se_handler,.-se_handler
1757
1758 .section        .pdata
1759 .align  4
1760         .rva    .LSEH_begin_gcm_gmult_4bit
1761         .rva    .LSEH_end_gcm_gmult_4bit
1762         .rva    .LSEH_info_gcm_gmult_4bit
1763
1764         .rva    .LSEH_begin_gcm_ghash_4bit
1765         .rva    .LSEH_end_gcm_ghash_4bit
1766         .rva    .LSEH_info_gcm_ghash_4bit
1767
1768         .rva    .LSEH_begin_gcm_init_clmul
1769         .rva    .LSEH_end_gcm_init_clmul
1770         .rva    .LSEH_info_gcm_init_clmul
1771
1772         .rva    .LSEH_begin_gcm_ghash_clmul
1773         .rva    .LSEH_end_gcm_ghash_clmul
1774         .rva    .LSEH_info_gcm_ghash_clmul
1775 ___
1776 $code.=<<___    if ($avx);
1777         .rva    .LSEH_begin_gcm_init_avx
1778         .rva    .LSEH_end_gcm_init_avx
1779         .rva    .LSEH_info_gcm_init_clmul
1780
1781         .rva    .LSEH_begin_gcm_ghash_avx
1782         .rva    .LSEH_end_gcm_ghash_avx
1783         .rva    .LSEH_info_gcm_ghash_clmul
1784 ___
1785 $code.=<<___;
1786 .section        .xdata
1787 .align  8
1788 .LSEH_info_gcm_gmult_4bit:
1789         .byte   9,0,0,0
1790         .rva    se_handler
1791         .rva    .Lgmult_prologue,.Lgmult_epilogue       # HandlerData
1792 .LSEH_info_gcm_ghash_4bit:
1793         .byte   9,0,0,0
1794         .rva    se_handler
1795         .rva    .Lghash_prologue,.Lghash_epilogue       # HandlerData
1796 .LSEH_info_gcm_init_clmul:
1797         .byte   0x01,0x08,0x03,0x00
1798         .byte   0x08,0x68,0x00,0x00     #movaps 0x00(rsp),xmm6
1799         .byte   0x04,0x22,0x00,0x00     #sub    rsp,0x18
1800 .LSEH_info_gcm_ghash_clmul:
1801         .byte   0x01,0x33,0x16,0x00
1802         .byte   0x33,0xf8,0x09,0x00     #movaps 0x90(rsp),xmm15
1803         .byte   0x2e,0xe8,0x08,0x00     #movaps 0x80(rsp),xmm14
1804         .byte   0x29,0xd8,0x07,0x00     #movaps 0x70(rsp),xmm13
1805         .byte   0x24,0xc8,0x06,0x00     #movaps 0x60(rsp),xmm12
1806         .byte   0x1f,0xb8,0x05,0x00     #movaps 0x50(rsp),xmm11
1807         .byte   0x1a,0xa8,0x04,0x00     #movaps 0x40(rsp),xmm10
1808         .byte   0x15,0x98,0x03,0x00     #movaps 0x30(rsp),xmm9
1809         .byte   0x10,0x88,0x02,0x00     #movaps 0x20(rsp),xmm8
1810         .byte   0x0c,0x78,0x01,0x00     #movaps 0x10(rsp),xmm7
1811         .byte   0x08,0x68,0x00,0x00     #movaps 0x00(rsp),xmm6
1812         .byte   0x04,0x01,0x15,0x00     #sub    rsp,0xa8
1813 ___
1814 }
1815 \f
1816 $code =~ s/\`([^\`]*)\`/eval($1)/gem;
1817
1818 print $code;
1819
1820 close STDOUT;