3 # ====================================================================
4 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
5 # project. The module is, however, dual licensed under OpenSSL and
6 # CRYPTOGAMS licenses depending on where you obtain it. For further
7 # details see http://www.openssl.org/~appro/cryptogams/.
8 # ====================================================================
12 # The module implements "4-bit" GCM GHASH function and underlying
13 # single multiplication operation in GF(2^128). "4-bit" means that
14 # it uses 256 bytes per-key table [+128 bytes shared table]. GHASH
15 # function features so called "528B" variant utilizing additional
16 # 256+16 bytes of per-key storage [+512 bytes shared table].
17 # Performance results are for this streamed GHASH subroutine and are
18 # expressed in cycles per processed byte, less is better:
20 # gcc 3.4.x(*) assembler
23 # Opteron 19.3 7.7 +150%
24 # Core2 17.8 8.1(**) +120%
26 # VIA Nano 21.8 10.1 +115%
28 # (*) comparison is not completely fair, because C results are
29 # for vanilla "256B" implementation, while assembler results
31 # (**) it's mystery [to me] why Core2 result is not same as for
36 # Add PCLMULQDQ version performing at 2.02 cycles per processed byte.
37 # See ghash-x86.pl for background information and details about coding
40 # Special thanks to David Woodhouse <dwmw2@infradead.org> for
41 # providing access to a Westmere-based system on behalf of Intel
42 # Open Source Technology Centre.
46 # Overhaul: aggregate Karatsuba post-processing, improve ILP in
47 # reduction_alg9, increase reduction aggregate factor to 4x. As for
48 # the latter. ghash-x86.pl discusses that it makes lesser sense to
49 # increase aggregate factor. Then why increase here? Critical path
50 # consists of 3 independent pclmulqdq instructions, Karatsuba post-
51 # processing and reduction. "On top" of this we lay down aggregated
52 # multiplication operations, triplets of independent pclmulqdq's. As
53 # issue rate for pclmulqdq is limited, it makes lesser sense to
54 # aggregate more multiplications than it takes to perform remaining
55 # non-multiplication operations. 2x is near-optimal coefficient for
56 # contemporary Intel CPUs (therefore modest improvement coefficient),
57 # but not for Bulldozer. Latter is because logical SIMD operations
58 # are twice as slow in comparison to Intel, so that critical path is
59 # longer. A CPU with higher pclmulqdq issue rate would also benefit
60 # from higher aggregate factor...
63 # Sandy Bridge 1.80(+8%)
64 # Ivy Bridge 1.80(+7%)
65 # Haswell 0.55(+93%) (if system doesn't support AVX)
66 # Broadwell 0.45(+110%)(if system doesn't support AVX)
67 # Skylake 0.44(+110%)(if system doesn't support AVX)
68 # Bulldozer 1.49(+27%)
69 # Silvermont 2.88(+13%)
73 # ... 8x aggregate factor AVX code path is using reduction algorithm
74 # suggested by Shay Gueron[1]. Even though contemporary AVX-capable
75 # CPUs such as Sandy and Ivy Bridge can execute it, the code performs
76 # sub-optimally in comparison to above mentioned version. But thanks
77 # to Ilya Albrekht and Max Locktyukhin of Intel Corp. we knew that
78 # it performs in 0.41 cycles per byte on Haswell processor, in
79 # 0.29 on Broadwell, and in 0.36 on Skylake.
81 # [1] http://rt.openssl.org/Ticket/Display.html?id=2900&user=guest&pass=guest
85 if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
87 $win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
89 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
90 ( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
91 ( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
92 die "can't locate x86_64-xlate.pl";
94 if (`$ENV{CC} -Wa,-v -c -o /dev/null -x assembler /dev/null 2>&1`
95 =~ /GNU assembler version ([2-9]\.[0-9]+)/) {
96 $avx = ($1>=2.19) + ($1>=2.22);
99 if (!$avx && $win64 && ($flavour =~ /nasm/ || $ENV{ASM} =~ /nasm/) &&
100 `nasm -v 2>&1` =~ /NASM version ([2-9]\.[0-9]+)/) {
101 $avx = ($1>=2.09) + ($1>=2.10);
104 if (!$avx && $win64 && ($flavour =~ /masm/ || $ENV{ASM} =~ /ml64/) &&
105 `ml64 2>&1` =~ /Version ([0-9]+)\./) {
106 $avx = ($1>=10) + ($1>=11);
109 if (!$avx && `$ENV{CC} -v 2>&1` =~ /(^clang version|based on LLVM) ([3-9]\.[0-9]+)/) {
110 $avx = ($2>=3.0) + ($2>3.0);
113 open OUT,"| \"$^X\" $xlate $flavour $output";
118 # common register layout
129 # per-function register layout
133 sub LB() { my $r=shift; $r =~ s/%[er]([a-d])x/%\1l/ or
134 $r =~ s/%[er]([sd]i)/%\1l/ or
135 $r =~ s/%[er](bp)/%\1l/ or
136 $r =~ s/%(r[0-9]+)[d]?/%\1b/; $r; }
138 sub AUTOLOAD() # thunk [simplified] 32-bit style perlasm
139 { my $opcode = $AUTOLOAD; $opcode =~ s/.*:://;
141 $arg = "\$$arg" if ($arg*1 eq $arg);
142 $code .= "\t$opcode\t".join(',',$arg,reverse @_)."\n";
153 mov `&LB("$Zlo")`,`&LB("$nlo")`
154 mov `&LB("$Zlo")`,`&LB("$nhi")`
155 shl \$4,`&LB("$nlo")`
157 mov 8($Htbl,$nlo),$Zlo
158 mov ($Htbl,$nlo),$Zhi
159 and \$0xf0,`&LB("$nhi")`
168 mov ($inp,$cnt),`&LB("$nlo")`
170 xor 8($Htbl,$nhi),$Zlo
172 xor ($Htbl,$nhi),$Zhi
173 mov `&LB("$nlo")`,`&LB("$nhi")`
174 xor ($rem_4bit,$rem,8),$Zhi
176 shl \$4,`&LB("$nlo")`
185 xor 8($Htbl,$nlo),$Zlo
187 xor ($Htbl,$nlo),$Zhi
188 and \$0xf0,`&LB("$nhi")`
189 xor ($rem_4bit,$rem,8),$Zhi
200 xor 8($Htbl,$nlo),$Zlo
202 xor ($Htbl,$nlo),$Zhi
203 and \$0xf0,`&LB("$nhi")`
204 xor ($rem_4bit,$rem,8),$Zhi
212 xor 8($Htbl,$nhi),$Zlo
214 xor ($Htbl,$nhi),$Zhi
216 xor ($rem_4bit,$rem,8),$Zhi
225 .extern OPENSSL_ia32cap_P
227 .globl gcm_gmult_4bit
228 .type gcm_gmult_4bit,\@function,2
232 push %rbp # %rbp and %r12 are pushed exclusively in
233 push %r12 # order to reuse Win64 exception handler...
237 lea .Lrem_4bit(%rip),$rem_4bit
248 .size gcm_gmult_4bit,.-gcm_gmult_4bit
251 # per-function register layout
257 .globl gcm_ghash_4bit
258 .type gcm_ghash_4bit,\@function,4
269 mov $inp,%r14 # reassign couple of args
275 my @nhi=("%ebx","%ecx");
276 my @rem=("%r12","%r13");
279 &sub ($Htbl,-128); # size optimization
280 &lea ($Hshr4,"16+128(%rsp)");
281 { my @lo =($nlo,$nhi);
285 for ($i=0,$j=-2;$i<18;$i++,$j++) {
286 &mov ("$j(%rsp)",&LB($dat)) if ($i>1);
287 &or ($lo[0],$tmp) if ($i>1);
288 &mov (&LB($dat),&LB($lo[1])) if ($i>0 && $i<17);
289 &shr ($lo[1],4) if ($i>0 && $i<17);
290 &mov ($tmp,$hi[1]) if ($i>0 && $i<17);
291 &shr ($hi[1],4) if ($i>0 && $i<17);
292 &mov ("8*$j($Hshr4)",$hi[0]) if ($i>1);
293 &mov ($hi[0],"16*$i+0-128($Htbl)") if ($i<16);
294 &shl (&LB($dat),4) if ($i>0 && $i<17);
295 &mov ("8*$j-128($Hshr4)",$lo[0]) if ($i>1);
296 &mov ($lo[0],"16*$i+8-128($Htbl)") if ($i<16);
297 &shl ($tmp,60) if ($i>0 && $i<17);
299 push (@lo,shift(@lo));
300 push (@hi,shift(@hi));
304 &mov ($Zlo,"8($Xi)");
305 &mov ($Zhi,"0($Xi)");
306 &add ($len,$inp); # pointer to the end of data
307 &lea ($rem_8bit,".Lrem_8bit(%rip)");
308 &jmp (".Louter_loop");
310 $code.=".align 16\n.Louter_loop:\n";
311 &xor ($Zhi,"($inp)");
312 &mov ("%rdx","8($inp)");
313 &lea ($inp,"16($inp)");
316 &mov ("8($Xi)","%rdx");
321 &mov (&LB($nlo),&LB($dat));
322 &movz ($nhi[0],&LB($dat));
326 for ($j=11,$i=0;$i<15;$i++) {
328 &xor ($Zlo,"8($Htbl,$nlo)") if ($i>0);
329 &xor ($Zhi,"($Htbl,$nlo)") if ($i>0);
330 &mov ($Zlo,"8($Htbl,$nlo)") if ($i==0);
331 &mov ($Zhi,"($Htbl,$nlo)") if ($i==0);
333 &mov (&LB($nlo),&LB($dat));
334 &xor ($Zlo,$tmp) if ($i>0);
335 &movzw ($rem[1],"($rem_8bit,$rem[1],2)") if ($i>0);
337 &movz ($nhi[1],&LB($dat));
339 &movzb ($rem[0],"(%rsp,$nhi[0])");
341 &shr ($nhi[1],4) if ($i<14);
342 &and ($nhi[1],0xf0) if ($i==14);
343 &shl ($rem[1],48) if ($i>0);
347 &xor ($Zhi,$rem[1]) if ($i>0);
350 &movz ($rem[0],&LB($rem[0]));
351 &mov ($dat,"$j($Xi)") if (--$j%4==0);
354 &xor ($Zlo,"-128($Hshr4,$nhi[0],8)");
356 &xor ($Zhi,"($Hshr4,$nhi[0],8)");
358 unshift (@nhi,pop(@nhi)); # "rotate" registers
359 unshift (@rem,pop(@rem));
361 &movzw ($rem[1],"($rem_8bit,$rem[1],2)");
362 &xor ($Zlo,"8($Htbl,$nlo)");
363 &xor ($Zhi,"($Htbl,$nlo)");
369 &movz ($rem[0],&LB($Zlo));
373 &shl (&LB($rem[0]),4);
376 &xor ($Zlo,"8($Htbl,$nhi[0])");
377 &movzw ($rem[0],"($rem_8bit,$rem[0],2)");
380 &xor ($Zhi,"($Htbl,$nhi[0])");
389 &jb (".Louter_loop");
405 .size gcm_ghash_4bit,.-gcm_ghash_4bit
408 ######################################################################
411 @_4args=$win64? ("%rcx","%rdx","%r8", "%r9") : # Win64 order
412 ("%rdi","%rsi","%rdx","%rcx"); # Unix order
414 ($Xi,$Xhi)=("%xmm0","%xmm1"); $Hkey="%xmm2";
415 ($T1,$T2,$T3)=("%xmm3","%xmm4","%xmm5");
417 sub clmul64x64_T2 { # minimal register pressure
418 my ($Xhi,$Xi,$Hkey,$HK)=@_;
420 if (!defined($HK)) { $HK = $T2;
423 pshufd \$0b01001110,$Xi,$T1
424 pshufd \$0b01001110,$Hkey,$T2
431 pshufd \$0b01001110,$Xi,$T1
436 pclmulqdq \$0x00,$Hkey,$Xi #######
437 pclmulqdq \$0x11,$Hkey,$Xhi #######
438 pclmulqdq \$0x00,$HK,$T1 #######
450 sub reduction_alg9 { # 17/11 times faster than Intel version
480 { my ($Htbl,$Xip)=@_4args;
484 .globl gcm_init_clmul
485 .type gcm_init_clmul,\@abi-omnipotent
490 $code.=<<___ if ($win64);
491 .LSEH_begin_gcm_init_clmul:
492 # I can't trust assembler to use specific encoding:-(
493 .byte 0x48,0x83,0xec,0x18 #sub $0x18,%rsp
494 .byte 0x0f,0x29,0x34,0x24 #movaps %xmm6,(%rsp)
498 pshufd \$0b01001110,$Hkey,$Hkey # dword swap
501 pshufd \$0b11111111,$Hkey,$T2 # broadcast uppermost dword
506 pcmpgtd $T2,$T3 # broadcast carry bit
508 por $T1,$Hkey # H<<=1
511 pand .L0x1c2_polynomial(%rip),$T3
512 pxor $T3,$Hkey # if(carry) H^=0x1c2_polynomial
515 pshufd \$0b01001110,$Hkey,$HK
519 &clmul64x64_T2 ($Xhi,$Xi,$Hkey,$HK);
520 &reduction_alg9 ($Xhi,$Xi);
522 pshufd \$0b01001110,$Hkey,$T1
523 pshufd \$0b01001110,$Xi,$T2
524 pxor $Hkey,$T1 # Karatsuba pre-processing
525 movdqu $Hkey,0x00($Htbl) # save H
526 pxor $Xi,$T2 # Karatsuba pre-processing
527 movdqu $Xi,0x10($Htbl) # save H^2
528 palignr \$8,$T1,$T2 # low part is H.lo^H.hi...
529 movdqu $T2,0x20($Htbl) # save Karatsuba "salt"
532 &clmul64x64_T2 ($Xhi,$Xi,$Hkey,$HK); # H^3
533 &reduction_alg9 ($Xhi,$Xi);
537 &clmul64x64_T2 ($Xhi,$Xi,$Hkey,$HK); # H^4
538 &reduction_alg9 ($Xhi,$Xi);
540 pshufd \$0b01001110,$T3,$T1
541 pshufd \$0b01001110,$Xi,$T2
542 pxor $T3,$T1 # Karatsuba pre-processing
543 movdqu $T3,0x30($Htbl) # save H^3
544 pxor $Xi,$T2 # Karatsuba pre-processing
545 movdqu $Xi,0x40($Htbl) # save H^4
546 palignr \$8,$T1,$T2 # low part is H^3.lo^H^3.hi...
547 movdqu $T2,0x50($Htbl) # save Karatsuba "salt"
550 $code.=<<___ if ($win64);
553 .LSEH_end_gcm_init_clmul:
557 .size gcm_init_clmul,.-gcm_init_clmul
561 { my ($Xip,$Htbl)=@_4args;
564 .globl gcm_gmult_clmul
565 .type gcm_gmult_clmul,\@abi-omnipotent
570 movdqa .Lbswap_mask(%rip),$T3
572 movdqu 0x20($Htbl),$T2
575 &clmul64x64_T2 ($Xhi,$Xi,$Hkey,$T2);
576 $code.=<<___ if (0 || (&reduction_alg9($Xhi,$Xi)&&0));
577 # experimental alternative. special thing about is that there
578 # no dependency between the two multiplications...
580 mov \$0xA040608020C0E000,%r10 # ((7..0)·0xE0)&0xff
584 movq %r11,$T3 # borrow $T3
586 pshufb $T3,$T2 # ($Xi&7)·0xE0
588 pclmulqdq \$0x00,$Xi,$T1 # ·(0xE1<<1)
591 paddd $T2,$T2 # <<(64+56+1)
593 pclmulqdq \$0x01,$T3,$Xi
594 movdqa .Lbswap_mask(%rip),$T3 # reload $T3
604 .size gcm_gmult_clmul,.-gcm_gmult_clmul
608 { my ($Xip,$Htbl,$inp,$len)=@_4args;
609 my ($Xln,$Xmn,$Xhn,$Hkey2,$HK) = map("%xmm$_",(3..7));
610 my ($T1,$T2,$T3)=map("%xmm$_",(8..10));
613 .globl gcm_ghash_clmul
614 .type gcm_ghash_clmul,\@abi-omnipotent
619 $code.=<<___ if ($win64);
621 .LSEH_begin_gcm_ghash_clmul:
622 # I can't trust assembler to use specific encoding:-(
623 .byte 0x48,0x8d,0x60,0xe0 #lea -0x20(%rax),%rsp
624 .byte 0x0f,0x29,0x70,0xe0 #movaps %xmm6,-0x20(%rax)
625 .byte 0x0f,0x29,0x78,0xf0 #movaps %xmm7,-0x10(%rax)
626 .byte 0x44,0x0f,0x29,0x00 #movaps %xmm8,0(%rax)
627 .byte 0x44,0x0f,0x29,0x48,0x10 #movaps %xmm9,0x10(%rax)
628 .byte 0x44,0x0f,0x29,0x50,0x20 #movaps %xmm10,0x20(%rax)
629 .byte 0x44,0x0f,0x29,0x58,0x30 #movaps %xmm11,0x30(%rax)
630 .byte 0x44,0x0f,0x29,0x60,0x40 #movaps %xmm12,0x40(%rax)
631 .byte 0x44,0x0f,0x29,0x68,0x50 #movaps %xmm13,0x50(%rax)
632 .byte 0x44,0x0f,0x29,0x70,0x60 #movaps %xmm14,0x60(%rax)
633 .byte 0x44,0x0f,0x29,0x78,0x70 #movaps %xmm15,0x70(%rax)
636 movdqa .Lbswap_mask(%rip),$T3
640 movdqu 0x20($Htbl),$HK
646 movdqu 0x10($Htbl),$Hkey2
649 my ($Xl,$Xm,$Xh,$Hkey3,$Hkey4)=map("%xmm$_",(11..15));
652 mov OPENSSL_ia32cap_P+4(%rip),%eax
656 and \$`1<<26|1<<22`,%eax # isolate MOVBE+XSAVE
657 cmp \$`1<<22`,%eax # check for MOVBE without XSAVE
661 mov \$0xA040608020C0E000,%rax # ((7..0)·0xE0)&0xff
662 movdqu 0x30($Htbl),$Hkey3
663 movdqu 0x40($Htbl),$Hkey4
666 # Xi+4 =[(H*Ii+3) + (H^2*Ii+2) + (H^3*Ii+1) + H^4*(Ii+Xi)] mod P
668 movdqu 0x30($inp),$Xln
669 movdqu 0x20($inp),$Xl
673 pshufd \$0b01001110,$Xln,$Xmn
675 pclmulqdq \$0x00,$Hkey,$Xln
676 pclmulqdq \$0x11,$Hkey,$Xhn
677 pclmulqdq \$0x00,$HK,$Xmn
680 pshufd \$0b01001110,$Xl,$Xm
682 pclmulqdq \$0x00,$Hkey2,$Xl
683 pclmulqdq \$0x11,$Hkey2,$Xh
684 pclmulqdq \$0x10,$HK,$Xm
687 movups 0x50($Htbl),$HK
690 movdqu 0x10($inp),$Xl
695 pshufd \$0b01001110,$Xl,$Xm
698 pclmulqdq \$0x00,$Hkey3,$Xl
700 pshufd \$0b01001110,$Xi,$T1
702 pclmulqdq \$0x11,$Hkey3,$Xh
703 pclmulqdq \$0x00,$HK,$Xm
714 pclmulqdq \$0x00,$Hkey4,$Xi
716 movdqu 0x30($inp),$Xl
718 pclmulqdq \$0x11,$Hkey4,$Xhi
720 movdqu 0x20($inp),$Xln
722 pclmulqdq \$0x10,$HK,$T1
723 pshufd \$0b01001110,$Xl,$Xm
727 movups 0x20($Htbl),$HK
729 pclmulqdq \$0x00,$Hkey,$Xl
730 pshufd \$0b01001110,$Xln,$Xmn
732 pxor $Xi,$T1 # aggregated Karatsuba post-processing
737 pclmulqdq \$0x11,$Hkey,$Xh
741 movdqa .L7_mask(%rip),$T1
745 pand $Xi,$T1 # 1st phase
748 pclmulqdq \$0x00,$HK,$Xm
752 pclmulqdq \$0x00,$Hkey2,$Xln
758 movdqa $Xi,$T2 # 2nd phase
760 pclmulqdq \$0x11,$Hkey2,$Xhn
762 movdqu 0x10($inp),$Xl
764 pclmulqdq \$0x10,$HK,$Xmn
766 movups 0x50($Htbl),$HK
774 pshufd \$0b01001110,$Xl,$Xm
778 pclmulqdq \$0x00,$Hkey3,$Xl
782 pclmulqdq \$0x11,$Hkey3,$Xh
784 pshufd \$0b01001110,$Xi,$T1
787 pclmulqdq \$0x00,$HK,$Xm
795 pclmulqdq \$0x00,$Hkey4,$Xi
796 pclmulqdq \$0x11,$Hkey4,$Xhi
797 pclmulqdq \$0x10,$HK,$T1
801 pxor $Xi,$Xhi # aggregated Karatsuba post-processing
813 &reduction_alg9($Xhi,$Xi);
817 movdqu 0x20($Htbl),$HK
825 # Xi+2 =[H*(Ii+1 + Xi+1)] mod P =
826 # [(H*Ii+1) + (H*Xi+1)] mod P =
827 # [(H*Ii+1) + H^2*(Ii+Xi)] mod P
829 movdqu ($inp),$T1 # Ii
830 movdqu 16($inp),$Xln # Ii+1
836 pshufd \$0b01001110,$Xln,$Xmn
838 pclmulqdq \$0x00,$Hkey,$Xln
839 pclmulqdq \$0x11,$Hkey,$Xhn
840 pclmulqdq \$0x00,$HK,$Xmn
842 lea 32($inp),$inp # i+=2
853 pshufd \$0b01001110,$Xi,$Xmn #
856 pclmulqdq \$0x00,$Hkey2,$Xi
857 pclmulqdq \$0x11,$Hkey2,$Xhi
858 pclmulqdq \$0x10,$HK,$Xmn
860 pxor $Xln,$Xi # (H*Ii+1) + H^2*(Ii+Xi)
862 movdqu ($inp),$T2 # Ii
863 pxor $Xi,$T1 # aggregated Karatsuba post-processing
865 movdqu 16($inp),$Xln # Ii+1
868 pxor $T2,$Xhi # "Ii+Xi", consume early
879 movdqa $Xi,$T2 # 1st phase
883 pclmulqdq \$0x00,$Hkey,$Xln #######
891 pshufd \$0b01001110,$Xhn,$Xmn
895 movdqa $Xi,$T2 # 2nd phase
897 pclmulqdq \$0x11,$Hkey,$Xhn #######
904 pclmulqdq \$0x00,$HK,$Xmn #######
913 pshufd \$0b01001110,$Xi,$Xmn #
916 pclmulqdq \$0x00,$Hkey2,$Xi
917 pclmulqdq \$0x11,$Hkey2,$Xhi
918 pclmulqdq \$0x10,$HK,$Xmn
920 pxor $Xln,$Xi # (H*Ii+1) + H^2*(Ii+Xi)
931 &reduction_alg9 ($Xhi,$Xi);
937 movdqu ($inp),$T1 # Ii
941 &clmul64x64_T2 ($Xhi,$Xi,$Hkey,$HK); # H*(Ii+Xi)
942 &reduction_alg9 ($Xhi,$Xi);
948 $code.=<<___ if ($win64);
950 movaps 0x10(%rsp),%xmm7
951 movaps 0x20(%rsp),%xmm8
952 movaps 0x30(%rsp),%xmm9
953 movaps 0x40(%rsp),%xmm10
954 movaps 0x50(%rsp),%xmm11
955 movaps 0x60(%rsp),%xmm12
956 movaps 0x70(%rsp),%xmm13
957 movaps 0x80(%rsp),%xmm14
958 movaps 0x90(%rsp),%xmm15
960 .LSEH_end_gcm_ghash_clmul:
964 .size gcm_ghash_clmul,.-gcm_ghash_clmul
970 .type gcm_init_avx,\@abi-omnipotent
975 my ($Htbl,$Xip)=@_4args;
978 $code.=<<___ if ($win64);
979 .LSEH_begin_gcm_init_avx:
980 # I can't trust assembler to use specific encoding:-(
981 .byte 0x48,0x83,0xec,0x18 #sub $0x18,%rsp
982 .byte 0x0f,0x29,0x34,0x24 #movaps %xmm6,(%rsp)
988 vpshufd \$0b01001110,$Hkey,$Hkey # dword swap
991 vpshufd \$0b11111111,$Hkey,$T2 # broadcast uppermost dword
992 vpsrlq \$63,$Hkey,$T1
993 vpsllq \$1,$Hkey,$Hkey
995 vpcmpgtd $T2,$T3,$T3 # broadcast carry bit
997 vpor $T1,$Hkey,$Hkey # H<<=1
1000 vpand .L0x1c2_polynomial(%rip),$T3,$T3
1001 vpxor $T3,$Hkey,$Hkey # if(carry) H^=0x1c2_polynomial
1003 vpunpckhqdq $Hkey,$Hkey,$HK
1006 mov \$4,%r10 # up to H^8
1007 jmp .Linit_start_avx
1010 sub clmul64x64_avx {
1011 my ($Xhi,$Xi,$Hkey,$HK)=@_;
1013 if (!defined($HK)) { $HK = $T2;
1015 vpunpckhqdq $Xi,$Xi,$T1
1016 vpunpckhqdq $Hkey,$Hkey,$T2
1022 vpunpckhqdq $Xi,$Xi,$T1
1027 vpclmulqdq \$0x11,$Hkey,$Xi,$Xhi #######
1028 vpclmulqdq \$0x00,$Hkey,$Xi,$Xi #######
1029 vpclmulqdq \$0x00,$HK,$T1,$T1 #######
1030 vpxor $Xi,$Xhi,$T2 #
1033 vpslldq \$8,$T1,$T2 #
1044 vpsllq \$57,$Xi,$T1 # 1st phase
1049 vpslldq \$8,$T2,$T1 #
1054 vpsrlq \$1,$Xi,$T2 # 2nd phase
1059 vpsrlq \$1,$Xi,$Xi #
1060 vpxor $Xhi,$Xi,$Xi #
1067 vpalignr \$8,$T1,$T2,$T3 # low part is H.lo^H.hi...
1068 vmovdqu $T3,-0x10($Htbl) # save Karatsuba "salt"
1070 &clmul64x64_avx ($Xhi,$Xi,$Hkey,$HK); # calculate H^3,5,7
1071 &reduction_avx ($Xhi,$Xi);
1076 &clmul64x64_avx ($Xhi,$Xi,$Hkey,$HK); # calculate H^2,4,6,8
1077 &reduction_avx ($Xhi,$Xi);
1079 vpshufd \$0b01001110,$T3,$T1
1080 vpshufd \$0b01001110,$Xi,$T2
1081 vpxor $T3,$T1,$T1 # Karatsuba pre-processing
1082 vmovdqu $T3,0x00($Htbl) # save H^1,3,5,7
1083 vpxor $Xi,$T2,$T2 # Karatsuba pre-processing
1084 vmovdqu $Xi,0x10($Htbl) # save H^2,4,6,8
1085 lea 0x30($Htbl),$Htbl
1089 vpalignr \$8,$T2,$T1,$T3 # last "salt" is flipped
1090 vmovdqu $T3,-0x10($Htbl)
1094 $code.=<<___ if ($win64);
1097 .LSEH_end_gcm_init_avx:
1101 .size gcm_init_avx,.-gcm_init_avx
1106 .size gcm_init_avx,.-gcm_init_avx
1111 .globl gcm_gmult_avx
1112 .type gcm_gmult_avx,\@abi-omnipotent
1116 .size gcm_gmult_avx,.-gcm_gmult_avx
1120 .globl gcm_ghash_avx
1121 .type gcm_ghash_avx,\@abi-omnipotent
1126 my ($Xip,$Htbl,$inp,$len)=@_4args;
1130 $Xi,$Xo,$Tred,$bswap,$Ii,$Ij) = map("%xmm$_",(0..15));
1132 $code.=<<___ if ($win64);
1133 lea -0x88(%rsp),%rax
1134 .LSEH_begin_gcm_ghash_avx:
1135 # I can't trust assembler to use specific encoding:-(
1136 .byte 0x48,0x8d,0x60,0xe0 #lea -0x20(%rax),%rsp
1137 .byte 0x0f,0x29,0x70,0xe0 #movaps %xmm6,-0x20(%rax)
1138 .byte 0x0f,0x29,0x78,0xf0 #movaps %xmm7,-0x10(%rax)
1139 .byte 0x44,0x0f,0x29,0x00 #movaps %xmm8,0(%rax)
1140 .byte 0x44,0x0f,0x29,0x48,0x10 #movaps %xmm9,0x10(%rax)
1141 .byte 0x44,0x0f,0x29,0x50,0x20 #movaps %xmm10,0x20(%rax)
1142 .byte 0x44,0x0f,0x29,0x58,0x30 #movaps %xmm11,0x30(%rax)
1143 .byte 0x44,0x0f,0x29,0x60,0x40 #movaps %xmm12,0x40(%rax)
1144 .byte 0x44,0x0f,0x29,0x68,0x50 #movaps %xmm13,0x50(%rax)
1145 .byte 0x44,0x0f,0x29,0x70,0x60 #movaps %xmm14,0x60(%rax)
1146 .byte 0x44,0x0f,0x29,0x78,0x70 #movaps %xmm15,0x70(%rax)
1151 vmovdqu ($Xip),$Xi # load $Xi
1152 lea .L0x1c2_polynomial(%rip),%r10
1153 lea 0x40($Htbl),$Htbl # size optimization
1154 vmovdqu .Lbswap_mask(%rip),$bswap
1155 vpshufb $bswap,$Xi,$Xi
1160 vmovdqu 0x70($inp),$Ii # I[7]
1161 vmovdqu 0x00-0x40($Htbl),$Hkey # $Hkey^1
1162 vpshufb $bswap,$Ii,$Ii
1163 vmovdqu 0x20-0x40($Htbl),$HK
1165 vpunpckhqdq $Ii,$Ii,$T2
1166 vmovdqu 0x60($inp),$Ij # I[6]
1167 vpclmulqdq \$0x00,$Hkey,$Ii,$Xlo
1169 vpshufb $bswap,$Ij,$Ij
1170 vpclmulqdq \$0x11,$Hkey,$Ii,$Xhi
1171 vmovdqu 0x10-0x40($Htbl),$Hkey # $Hkey^2
1172 vpunpckhqdq $Ij,$Ij,$T1
1173 vmovdqu 0x50($inp),$Ii # I[5]
1174 vpclmulqdq \$0x00,$HK,$T2,$Xmi
1177 vpshufb $bswap,$Ii,$Ii
1178 vpclmulqdq \$0x00,$Hkey,$Ij,$Zlo
1179 vpunpckhqdq $Ii,$Ii,$T2
1180 vpclmulqdq \$0x11,$Hkey,$Ij,$Zhi
1181 vmovdqu 0x30-0x40($Htbl),$Hkey # $Hkey^3
1183 vmovdqu 0x40($inp),$Ij # I[4]
1184 vpclmulqdq \$0x10,$HK,$T1,$Zmi
1185 vmovdqu 0x50-0x40($Htbl),$HK
1187 vpshufb $bswap,$Ij,$Ij
1188 vpxor $Xlo,$Zlo,$Zlo
1189 vpclmulqdq \$0x00,$Hkey,$Ii,$Xlo
1190 vpxor $Xhi,$Zhi,$Zhi
1191 vpunpckhqdq $Ij,$Ij,$T1
1192 vpclmulqdq \$0x11,$Hkey,$Ii,$Xhi
1193 vmovdqu 0x40-0x40($Htbl),$Hkey # $Hkey^4
1194 vpxor $Xmi,$Zmi,$Zmi
1195 vpclmulqdq \$0x00,$HK,$T2,$Xmi
1198 vmovdqu 0x30($inp),$Ii # I[3]
1199 vpxor $Zlo,$Xlo,$Xlo
1200 vpclmulqdq \$0x00,$Hkey,$Ij,$Zlo
1201 vpxor $Zhi,$Xhi,$Xhi
1202 vpshufb $bswap,$Ii,$Ii
1203 vpclmulqdq \$0x11,$Hkey,$Ij,$Zhi
1204 vmovdqu 0x60-0x40($Htbl),$Hkey # $Hkey^5
1205 vpxor $Zmi,$Xmi,$Xmi
1206 vpunpckhqdq $Ii,$Ii,$T2
1207 vpclmulqdq \$0x10,$HK,$T1,$Zmi
1208 vmovdqu 0x80-0x40($Htbl),$HK
1211 vmovdqu 0x20($inp),$Ij # I[2]
1212 vpxor $Xlo,$Zlo,$Zlo
1213 vpclmulqdq \$0x00,$Hkey,$Ii,$Xlo
1214 vpxor $Xhi,$Zhi,$Zhi
1215 vpshufb $bswap,$Ij,$Ij
1216 vpclmulqdq \$0x11,$Hkey,$Ii,$Xhi
1217 vmovdqu 0x70-0x40($Htbl),$Hkey # $Hkey^6
1218 vpxor $Xmi,$Zmi,$Zmi
1219 vpunpckhqdq $Ij,$Ij,$T1
1220 vpclmulqdq \$0x00,$HK,$T2,$Xmi
1223 vmovdqu 0x10($inp),$Ii # I[1]
1224 vpxor $Zlo,$Xlo,$Xlo
1225 vpclmulqdq \$0x00,$Hkey,$Ij,$Zlo
1226 vpxor $Zhi,$Xhi,$Xhi
1227 vpshufb $bswap,$Ii,$Ii
1228 vpclmulqdq \$0x11,$Hkey,$Ij,$Zhi
1229 vmovdqu 0x90-0x40($Htbl),$Hkey # $Hkey^7
1230 vpxor $Zmi,$Xmi,$Xmi
1231 vpunpckhqdq $Ii,$Ii,$T2
1232 vpclmulqdq \$0x10,$HK,$T1,$Zmi
1233 vmovdqu 0xb0-0x40($Htbl),$HK
1236 vmovdqu ($inp),$Ij # I[0]
1237 vpxor $Xlo,$Zlo,$Zlo
1238 vpclmulqdq \$0x00,$Hkey,$Ii,$Xlo
1239 vpxor $Xhi,$Zhi,$Zhi
1240 vpshufb $bswap,$Ij,$Ij
1241 vpclmulqdq \$0x11,$Hkey,$Ii,$Xhi
1242 vmovdqu 0xa0-0x40($Htbl),$Hkey # $Hkey^8
1243 vpxor $Xmi,$Zmi,$Zmi
1244 vpclmulqdq \$0x10,$HK,$T2,$Xmi
1250 vpxor $Xi,$Ij,$Ij # accumulate $Xi
1256 vpunpckhqdq $Ij,$Ij,$T1
1257 vmovdqu 0x70($inp),$Ii # I[7]
1258 vpxor $Xlo,$Zlo,$Zlo
1260 vpclmulqdq \$0x00,$Hkey,$Ij,$Xi
1261 vpshufb $bswap,$Ii,$Ii
1262 vpxor $Xhi,$Zhi,$Zhi
1263 vpclmulqdq \$0x11,$Hkey,$Ij,$Xo
1264 vmovdqu 0x00-0x40($Htbl),$Hkey # $Hkey^1
1265 vpunpckhqdq $Ii,$Ii,$T2
1266 vpxor $Xmi,$Zmi,$Zmi
1267 vpclmulqdq \$0x00,$HK,$T1,$Tred
1268 vmovdqu 0x20-0x40($Htbl),$HK
1271 vmovdqu 0x60($inp),$Ij # I[6]
1272 vpclmulqdq \$0x00,$Hkey,$Ii,$Xlo
1273 vpxor $Zlo,$Xi,$Xi # collect result
1274 vpshufb $bswap,$Ij,$Ij
1275 vpclmulqdq \$0x11,$Hkey,$Ii,$Xhi
1277 vmovdqu 0x10-0x40($Htbl),$Hkey # $Hkey^2
1278 vpunpckhqdq $Ij,$Ij,$T1
1279 vpclmulqdq \$0x00,$HK, $T2,$Xmi
1280 vpxor $Zmi,$Tred,$Tred
1283 vmovdqu 0x50($inp),$Ii # I[5]
1284 vpxor $Xi,$Tred,$Tred # aggregated Karatsuba post-processing
1285 vpclmulqdq \$0x00,$Hkey,$Ij,$Zlo
1286 vpxor $Xo,$Tred,$Tred
1287 vpslldq \$8,$Tred,$T2
1288 vpxor $Xlo,$Zlo,$Zlo
1289 vpclmulqdq \$0x11,$Hkey,$Ij,$Zhi
1290 vpsrldq \$8,$Tred,$Tred
1292 vmovdqu 0x30-0x40($Htbl),$Hkey # $Hkey^3
1293 vpshufb $bswap,$Ii,$Ii
1294 vxorps $Tred,$Xo, $Xo
1295 vpxor $Xhi,$Zhi,$Zhi
1296 vpunpckhqdq $Ii,$Ii,$T2
1297 vpclmulqdq \$0x10,$HK, $T1,$Zmi
1298 vmovdqu 0x50-0x40($Htbl),$HK
1300 vpxor $Xmi,$Zmi,$Zmi
1302 vmovdqu 0x40($inp),$Ij # I[4]
1303 vpalignr \$8,$Xi,$Xi,$Tred # 1st phase
1304 vpclmulqdq \$0x00,$Hkey,$Ii,$Xlo
1305 vpshufb $bswap,$Ij,$Ij
1306 vpxor $Zlo,$Xlo,$Xlo
1307 vpclmulqdq \$0x11,$Hkey,$Ii,$Xhi
1308 vmovdqu 0x40-0x40($Htbl),$Hkey # $Hkey^4
1309 vpunpckhqdq $Ij,$Ij,$T1
1310 vpxor $Zhi,$Xhi,$Xhi
1311 vpclmulqdq \$0x00,$HK, $T2,$Xmi
1313 vpxor $Zmi,$Xmi,$Xmi
1315 vmovdqu 0x30($inp),$Ii # I[3]
1316 vpclmulqdq \$0x10,(%r10),$Xi,$Xi
1317 vpclmulqdq \$0x00,$Hkey,$Ij,$Zlo
1318 vpshufb $bswap,$Ii,$Ii
1319 vpxor $Xlo,$Zlo,$Zlo
1320 vpclmulqdq \$0x11,$Hkey,$Ij,$Zhi
1321 vmovdqu 0x60-0x40($Htbl),$Hkey # $Hkey^5
1322 vpunpckhqdq $Ii,$Ii,$T2
1323 vpxor $Xhi,$Zhi,$Zhi
1324 vpclmulqdq \$0x10,$HK, $T1,$Zmi
1325 vmovdqu 0x80-0x40($Htbl),$HK
1327 vpxor $Xmi,$Zmi,$Zmi
1329 vmovdqu 0x20($inp),$Ij # I[2]
1330 vpclmulqdq \$0x00,$Hkey,$Ii,$Xlo
1331 vpshufb $bswap,$Ij,$Ij
1332 vpxor $Zlo,$Xlo,$Xlo
1333 vpclmulqdq \$0x11,$Hkey,$Ii,$Xhi
1334 vmovdqu 0x70-0x40($Htbl),$Hkey # $Hkey^6
1335 vpunpckhqdq $Ij,$Ij,$T1
1336 vpxor $Zhi,$Xhi,$Xhi
1337 vpclmulqdq \$0x00,$HK, $T2,$Xmi
1339 vpxor $Zmi,$Xmi,$Xmi
1340 vxorps $Tred,$Xi,$Xi
1342 vmovdqu 0x10($inp),$Ii # I[1]
1343 vpalignr \$8,$Xi,$Xi,$Tred # 2nd phase
1344 vpclmulqdq \$0x00,$Hkey,$Ij,$Zlo
1345 vpshufb $bswap,$Ii,$Ii
1346 vpxor $Xlo,$Zlo,$Zlo
1347 vpclmulqdq \$0x11,$Hkey,$Ij,$Zhi
1348 vmovdqu 0x90-0x40($Htbl),$Hkey # $Hkey^7
1349 vpclmulqdq \$0x10,(%r10),$Xi,$Xi
1350 vxorps $Xo,$Tred,$Tred
1351 vpunpckhqdq $Ii,$Ii,$T2
1352 vpxor $Xhi,$Zhi,$Zhi
1353 vpclmulqdq \$0x10,$HK, $T1,$Zmi
1354 vmovdqu 0xb0-0x40($Htbl),$HK
1356 vpxor $Xmi,$Zmi,$Zmi
1358 vmovdqu ($inp),$Ij # I[0]
1359 vpclmulqdq \$0x00,$Hkey,$Ii,$Xlo
1360 vpshufb $bswap,$Ij,$Ij
1361 vpclmulqdq \$0x11,$Hkey,$Ii,$Xhi
1362 vmovdqu 0xa0-0x40($Htbl),$Hkey # $Hkey^8
1364 vpclmulqdq \$0x10,$HK, $T2,$Xmi
1365 vpxor $Xi,$Ij,$Ij # accumulate $Xi
1372 jmp .Ltail_no_xor_avx
1376 vmovdqu -0x10($inp,$len),$Ii # very last word
1377 lea ($inp,$len),$inp
1378 vmovdqu 0x00-0x40($Htbl),$Hkey # $Hkey^1
1379 vmovdqu 0x20-0x40($Htbl),$HK
1380 vpshufb $bswap,$Ii,$Ij
1382 vmovdqa $Xlo,$Zlo # subtle way to zero $Zlo,
1383 vmovdqa $Xhi,$Zhi # $Zhi and
1384 vmovdqa $Xmi,$Zmi # $Zmi
1388 vpunpckhqdq $Ij,$Ij,$T1
1389 vpxor $Xlo,$Zlo,$Zlo
1390 vpclmulqdq \$0x00,$Hkey,$Ij,$Xlo
1392 vmovdqu -0x20($inp),$Ii
1393 vpxor $Xhi,$Zhi,$Zhi
1394 vpclmulqdq \$0x11,$Hkey,$Ij,$Xhi
1395 vmovdqu 0x10-0x40($Htbl),$Hkey # $Hkey^2
1396 vpshufb $bswap,$Ii,$Ij
1397 vpxor $Xmi,$Zmi,$Zmi
1398 vpclmulqdq \$0x00,$HK,$T1,$Xmi
1403 vpunpckhqdq $Ij,$Ij,$T1
1404 vpxor $Xlo,$Zlo,$Zlo
1405 vpclmulqdq \$0x00,$Hkey,$Ij,$Xlo
1407 vmovdqu -0x30($inp),$Ii
1408 vpxor $Xhi,$Zhi,$Zhi
1409 vpclmulqdq \$0x11,$Hkey,$Ij,$Xhi
1410 vmovdqu 0x30-0x40($Htbl),$Hkey # $Hkey^3
1411 vpshufb $bswap,$Ii,$Ij
1412 vpxor $Xmi,$Zmi,$Zmi
1413 vpclmulqdq \$0x00,$HK,$T1,$Xmi
1414 vmovdqu 0x50-0x40($Htbl),$HK
1418 vpunpckhqdq $Ij,$Ij,$T1
1419 vpxor $Xlo,$Zlo,$Zlo
1420 vpclmulqdq \$0x00,$Hkey,$Ij,$Xlo
1422 vmovdqu -0x40($inp),$Ii
1423 vpxor $Xhi,$Zhi,$Zhi
1424 vpclmulqdq \$0x11,$Hkey,$Ij,$Xhi
1425 vmovdqu 0x40-0x40($Htbl),$Hkey # $Hkey^4
1426 vpshufb $bswap,$Ii,$Ij
1427 vpxor $Xmi,$Zmi,$Zmi
1428 vpclmulqdq \$0x00,$HK,$T1,$Xmi
1433 vpunpckhqdq $Ij,$Ij,$T1
1434 vpxor $Xlo,$Zlo,$Zlo
1435 vpclmulqdq \$0x00,$Hkey,$Ij,$Xlo
1437 vmovdqu -0x50($inp),$Ii
1438 vpxor $Xhi,$Zhi,$Zhi
1439 vpclmulqdq \$0x11,$Hkey,$Ij,$Xhi
1440 vmovdqu 0x60-0x40($Htbl),$Hkey # $Hkey^5
1441 vpshufb $bswap,$Ii,$Ij
1442 vpxor $Xmi,$Zmi,$Zmi
1443 vpclmulqdq \$0x00,$HK,$T1,$Xmi
1444 vmovdqu 0x80-0x40($Htbl),$HK
1448 vpunpckhqdq $Ij,$Ij,$T1
1449 vpxor $Xlo,$Zlo,$Zlo
1450 vpclmulqdq \$0x00,$Hkey,$Ij,$Xlo
1452 vmovdqu -0x60($inp),$Ii
1453 vpxor $Xhi,$Zhi,$Zhi
1454 vpclmulqdq \$0x11,$Hkey,$Ij,$Xhi
1455 vmovdqu 0x70-0x40($Htbl),$Hkey # $Hkey^6
1456 vpshufb $bswap,$Ii,$Ij
1457 vpxor $Xmi,$Zmi,$Zmi
1458 vpclmulqdq \$0x00,$HK,$T1,$Xmi
1463 vpunpckhqdq $Ij,$Ij,$T1
1464 vpxor $Xlo,$Zlo,$Zlo
1465 vpclmulqdq \$0x00,$Hkey,$Ij,$Xlo
1467 vmovdqu -0x70($inp),$Ii
1468 vpxor $Xhi,$Zhi,$Zhi
1469 vpclmulqdq \$0x11,$Hkey,$Ij,$Xhi
1470 vmovdqu 0x90-0x40($Htbl),$Hkey # $Hkey^7
1471 vpshufb $bswap,$Ii,$Ij
1472 vpxor $Xmi,$Zmi,$Zmi
1473 vpclmulqdq \$0x00,$HK,$T1,$Xmi
1474 vmovq 0xb8-0x40($Htbl),$HK
1480 vpxor $Xi,$Ij,$Ij # accumulate $Xi
1482 vpunpckhqdq $Ij,$Ij,$T1
1483 vpxor $Xlo,$Zlo,$Zlo
1484 vpclmulqdq \$0x00,$Hkey,$Ij,$Xlo
1486 vpxor $Xhi,$Zhi,$Zhi
1487 vpclmulqdq \$0x11,$Hkey,$Ij,$Xhi
1488 vpxor $Xmi,$Zmi,$Zmi
1489 vpclmulqdq \$0x00,$HK,$T1,$Xmi
1491 vmovdqu (%r10),$Tred
1495 vpxor $Xmi,$Zmi,$Zmi
1497 vpxor $Xi, $Zmi,$Zmi # aggregated Karatsuba post-processing
1498 vpxor $Xo, $Zmi,$Zmi
1499 vpslldq \$8, $Zmi,$T2
1500 vpsrldq \$8, $Zmi,$Zmi
1504 vpclmulqdq \$0x10,$Tred,$Xi,$T2 # 1st phase
1505 vpalignr \$8,$Xi,$Xi,$Xi
1508 vpclmulqdq \$0x10,$Tred,$Xi,$T2 # 2nd phase
1509 vpalignr \$8,$Xi,$Xi,$Xi
1516 vpshufb $bswap,$Xi,$Xi
1520 $code.=<<___ if ($win64);
1522 movaps 0x10(%rsp),%xmm7
1523 movaps 0x20(%rsp),%xmm8
1524 movaps 0x30(%rsp),%xmm9
1525 movaps 0x40(%rsp),%xmm10
1526 movaps 0x50(%rsp),%xmm11
1527 movaps 0x60(%rsp),%xmm12
1528 movaps 0x70(%rsp),%xmm13
1529 movaps 0x80(%rsp),%xmm14
1530 movaps 0x90(%rsp),%xmm15
1532 .LSEH_end_gcm_ghash_avx:
1536 .size gcm_ghash_avx,.-gcm_ghash_avx
1541 .size gcm_ghash_avx,.-gcm_ghash_avx
1548 .byte 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0
1550 .byte 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0xc2
1554 .long 7,0,`0xE1<<1`,0
1556 .type .Lrem_4bit,\@object
1558 .long 0,`0x0000<<16`,0,`0x1C20<<16`,0,`0x3840<<16`,0,`0x2460<<16`
1559 .long 0,`0x7080<<16`,0,`0x6CA0<<16`,0,`0x48C0<<16`,0,`0x54E0<<16`
1560 .long 0,`0xE100<<16`,0,`0xFD20<<16`,0,`0xD940<<16`,0,`0xC560<<16`
1561 .long 0,`0x9180<<16`,0,`0x8DA0<<16`,0,`0xA9C0<<16`,0,`0xB5E0<<16`
1562 .type .Lrem_8bit,\@object
1564 .value 0x0000,0x01C2,0x0384,0x0246,0x0708,0x06CA,0x048C,0x054E
1565 .value 0x0E10,0x0FD2,0x0D94,0x0C56,0x0918,0x08DA,0x0A9C,0x0B5E
1566 .value 0x1C20,0x1DE2,0x1FA4,0x1E66,0x1B28,0x1AEA,0x18AC,0x196E
1567 .value 0x1230,0x13F2,0x11B4,0x1076,0x1538,0x14FA,0x16BC,0x177E
1568 .value 0x3840,0x3982,0x3BC4,0x3A06,0x3F48,0x3E8A,0x3CCC,0x3D0E
1569 .value 0x3650,0x3792,0x35D4,0x3416,0x3158,0x309A,0x32DC,0x331E
1570 .value 0x2460,0x25A2,0x27E4,0x2626,0x2368,0x22AA,0x20EC,0x212E
1571 .value 0x2A70,0x2BB2,0x29F4,0x2836,0x2D78,0x2CBA,0x2EFC,0x2F3E
1572 .value 0x7080,0x7142,0x7304,0x72C6,0x7788,0x764A,0x740C,0x75CE
1573 .value 0x7E90,0x7F52,0x7D14,0x7CD6,0x7998,0x785A,0x7A1C,0x7BDE
1574 .value 0x6CA0,0x6D62,0x6F24,0x6EE6,0x6BA8,0x6A6A,0x682C,0x69EE
1575 .value 0x62B0,0x6372,0x6134,0x60F6,0x65B8,0x647A,0x663C,0x67FE
1576 .value 0x48C0,0x4902,0x4B44,0x4A86,0x4FC8,0x4E0A,0x4C4C,0x4D8E
1577 .value 0x46D0,0x4712,0x4554,0x4496,0x41D8,0x401A,0x425C,0x439E
1578 .value 0x54E0,0x5522,0x5764,0x56A6,0x53E8,0x522A,0x506C,0x51AE
1579 .value 0x5AF0,0x5B32,0x5974,0x58B6,0x5DF8,0x5C3A,0x5E7C,0x5FBE
1580 .value 0xE100,0xE0C2,0xE284,0xE346,0xE608,0xE7CA,0xE58C,0xE44E
1581 .value 0xEF10,0xEED2,0xEC94,0xED56,0xE818,0xE9DA,0xEB9C,0xEA5E
1582 .value 0xFD20,0xFCE2,0xFEA4,0xFF66,0xFA28,0xFBEA,0xF9AC,0xF86E
1583 .value 0xF330,0xF2F2,0xF0B4,0xF176,0xF438,0xF5FA,0xF7BC,0xF67E
1584 .value 0xD940,0xD882,0xDAC4,0xDB06,0xDE48,0xDF8A,0xDDCC,0xDC0E
1585 .value 0xD750,0xD692,0xD4D4,0xD516,0xD058,0xD19A,0xD3DC,0xD21E
1586 .value 0xC560,0xC4A2,0xC6E4,0xC726,0xC268,0xC3AA,0xC1EC,0xC02E
1587 .value 0xCB70,0xCAB2,0xC8F4,0xC936,0xCC78,0xCDBA,0xCFFC,0xCE3E
1588 .value 0x9180,0x9042,0x9204,0x93C6,0x9688,0x974A,0x950C,0x94CE
1589 .value 0x9F90,0x9E52,0x9C14,0x9DD6,0x9898,0x995A,0x9B1C,0x9ADE
1590 .value 0x8DA0,0x8C62,0x8E24,0x8FE6,0x8AA8,0x8B6A,0x892C,0x88EE
1591 .value 0x83B0,0x8272,0x8034,0x81F6,0x84B8,0x857A,0x873C,0x86FE
1592 .value 0xA9C0,0xA802,0xAA44,0xAB86,0xAEC8,0xAF0A,0xAD4C,0xAC8E
1593 .value 0xA7D0,0xA612,0xA454,0xA596,0xA0D8,0xA11A,0xA35C,0xA29E
1594 .value 0xB5E0,0xB422,0xB664,0xB7A6,0xB2E8,0xB32A,0xB16C,0xB0AE
1595 .value 0xBBF0,0xBA32,0xB874,0xB9B6,0xBCF8,0xBD3A,0xBF7C,0xBEBE
1597 .asciz "GHASH for x86_64, CRYPTOGAMS by <appro\@openssl.org>"
1601 # EXCEPTION_DISPOSITION handler (EXCEPTION_RECORD *rec,ULONG64 frame,
1602 # CONTEXT *context,DISPATCHER_CONTEXT *disp)
1610 .extern __imp_RtlVirtualUnwind
1611 .type se_handler,\@abi-omnipotent
1625 mov 120($context),%rax # pull context->Rax
1626 mov 248($context),%rbx # pull context->Rip
1628 mov 8($disp),%rsi # disp->ImageBase
1629 mov 56($disp),%r11 # disp->HandlerData
1631 mov 0(%r11),%r10d # HandlerData[0]
1632 lea (%rsi,%r10),%r10 # prologue label
1633 cmp %r10,%rbx # context->Rip<prologue label
1636 mov 152($context),%rax # pull context->Rsp
1638 mov 4(%r11),%r10d # HandlerData[1]
1639 lea (%rsi,%r10),%r10 # epilogue label
1640 cmp %r10,%rbx # context->Rip>=epilogue label
1643 lea 24(%rax),%rax # adjust "rsp"
1648 mov %rbx,144($context) # restore context->Rbx
1649 mov %rbp,160($context) # restore context->Rbp
1650 mov %r12,216($context) # restore context->R12
1655 mov %rax,152($context) # restore context->Rsp
1656 mov %rsi,168($context) # restore context->Rsi
1657 mov %rdi,176($context) # restore context->Rdi
1659 mov 40($disp),%rdi # disp->ContextRecord
1660 mov $context,%rsi # context
1661 mov \$`1232/8`,%ecx # sizeof(CONTEXT)
1662 .long 0xa548f3fc # cld; rep movsq
1665 xor %rcx,%rcx # arg1, UNW_FLAG_NHANDLER
1666 mov 8(%rsi),%rdx # arg2, disp->ImageBase
1667 mov 0(%rsi),%r8 # arg3, disp->ControlPc
1668 mov 16(%rsi),%r9 # arg4, disp->FunctionEntry
1669 mov 40(%rsi),%r10 # disp->ContextRecord
1670 lea 56(%rsi),%r11 # &disp->HandlerData
1671 lea 24(%rsi),%r12 # &disp->EstablisherFrame
1672 mov %r10,32(%rsp) # arg5
1673 mov %r11,40(%rsp) # arg6
1674 mov %r12,48(%rsp) # arg7
1675 mov %rcx,56(%rsp) # arg8, (NULL)
1676 call *__imp_RtlVirtualUnwind(%rip)
1678 mov \$1,%eax # ExceptionContinueSearch
1690 .size se_handler,.-se_handler
1694 .rva .LSEH_begin_gcm_gmult_4bit
1695 .rva .LSEH_end_gcm_gmult_4bit
1696 .rva .LSEH_info_gcm_gmult_4bit
1698 .rva .LSEH_begin_gcm_ghash_4bit
1699 .rva .LSEH_end_gcm_ghash_4bit
1700 .rva .LSEH_info_gcm_ghash_4bit
1702 .rva .LSEH_begin_gcm_init_clmul
1703 .rva .LSEH_end_gcm_init_clmul
1704 .rva .LSEH_info_gcm_init_clmul
1706 .rva .LSEH_begin_gcm_ghash_clmul
1707 .rva .LSEH_end_gcm_ghash_clmul
1708 .rva .LSEH_info_gcm_ghash_clmul
1710 $code.=<<___ if ($avx);
1711 .rva .LSEH_begin_gcm_init_avx
1712 .rva .LSEH_end_gcm_init_avx
1713 .rva .LSEH_info_gcm_init_clmul
1715 .rva .LSEH_begin_gcm_ghash_avx
1716 .rva .LSEH_end_gcm_ghash_avx
1717 .rva .LSEH_info_gcm_ghash_clmul
1722 .LSEH_info_gcm_gmult_4bit:
1725 .rva .Lgmult_prologue,.Lgmult_epilogue # HandlerData
1726 .LSEH_info_gcm_ghash_4bit:
1729 .rva .Lghash_prologue,.Lghash_epilogue # HandlerData
1730 .LSEH_info_gcm_init_clmul:
1731 .byte 0x01,0x08,0x03,0x00
1732 .byte 0x08,0x68,0x00,0x00 #movaps 0x00(rsp),xmm6
1733 .byte 0x04,0x22,0x00,0x00 #sub rsp,0x18
1734 .LSEH_info_gcm_ghash_clmul:
1735 .byte 0x01,0x33,0x16,0x00
1736 .byte 0x33,0xf8,0x09,0x00 #movaps 0x90(rsp),xmm15
1737 .byte 0x2e,0xe8,0x08,0x00 #movaps 0x80(rsp),xmm14
1738 .byte 0x29,0xd8,0x07,0x00 #movaps 0x70(rsp),xmm13
1739 .byte 0x24,0xc8,0x06,0x00 #movaps 0x60(rsp),xmm12
1740 .byte 0x1f,0xb8,0x05,0x00 #movaps 0x50(rsp),xmm11
1741 .byte 0x1a,0xa8,0x04,0x00 #movaps 0x40(rsp),xmm10
1742 .byte 0x15,0x98,0x03,0x00 #movaps 0x30(rsp),xmm9
1743 .byte 0x10,0x88,0x02,0x00 #movaps 0x20(rsp),xmm8
1744 .byte 0x0c,0x78,0x01,0x00 #movaps 0x10(rsp),xmm7
1745 .byte 0x08,0x68,0x00,0x00 #movaps 0x00(rsp),xmm6
1746 .byte 0x04,0x01,0x15,0x00 #sub rsp,0xa8
1750 $code =~ s/\`([^\`]*)\`/eval($1)/gem;