817f6e59a03877c737126802cbe835957764daa8
[openssl.git] / crypto / modes / asm / ghash-x86_64.pl
1 #! /usr/bin/env perl
2 # Copyright 2010-2016 The OpenSSL Project Authors. All Rights Reserved.
3 #
4 # Licensed under the OpenSSL license (the "License").  You may not use
5 # this file except in compliance with the License.  You can obtain a copy
6 # in the file LICENSE in the source distribution or at
7 # https://www.openssl.org/source/license.html
8
9 #
10 # ====================================================================
11 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
12 # project. The module is, however, dual licensed under OpenSSL and
13 # CRYPTOGAMS licenses depending on where you obtain it. For further
14 # details see http://www.openssl.org/~appro/cryptogams/.
15 # ====================================================================
16 #
17 # March, June 2010
18 #
19 # The module implements "4-bit" GCM GHASH function and underlying
20 # single multiplication operation in GF(2^128). "4-bit" means that
21 # it uses 256 bytes per-key table [+128 bytes shared table]. GHASH
22 # function features so called "528B" variant utilizing additional
23 # 256+16 bytes of per-key storage [+512 bytes shared table].
24 # Performance results are for this streamed GHASH subroutine and are
25 # expressed in cycles per processed byte, less is better:
26 #
27 #               gcc 3.4.x(*)    assembler
28 #
29 # P4            28.6            14.0            +100%
30 # Opteron       19.3            7.7             +150%
31 # Core2         17.8            8.1(**)         +120%
32 # Atom          31.6            16.8            +88%
33 # VIA Nano      21.8            10.1            +115%
34 #
35 # (*)   comparison is not completely fair, because C results are
36 #       for vanilla "256B" implementation, while assembler results
37 #       are for "528B";-)
38 # (**)  it's mystery [to me] why Core2 result is not same as for
39 #       Opteron;
40
41 # May 2010
42 #
43 # Add PCLMULQDQ version performing at 2.02 cycles per processed byte.
44 # See ghash-x86.pl for background information and details about coding
45 # techniques.
46 #
47 # Special thanks to David Woodhouse <dwmw2@infradead.org> for
48 # providing access to a Westmere-based system on behalf of Intel
49 # Open Source Technology Centre.
50
51 # December 2012
52 #
53 # Overhaul: aggregate Karatsuba post-processing, improve ILP in
54 # reduction_alg9, increase reduction aggregate factor to 4x. As for
55 # the latter. ghash-x86.pl discusses that it makes lesser sense to
56 # increase aggregate factor. Then why increase here? Critical path
57 # consists of 3 independent pclmulqdq instructions, Karatsuba post-
58 # processing and reduction. "On top" of this we lay down aggregated
59 # multiplication operations, triplets of independent pclmulqdq's. As
60 # issue rate for pclmulqdq is limited, it makes lesser sense to
61 # aggregate more multiplications than it takes to perform remaining
62 # non-multiplication operations. 2x is near-optimal coefficient for
63 # contemporary Intel CPUs (therefore modest improvement coefficient),
64 # but not for Bulldozer. Latter is because logical SIMD operations
65 # are twice as slow in comparison to Intel, so that critical path is
66 # longer. A CPU with higher pclmulqdq issue rate would also benefit
67 # from higher aggregate factor...
68 #
69 # Westmere      1.78(+13%)
70 # Sandy Bridge  1.80(+8%)
71 # Ivy Bridge    1.80(+7%)
72 # Haswell       0.55(+93%) (if system doesn't support AVX)
73 # Broadwell     0.45(+110%)(if system doesn't support AVX)
74 # Skylake       0.44(+110%)(if system doesn't support AVX)
75 # Bulldozer     1.49(+27%)
76 # Silvermont    2.88(+13%)
77 # Goldmont      1.08(+24%)
78
79 # March 2013
80 #
81 # ... 8x aggregate factor AVX code path is using reduction algorithm
82 # suggested by Shay Gueron[1]. Even though contemporary AVX-capable
83 # CPUs such as Sandy and Ivy Bridge can execute it, the code performs
84 # sub-optimally in comparison to above mentioned version. But thanks
85 # to Ilya Albrekht and Max Locktyukhin of Intel Corp. we knew that
86 # it performs in 0.41 cycles per byte on Haswell processor, in
87 # 0.29 on Broadwell, and in 0.36 on Skylake.
88 #
89 # [1] http://rt.openssl.org/Ticket/Display.html?id=2900&user=guest&pass=guest
90
91 $flavour = shift;
92 $output  = shift;
93 if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
94
95 $win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
96
97 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
98 ( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
99 ( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
100 die "can't locate x86_64-xlate.pl";
101
102 if (`$ENV{CC} -Wa,-v -c -o /dev/null -x assembler /dev/null 2>&1`
103                 =~ /GNU assembler version ([2-9]\.[0-9]+)/) {
104         $avx = ($1>=2.20) + ($1>=2.22);
105 }
106
107 if (!$avx && $win64 && ($flavour =~ /nasm/ || $ENV{ASM} =~ /nasm/) &&
108             `nasm -v 2>&1` =~ /NASM version ([2-9]\.[0-9]+)/) {
109         $avx = ($1>=2.09) + ($1>=2.10);
110 }
111
112 if (!$avx && $win64 && ($flavour =~ /masm/ || $ENV{ASM} =~ /ml64/) &&
113             `ml64 2>&1` =~ /Version ([0-9]+)\./) {
114         $avx = ($1>=10) + ($1>=11);
115 }
116
117 if (!$avx && `$ENV{CC} -v 2>&1` =~ /((?:^clang|LLVM) version|.*based on LLVM) ([3-9]\.[0-9]+)/) {
118         $avx = ($2>=3.0) + ($2>3.0);
119 }
120
121 open OUT,"| \"$^X\" \"$xlate\" $flavour \"$output\"";
122 *STDOUT=*OUT;
123
124 $do4xaggr=1;
125
126 # common register layout
127 $nlo="%rax";
128 $nhi="%rbx";
129 $Zlo="%r8";
130 $Zhi="%r9";
131 $tmp="%r10";
132 $rem_4bit = "%r11";
133
134 $Xi="%rdi";
135 $Htbl="%rsi";
136
137 # per-function register layout
138 $cnt="%rcx";
139 $rem="%rdx";
140
141 sub LB() { my $r=shift; $r =~ s/%[er]([a-d])x/%\1l/     or
142                         $r =~ s/%[er]([sd]i)/%\1l/      or
143                         $r =~ s/%[er](bp)/%\1l/         or
144                         $r =~ s/%(r[0-9]+)[d]?/%\1b/;   $r; }
145
146 sub AUTOLOAD()          # thunk [simplified] 32-bit style perlasm
147 { my $opcode = $AUTOLOAD; $opcode =~ s/.*:://;
148   my $arg = pop;
149     $arg = "\$$arg" if ($arg*1 eq $arg);
150     $code .= "\t$opcode\t".join(',',$arg,reverse @_)."\n";
151 }
152 \f
153 { my $N;
154   sub loop() {
155   my $inp = shift;
156
157         $N++;
158 $code.=<<___;
159         xor     $nlo,$nlo
160         xor     $nhi,$nhi
161         mov     `&LB("$Zlo")`,`&LB("$nlo")`
162         mov     `&LB("$Zlo")`,`&LB("$nhi")`
163         shl     \$4,`&LB("$nlo")`
164         mov     \$14,$cnt
165         mov     8($Htbl,$nlo),$Zlo
166         mov     ($Htbl,$nlo),$Zhi
167         and     \$0xf0,`&LB("$nhi")`
168         mov     $Zlo,$rem
169         jmp     .Loop$N
170
171 .align  16
172 .Loop$N:
173         shr     \$4,$Zlo
174         and     \$0xf,$rem
175         mov     $Zhi,$tmp
176         mov     ($inp,$cnt),`&LB("$nlo")`
177         shr     \$4,$Zhi
178         xor     8($Htbl,$nhi),$Zlo
179         shl     \$60,$tmp
180         xor     ($Htbl,$nhi),$Zhi
181         mov     `&LB("$nlo")`,`&LB("$nhi")`
182         xor     ($rem_4bit,$rem,8),$Zhi
183         mov     $Zlo,$rem
184         shl     \$4,`&LB("$nlo")`
185         xor     $tmp,$Zlo
186         dec     $cnt
187         js      .Lbreak$N
188
189         shr     \$4,$Zlo
190         and     \$0xf,$rem
191         mov     $Zhi,$tmp
192         shr     \$4,$Zhi
193         xor     8($Htbl,$nlo),$Zlo
194         shl     \$60,$tmp
195         xor     ($Htbl,$nlo),$Zhi
196         and     \$0xf0,`&LB("$nhi")`
197         xor     ($rem_4bit,$rem,8),$Zhi
198         mov     $Zlo,$rem
199         xor     $tmp,$Zlo
200         jmp     .Loop$N
201
202 .align  16
203 .Lbreak$N:
204         shr     \$4,$Zlo
205         and     \$0xf,$rem
206         mov     $Zhi,$tmp
207         shr     \$4,$Zhi
208         xor     8($Htbl,$nlo),$Zlo
209         shl     \$60,$tmp
210         xor     ($Htbl,$nlo),$Zhi
211         and     \$0xf0,`&LB("$nhi")`
212         xor     ($rem_4bit,$rem,8),$Zhi
213         mov     $Zlo,$rem
214         xor     $tmp,$Zlo
215
216         shr     \$4,$Zlo
217         and     \$0xf,$rem
218         mov     $Zhi,$tmp
219         shr     \$4,$Zhi
220         xor     8($Htbl,$nhi),$Zlo
221         shl     \$60,$tmp
222         xor     ($Htbl,$nhi),$Zhi
223         xor     $tmp,$Zlo
224         xor     ($rem_4bit,$rem,8),$Zhi
225
226         bswap   $Zlo
227         bswap   $Zhi
228 ___
229 }}
230
231 $code=<<___;
232 .text
233 .extern OPENSSL_ia32cap_P
234
235 .globl  gcm_gmult_4bit
236 .type   gcm_gmult_4bit,\@function,2
237 .align  16
238 gcm_gmult_4bit:
239 .cfi_startproc
240         push    %rbx
241 .cfi_push       %rbx
242         push    %rbp            # %rbp and others are pushed exclusively in
243 .cfi_push       %rbp
244         push    %r12            # order to reuse Win64 exception handler...
245 .cfi_push       %r12
246         push    %r13
247 .cfi_push       %r13
248         push    %r14
249 .cfi_push       %r14
250         push    %r15
251 .cfi_push       %r15
252         sub     \$280,%rsp
253 .cfi_adjust_cfa_offset  280
254 .Lgmult_prologue:
255
256         movzb   15($Xi),$Zlo
257         lea     .Lrem_4bit(%rip),$rem_4bit
258 ___
259         &loop   ($Xi);
260 $code.=<<___;
261         mov     $Zlo,8($Xi)
262         mov     $Zhi,($Xi)
263
264         lea     280+48(%rsp),%rsi
265 .cfi_def_cfa    %rsi,8
266         mov     -8(%rsi),%rbx
267 .cfi_restore    %rbx
268         lea     (%rsi),%rsp
269 .cfi_def_cfa_register   %rsp
270 .Lgmult_epilogue:
271         ret
272 .cfi_endproc
273 .size   gcm_gmult_4bit,.-gcm_gmult_4bit
274 ___
275 \f
276 # per-function register layout
277 $inp="%rdx";
278 $len="%rcx";
279 $rem_8bit=$rem_4bit;
280
281 $code.=<<___;
282 .globl  gcm_ghash_4bit
283 .type   gcm_ghash_4bit,\@function,4
284 .align  16
285 gcm_ghash_4bit:
286 .cfi_startproc
287         push    %rbx
288 .cfi_push       %rbx
289         push    %rbp
290 .cfi_push       %rbp
291         push    %r12
292 .cfi_push       %r12
293         push    %r13
294 .cfi_push       %r13
295         push    %r14
296 .cfi_push       %r14
297         push    %r15
298 .cfi_push       %r15
299         sub     \$280,%rsp
300 .cfi_adjust_cfa_offset  280
301 .Lghash_prologue:
302         mov     $inp,%r14               # reassign couple of args
303         mov     $len,%r15
304 ___
305 { my $inp="%r14";
306   my $dat="%edx";
307   my $len="%r15";
308   my @nhi=("%ebx","%ecx");
309   my @rem=("%r12","%r13");
310   my $Hshr4="%rbp";
311
312         &sub    ($Htbl,-128);           # size optimization
313         &lea    ($Hshr4,"16+128(%rsp)");
314         { my @lo =($nlo,$nhi);
315           my @hi =($Zlo,$Zhi);
316
317           &xor  ($dat,$dat);
318           for ($i=0,$j=-2;$i<18;$i++,$j++) {
319             &mov        ("$j(%rsp)",&LB($dat))          if ($i>1);
320             &or         ($lo[0],$tmp)                   if ($i>1);
321             &mov        (&LB($dat),&LB($lo[1]))         if ($i>0 && $i<17);
322             &shr        ($lo[1],4)                      if ($i>0 && $i<17);
323             &mov        ($tmp,$hi[1])                   if ($i>0 && $i<17);
324             &shr        ($hi[1],4)                      if ($i>0 && $i<17);
325             &mov        ("8*$j($Hshr4)",$hi[0])         if ($i>1);
326             &mov        ($hi[0],"16*$i+0-128($Htbl)")   if ($i<16);
327             &shl        (&LB($dat),4)                   if ($i>0 && $i<17);
328             &mov        ("8*$j-128($Hshr4)",$lo[0])     if ($i>1);
329             &mov        ($lo[0],"16*$i+8-128($Htbl)")   if ($i<16);
330             &shl        ($tmp,60)                       if ($i>0 && $i<17);
331
332             push        (@lo,shift(@lo));
333             push        (@hi,shift(@hi));
334           }
335         }
336         &add    ($Htbl,-128);
337         &mov    ($Zlo,"8($Xi)");
338         &mov    ($Zhi,"0($Xi)");
339         &add    ($len,$inp);            # pointer to the end of data
340         &lea    ($rem_8bit,".Lrem_8bit(%rip)");
341         &jmp    (".Louter_loop");
342
343 $code.=".align  16\n.Louter_loop:\n";
344         &xor    ($Zhi,"($inp)");
345         &mov    ("%rdx","8($inp)");
346         &lea    ($inp,"16($inp)");
347         &xor    ("%rdx",$Zlo);
348         &mov    ("($Xi)",$Zhi);
349         &mov    ("8($Xi)","%rdx");
350         &shr    ("%rdx",32);
351
352         &xor    ($nlo,$nlo);
353         &rol    ($dat,8);
354         &mov    (&LB($nlo),&LB($dat));
355         &movz   ($nhi[0],&LB($dat));
356         &shl    (&LB($nlo),4);
357         &shr    ($nhi[0],4);
358
359         for ($j=11,$i=0;$i<15;$i++) {
360             &rol        ($dat,8);
361             &xor        ($Zlo,"8($Htbl,$nlo)")                  if ($i>0);
362             &xor        ($Zhi,"($Htbl,$nlo)")                   if ($i>0);
363             &mov        ($Zlo,"8($Htbl,$nlo)")                  if ($i==0);
364             &mov        ($Zhi,"($Htbl,$nlo)")                   if ($i==0);
365
366             &mov        (&LB($nlo),&LB($dat));
367             &xor        ($Zlo,$tmp)                             if ($i>0);
368             &movzw      ($rem[1],"($rem_8bit,$rem[1],2)")       if ($i>0);
369
370             &movz       ($nhi[1],&LB($dat));
371             &shl        (&LB($nlo),4);
372             &movzb      ($rem[0],"(%rsp,$nhi[0])");
373
374             &shr        ($nhi[1],4)                             if ($i<14);
375             &and        ($nhi[1],0xf0)                          if ($i==14);
376             &shl        ($rem[1],48)                            if ($i>0);
377             &xor        ($rem[0],$Zlo);
378
379             &mov        ($tmp,$Zhi);
380             &xor        ($Zhi,$rem[1])                          if ($i>0);
381             &shr        ($Zlo,8);
382
383             &movz       ($rem[0],&LB($rem[0]));
384             &mov        ($dat,"$j($Xi)")                        if (--$j%4==0);
385             &shr        ($Zhi,8);
386
387             &xor        ($Zlo,"-128($Hshr4,$nhi[0],8)");
388             &shl        ($tmp,56);
389             &xor        ($Zhi,"($Hshr4,$nhi[0],8)");
390
391             unshift     (@nhi,pop(@nhi));               # "rotate" registers
392             unshift     (@rem,pop(@rem));
393         }
394         &movzw  ($rem[1],"($rem_8bit,$rem[1],2)");
395         &xor    ($Zlo,"8($Htbl,$nlo)");
396         &xor    ($Zhi,"($Htbl,$nlo)");
397
398         &shl    ($rem[1],48);
399         &xor    ($Zlo,$tmp);
400
401         &xor    ($Zhi,$rem[1]);
402         &movz   ($rem[0],&LB($Zlo));
403         &shr    ($Zlo,4);
404
405         &mov    ($tmp,$Zhi);
406         &shl    (&LB($rem[0]),4);
407         &shr    ($Zhi,4);
408
409         &xor    ($Zlo,"8($Htbl,$nhi[0])");
410         &movzw  ($rem[0],"($rem_8bit,$rem[0],2)");
411         &shl    ($tmp,60);
412
413         &xor    ($Zhi,"($Htbl,$nhi[0])");
414         &xor    ($Zlo,$tmp);
415         &shl    ($rem[0],48);
416
417         &bswap  ($Zlo);
418         &xor    ($Zhi,$rem[0]);
419
420         &bswap  ($Zhi);
421         &cmp    ($inp,$len);
422         &jb     (".Louter_loop");
423 }
424 $code.=<<___;
425         mov     $Zlo,8($Xi)
426         mov     $Zhi,($Xi)
427
428         lea     280+48(%rsp),%rsi
429 .cfi_def_cfa    %rsi,8
430         mov     -48(%rsi),%r15
431 .cfi_restore    %r15
432         mov     -40(%rsi),%r14
433 .cfi_restore    %r14
434         mov     -32(%rsi),%r13
435 .cfi_restore    %r13
436         mov     -24(%rsi),%r12
437 .cfi_restore    %r12
438         mov     -16(%rsi),%rbp
439 .cfi_restore    %rbp
440         mov     -8(%rsi),%rbx
441 .cfi_restore    %rbx
442         lea     0(%rsi),%rsp
443 .cfi_def_cfa_register   %rsp
444 .Lghash_epilogue:
445         ret
446 .cfi_endproc
447 .size   gcm_ghash_4bit,.-gcm_ghash_4bit
448 ___
449 \f
450 ######################################################################
451 # PCLMULQDQ version.
452
453 @_4args=$win64? ("%rcx","%rdx","%r8", "%r9") :  # Win64 order
454                 ("%rdi","%rsi","%rdx","%rcx");  # Unix order
455
456 ($Xi,$Xhi)=("%xmm0","%xmm1");   $Hkey="%xmm2";
457 ($T1,$T2,$T3)=("%xmm3","%xmm4","%xmm5");
458
459 sub clmul64x64_T2 {     # minimal register pressure
460 my ($Xhi,$Xi,$Hkey,$HK)=@_;
461
462 if (!defined($HK)) {    $HK = $T2;
463 $code.=<<___;
464         movdqa          $Xi,$Xhi                #
465         pshufd          \$0b01001110,$Xi,$T1
466         pshufd          \$0b01001110,$Hkey,$T2
467         pxor            $Xi,$T1                 #
468         pxor            $Hkey,$T2
469 ___
470 } else {
471 $code.=<<___;
472         movdqa          $Xi,$Xhi                #
473         pshufd          \$0b01001110,$Xi,$T1
474         pxor            $Xi,$T1                 #
475 ___
476 }
477 $code.=<<___;
478         pclmulqdq       \$0x00,$Hkey,$Xi        #######
479         pclmulqdq       \$0x11,$Hkey,$Xhi       #######
480         pclmulqdq       \$0x00,$HK,$T1          #######
481         pxor            $Xi,$T1                 #
482         pxor            $Xhi,$T1                #
483
484         movdqa          $T1,$T2                 #
485         psrldq          \$8,$T1
486         pslldq          \$8,$T2                 #
487         pxor            $T1,$Xhi
488         pxor            $T2,$Xi                 #
489 ___
490 }
491
492 sub reduction_alg9 {    # 17/11 times faster than Intel version
493 my ($Xhi,$Xi) = @_;
494
495 $code.=<<___;
496         # 1st phase
497         movdqa          $Xi,$T2                 #
498         movdqa          $Xi,$T1
499         psllq           \$5,$Xi
500         pxor            $Xi,$T1                 #
501         psllq           \$1,$Xi
502         pxor            $T1,$Xi                 #
503         psllq           \$57,$Xi                #
504         movdqa          $Xi,$T1                 #
505         pslldq          \$8,$Xi
506         psrldq          \$8,$T1                 #
507         pxor            $T2,$Xi
508         pxor            $T1,$Xhi                #
509
510         # 2nd phase
511         movdqa          $Xi,$T2
512         psrlq           \$1,$Xi
513         pxor            $T2,$Xhi                #
514         pxor            $Xi,$T2
515         psrlq           \$5,$Xi
516         pxor            $T2,$Xi                 #
517         psrlq           \$1,$Xi                 #
518         pxor            $Xhi,$Xi                #
519 ___
520 }
521 \f
522 { my ($Htbl,$Xip)=@_4args;
523   my $HK="%xmm6";
524
525 $code.=<<___;
526 .globl  gcm_init_clmul
527 .type   gcm_init_clmul,\@abi-omnipotent
528 .align  16
529 gcm_init_clmul:
530 .L_init_clmul:
531 ___
532 $code.=<<___ if ($win64);
533 .LSEH_begin_gcm_init_clmul:
534         # I can't trust assembler to use specific encoding:-(
535         .byte   0x48,0x83,0xec,0x18             #sub    $0x18,%rsp
536         .byte   0x0f,0x29,0x34,0x24             #movaps %xmm6,(%rsp)
537 ___
538 $code.=<<___;
539         movdqu          ($Xip),$Hkey
540         pshufd          \$0b01001110,$Hkey,$Hkey        # dword swap
541
542         # <<1 twist
543         pshufd          \$0b11111111,$Hkey,$T2  # broadcast uppermost dword
544         movdqa          $Hkey,$T1
545         psllq           \$1,$Hkey
546         pxor            $T3,$T3                 #
547         psrlq           \$63,$T1
548         pcmpgtd         $T2,$T3                 # broadcast carry bit
549         pslldq          \$8,$T1
550         por             $T1,$Hkey               # H<<=1
551
552         # magic reduction
553         pand            .L0x1c2_polynomial(%rip),$T3
554         pxor            $T3,$Hkey               # if(carry) H^=0x1c2_polynomial
555
556         # calculate H^2
557         pshufd          \$0b01001110,$Hkey,$HK
558         movdqa          $Hkey,$Xi
559         pxor            $Hkey,$HK
560 ___
561         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$HK);
562         &reduction_alg9 ($Xhi,$Xi);
563 $code.=<<___;
564         pshufd          \$0b01001110,$Hkey,$T1
565         pshufd          \$0b01001110,$Xi,$T2
566         pxor            $Hkey,$T1               # Karatsuba pre-processing
567         movdqu          $Hkey,0x00($Htbl)       # save H
568         pxor            $Xi,$T2                 # Karatsuba pre-processing
569         movdqu          $Xi,0x10($Htbl)         # save H^2
570         palignr         \$8,$T1,$T2             # low part is H.lo^H.hi...
571         movdqu          $T2,0x20($Htbl)         # save Karatsuba "salt"
572 ___
573 if ($do4xaggr) {
574         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$HK);   # H^3
575         &reduction_alg9 ($Xhi,$Xi);
576 $code.=<<___;
577         movdqa          $Xi,$T3
578 ___
579         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$HK);   # H^4
580         &reduction_alg9 ($Xhi,$Xi);
581 $code.=<<___;
582         pshufd          \$0b01001110,$T3,$T1
583         pshufd          \$0b01001110,$Xi,$T2
584         pxor            $T3,$T1                 # Karatsuba pre-processing
585         movdqu          $T3,0x30($Htbl)         # save H^3
586         pxor            $Xi,$T2                 # Karatsuba pre-processing
587         movdqu          $Xi,0x40($Htbl)         # save H^4
588         palignr         \$8,$T1,$T2             # low part is H^3.lo^H^3.hi...
589         movdqu          $T2,0x50($Htbl)         # save Karatsuba "salt"
590 ___
591 }
592 $code.=<<___ if ($win64);
593         movaps  (%rsp),%xmm6
594         lea     0x18(%rsp),%rsp
595 .LSEH_end_gcm_init_clmul:
596 ___
597 $code.=<<___;
598         ret
599 .size   gcm_init_clmul,.-gcm_init_clmul
600 ___
601 }
602
603 { my ($Xip,$Htbl)=@_4args;
604
605 $code.=<<___;
606 .globl  gcm_gmult_clmul
607 .type   gcm_gmult_clmul,\@abi-omnipotent
608 .align  16
609 gcm_gmult_clmul:
610 .L_gmult_clmul:
611         movdqu          ($Xip),$Xi
612         movdqa          .Lbswap_mask(%rip),$T3
613         movdqu          ($Htbl),$Hkey
614         movdqu          0x20($Htbl),$T2
615         pshufb          $T3,$Xi
616 ___
617         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$T2);
618 $code.=<<___ if (0 || (&reduction_alg9($Xhi,$Xi)&&0));
619         # experimental alternative. special thing about is that there
620         # no dependency between the two multiplications...
621         mov             \$`0xE1<<1`,%eax
622         mov             \$0xA040608020C0E000,%r10       # ((7..0)·0xE0)&0xff
623         mov             \$0x07,%r11d
624         movq            %rax,$T1
625         movq            %r10,$T2
626         movq            %r11,$T3                # borrow $T3
627         pand            $Xi,$T3
628         pshufb          $T3,$T2                 # ($Xi&7)·0xE0
629         movq            %rax,$T3
630         pclmulqdq       \$0x00,$Xi,$T1          # ·(0xE1<<1)
631         pxor            $Xi,$T2
632         pslldq          \$15,$T2
633         paddd           $T2,$T2                 # <<(64+56+1)
634         pxor            $T2,$Xi
635         pclmulqdq       \$0x01,$T3,$Xi
636         movdqa          .Lbswap_mask(%rip),$T3  # reload $T3
637         psrldq          \$1,$T1
638         pxor            $T1,$Xhi
639         pslldq          \$7,$Xi
640         pxor            $Xhi,$Xi
641 ___
642 $code.=<<___;
643         pshufb          $T3,$Xi
644         movdqu          $Xi,($Xip)
645         ret
646 .size   gcm_gmult_clmul,.-gcm_gmult_clmul
647 ___
648 }
649 \f
650 { my ($Xip,$Htbl,$inp,$len)=@_4args;
651   my ($Xln,$Xmn,$Xhn,$Hkey2,$HK) = map("%xmm$_",(3..7));
652   my ($T1,$T2,$T3)=map("%xmm$_",(8..10));
653
654 $code.=<<___;
655 .globl  gcm_ghash_clmul
656 .type   gcm_ghash_clmul,\@abi-omnipotent
657 .align  32
658 gcm_ghash_clmul:
659 .L_ghash_clmul:
660 ___
661 $code.=<<___ if ($win64);
662         lea     -0x88(%rsp),%rax
663 .LSEH_begin_gcm_ghash_clmul:
664         # I can't trust assembler to use specific encoding:-(
665         .byte   0x48,0x8d,0x60,0xe0             #lea    -0x20(%rax),%rsp
666         .byte   0x0f,0x29,0x70,0xe0             #movaps %xmm6,-0x20(%rax)
667         .byte   0x0f,0x29,0x78,0xf0             #movaps %xmm7,-0x10(%rax)
668         .byte   0x44,0x0f,0x29,0x00             #movaps %xmm8,0(%rax)
669         .byte   0x44,0x0f,0x29,0x48,0x10        #movaps %xmm9,0x10(%rax)
670         .byte   0x44,0x0f,0x29,0x50,0x20        #movaps %xmm10,0x20(%rax)
671         .byte   0x44,0x0f,0x29,0x58,0x30        #movaps %xmm11,0x30(%rax)
672         .byte   0x44,0x0f,0x29,0x60,0x40        #movaps %xmm12,0x40(%rax)
673         .byte   0x44,0x0f,0x29,0x68,0x50        #movaps %xmm13,0x50(%rax)
674         .byte   0x44,0x0f,0x29,0x70,0x60        #movaps %xmm14,0x60(%rax)
675         .byte   0x44,0x0f,0x29,0x78,0x70        #movaps %xmm15,0x70(%rax)
676 ___
677 $code.=<<___;
678         movdqa          .Lbswap_mask(%rip),$T3
679
680         movdqu          ($Xip),$Xi
681         movdqu          ($Htbl),$Hkey
682         movdqu          0x20($Htbl),$HK
683         pshufb          $T3,$Xi
684
685         sub             \$0x10,$len
686         jz              .Lodd_tail
687
688         movdqu          0x10($Htbl),$Hkey2
689 ___
690 if ($do4xaggr) {
691 my ($Xl,$Xm,$Xh,$Hkey3,$Hkey4)=map("%xmm$_",(11..15));
692
693 $code.=<<___;
694         mov             OPENSSL_ia32cap_P+4(%rip),%eax
695         cmp             \$0x30,$len
696         jb              .Lskip4x
697
698         and             \$`1<<26|1<<22`,%eax    # isolate MOVBE+XSAVE
699         cmp             \$`1<<22`,%eax          # check for MOVBE without XSAVE
700         je              .Lskip4x
701
702         sub             \$0x30,$len
703         mov             \$0xA040608020C0E000,%rax       # ((7..0)·0xE0)&0xff
704         movdqu          0x30($Htbl),$Hkey3
705         movdqu          0x40($Htbl),$Hkey4
706
707         #######
708         # Xi+4 =[(H*Ii+3) + (H^2*Ii+2) + (H^3*Ii+1) + H^4*(Ii+Xi)] mod P
709         #
710         movdqu          0x30($inp),$Xln
711          movdqu         0x20($inp),$Xl
712         pshufb          $T3,$Xln
713          pshufb         $T3,$Xl
714         movdqa          $Xln,$Xhn
715         pshufd          \$0b01001110,$Xln,$Xmn
716         pxor            $Xln,$Xmn
717         pclmulqdq       \$0x00,$Hkey,$Xln
718         pclmulqdq       \$0x11,$Hkey,$Xhn
719         pclmulqdq       \$0x00,$HK,$Xmn
720
721         movdqa          $Xl,$Xh
722         pshufd          \$0b01001110,$Xl,$Xm
723         pxor            $Xl,$Xm
724         pclmulqdq       \$0x00,$Hkey2,$Xl
725         pclmulqdq       \$0x11,$Hkey2,$Xh
726         pclmulqdq       \$0x10,$HK,$Xm
727         xorps           $Xl,$Xln
728         xorps           $Xh,$Xhn
729         movups          0x50($Htbl),$HK
730         xorps           $Xm,$Xmn
731
732         movdqu          0x10($inp),$Xl
733          movdqu         0($inp),$T1
734         pshufb          $T3,$Xl
735          pshufb         $T3,$T1
736         movdqa          $Xl,$Xh
737         pshufd          \$0b01001110,$Xl,$Xm
738          pxor           $T1,$Xi
739         pxor            $Xl,$Xm
740         pclmulqdq       \$0x00,$Hkey3,$Xl
741          movdqa         $Xi,$Xhi
742          pshufd         \$0b01001110,$Xi,$T1
743          pxor           $Xi,$T1
744         pclmulqdq       \$0x11,$Hkey3,$Xh
745         pclmulqdq       \$0x00,$HK,$Xm
746         xorps           $Xl,$Xln
747         xorps           $Xh,$Xhn
748
749         lea     0x40($inp),$inp
750         sub     \$0x40,$len
751         jc      .Ltail4x
752
753         jmp     .Lmod4_loop
754 .align  32
755 .Lmod4_loop:
756         pclmulqdq       \$0x00,$Hkey4,$Xi
757         xorps           $Xm,$Xmn
758          movdqu         0x30($inp),$Xl
759          pshufb         $T3,$Xl
760         pclmulqdq       \$0x11,$Hkey4,$Xhi
761         xorps           $Xln,$Xi
762          movdqu         0x20($inp),$Xln
763          movdqa         $Xl,$Xh
764         pclmulqdq       \$0x10,$HK,$T1
765          pshufd         \$0b01001110,$Xl,$Xm
766         xorps           $Xhn,$Xhi
767          pxor           $Xl,$Xm
768          pshufb         $T3,$Xln
769         movups          0x20($Htbl),$HK
770         xorps           $Xmn,$T1
771          pclmulqdq      \$0x00,$Hkey,$Xl
772          pshufd         \$0b01001110,$Xln,$Xmn
773
774         pxor            $Xi,$T1                 # aggregated Karatsuba post-processing
775          movdqa         $Xln,$Xhn
776         pxor            $Xhi,$T1                #
777          pxor           $Xln,$Xmn
778         movdqa          $T1,$T2                 #
779          pclmulqdq      \$0x11,$Hkey,$Xh
780         pslldq          \$8,$T1
781         psrldq          \$8,$T2                 #
782         pxor            $T1,$Xi
783         movdqa          .L7_mask(%rip),$T1
784         pxor            $T2,$Xhi                #
785         movq            %rax,$T2
786
787         pand            $Xi,$T1                 # 1st phase
788         pshufb          $T1,$T2                 #
789         pxor            $Xi,$T2                 #
790          pclmulqdq      \$0x00,$HK,$Xm
791         psllq           \$57,$T2                #
792         movdqa          $T2,$T1                 #
793         pslldq          \$8,$T2
794          pclmulqdq      \$0x00,$Hkey2,$Xln
795         psrldq          \$8,$T1                 #
796         pxor            $T2,$Xi
797         pxor            $T1,$Xhi                #
798         movdqu          0($inp),$T1
799
800         movdqa          $Xi,$T2                 # 2nd phase
801         psrlq           \$1,$Xi
802          pclmulqdq      \$0x11,$Hkey2,$Xhn
803          xorps          $Xl,$Xln
804          movdqu         0x10($inp),$Xl
805          pshufb         $T3,$Xl
806          pclmulqdq      \$0x10,$HK,$Xmn
807          xorps          $Xh,$Xhn
808          movups         0x50($Htbl),$HK
809         pshufb          $T3,$T1
810         pxor            $T2,$Xhi                #
811         pxor            $Xi,$T2
812         psrlq           \$5,$Xi
813
814          movdqa         $Xl,$Xh
815          pxor           $Xm,$Xmn
816          pshufd         \$0b01001110,$Xl,$Xm
817         pxor            $T2,$Xi                 #
818         pxor            $T1,$Xhi
819          pxor           $Xl,$Xm
820          pclmulqdq      \$0x00,$Hkey3,$Xl
821         psrlq           \$1,$Xi                 #
822         pxor            $Xhi,$Xi                #
823         movdqa          $Xi,$Xhi
824          pclmulqdq      \$0x11,$Hkey3,$Xh
825          xorps          $Xl,$Xln
826         pshufd          \$0b01001110,$Xi,$T1
827         pxor            $Xi,$T1
828
829          pclmulqdq      \$0x00,$HK,$Xm
830          xorps          $Xh,$Xhn
831
832         lea     0x40($inp),$inp
833         sub     \$0x40,$len
834         jnc     .Lmod4_loop
835
836 .Ltail4x:
837         pclmulqdq       \$0x00,$Hkey4,$Xi
838         pclmulqdq       \$0x11,$Hkey4,$Xhi
839         pclmulqdq       \$0x10,$HK,$T1
840         xorps           $Xm,$Xmn
841         xorps           $Xln,$Xi
842         xorps           $Xhn,$Xhi
843         pxor            $Xi,$Xhi                # aggregated Karatsuba post-processing
844         pxor            $Xmn,$T1
845
846         pxor            $Xhi,$T1                #
847         pxor            $Xi,$Xhi
848
849         movdqa          $T1,$T2                 #
850         psrldq          \$8,$T1
851         pslldq          \$8,$T2                 #
852         pxor            $T1,$Xhi
853         pxor            $T2,$Xi                 #
854 ___
855         &reduction_alg9($Xhi,$Xi);
856 $code.=<<___;
857         add     \$0x40,$len
858         jz      .Ldone
859         movdqu  0x20($Htbl),$HK
860         sub     \$0x10,$len
861         jz      .Lodd_tail
862 .Lskip4x:
863 ___
864 }
865 $code.=<<___;
866         #######
867         # Xi+2 =[H*(Ii+1 + Xi+1)] mod P =
868         #       [(H*Ii+1) + (H*Xi+1)] mod P =
869         #       [(H*Ii+1) + H^2*(Ii+Xi)] mod P
870         #
871         movdqu          ($inp),$T1              # Ii
872         movdqu          16($inp),$Xln           # Ii+1
873         pshufb          $T3,$T1
874         pshufb          $T3,$Xln
875         pxor            $T1,$Xi                 # Ii+Xi
876
877         movdqa          $Xln,$Xhn
878         pshufd          \$0b01001110,$Xln,$Xmn
879         pxor            $Xln,$Xmn
880         pclmulqdq       \$0x00,$Hkey,$Xln
881         pclmulqdq       \$0x11,$Hkey,$Xhn
882         pclmulqdq       \$0x00,$HK,$Xmn
883
884         lea             32($inp),$inp           # i+=2
885         nop
886         sub             \$0x20,$len
887         jbe             .Leven_tail
888         nop
889         jmp             .Lmod_loop
890
891 .align  32
892 .Lmod_loop:
893         movdqa          $Xi,$Xhi
894         movdqa          $Xmn,$T1
895         pshufd          \$0b01001110,$Xi,$Xmn   #
896         pxor            $Xi,$Xmn                #
897
898         pclmulqdq       \$0x00,$Hkey2,$Xi
899         pclmulqdq       \$0x11,$Hkey2,$Xhi
900         pclmulqdq       \$0x10,$HK,$Xmn
901
902         pxor            $Xln,$Xi                # (H*Ii+1) + H^2*(Ii+Xi)
903         pxor            $Xhn,$Xhi
904           movdqu        ($inp),$T2              # Ii
905         pxor            $Xi,$T1                 # aggregated Karatsuba post-processing
906           pshufb        $T3,$T2
907           movdqu        16($inp),$Xln           # Ii+1
908
909         pxor            $Xhi,$T1
910           pxor          $T2,$Xhi                # "Ii+Xi", consume early
911         pxor            $T1,$Xmn
912          pshufb         $T3,$Xln
913         movdqa          $Xmn,$T1                #
914         psrldq          \$8,$T1
915         pslldq          \$8,$Xmn                #
916         pxor            $T1,$Xhi
917         pxor            $Xmn,$Xi                #
918
919         movdqa          $Xln,$Xhn               #
920
921           movdqa        $Xi,$T2                 # 1st phase
922           movdqa        $Xi,$T1
923           psllq         \$5,$Xi
924           pxor          $Xi,$T1                 #
925         pclmulqdq       \$0x00,$Hkey,$Xln       #######
926           psllq         \$1,$Xi
927           pxor          $T1,$Xi                 #
928           psllq         \$57,$Xi                #
929           movdqa        $Xi,$T1                 #
930           pslldq        \$8,$Xi
931           psrldq        \$8,$T1                 #
932           pxor          $T2,$Xi
933         pshufd          \$0b01001110,$Xhn,$Xmn
934           pxor          $T1,$Xhi                #
935         pxor            $Xhn,$Xmn               #
936
937           movdqa        $Xi,$T2                 # 2nd phase
938           psrlq         \$1,$Xi
939         pclmulqdq       \$0x11,$Hkey,$Xhn       #######
940           pxor          $T2,$Xhi                #
941           pxor          $Xi,$T2
942           psrlq         \$5,$Xi
943           pxor          $T2,$Xi                 #
944         lea             32($inp),$inp
945           psrlq         \$1,$Xi                 #
946         pclmulqdq       \$0x00,$HK,$Xmn         #######
947           pxor          $Xhi,$Xi                #
948
949         sub             \$0x20,$len
950         ja              .Lmod_loop
951
952 .Leven_tail:
953          movdqa         $Xi,$Xhi
954          movdqa         $Xmn,$T1
955          pshufd         \$0b01001110,$Xi,$Xmn   #
956          pxor           $Xi,$Xmn                #
957
958         pclmulqdq       \$0x00,$Hkey2,$Xi
959         pclmulqdq       \$0x11,$Hkey2,$Xhi
960         pclmulqdq       \$0x10,$HK,$Xmn
961
962         pxor            $Xln,$Xi                # (H*Ii+1) + H^2*(Ii+Xi)
963         pxor            $Xhn,$Xhi
964         pxor            $Xi,$T1
965         pxor            $Xhi,$T1
966         pxor            $T1,$Xmn
967         movdqa          $Xmn,$T1                #
968         psrldq          \$8,$T1
969         pslldq          \$8,$Xmn                #
970         pxor            $T1,$Xhi
971         pxor            $Xmn,$Xi                #
972 ___
973         &reduction_alg9 ($Xhi,$Xi);
974 $code.=<<___;
975         test            $len,$len
976         jnz             .Ldone
977
978 .Lodd_tail:
979         movdqu          ($inp),$T1              # Ii
980         pshufb          $T3,$T1
981         pxor            $T1,$Xi                 # Ii+Xi
982 ___
983         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$HK);   # H*(Ii+Xi)
984         &reduction_alg9 ($Xhi,$Xi);
985 $code.=<<___;
986 .Ldone:
987         pshufb          $T3,$Xi
988         movdqu          $Xi,($Xip)
989 ___
990 $code.=<<___ if ($win64);
991         movaps  (%rsp),%xmm6
992         movaps  0x10(%rsp),%xmm7
993         movaps  0x20(%rsp),%xmm8
994         movaps  0x30(%rsp),%xmm9
995         movaps  0x40(%rsp),%xmm10
996         movaps  0x50(%rsp),%xmm11
997         movaps  0x60(%rsp),%xmm12
998         movaps  0x70(%rsp),%xmm13
999         movaps  0x80(%rsp),%xmm14
1000         movaps  0x90(%rsp),%xmm15
1001         lea     0xa8(%rsp),%rsp
1002 .LSEH_end_gcm_ghash_clmul:
1003 ___
1004 $code.=<<___;
1005         ret
1006 .size   gcm_ghash_clmul,.-gcm_ghash_clmul
1007 ___
1008 }
1009 \f
1010 $code.=<<___;
1011 .globl  gcm_init_avx
1012 .type   gcm_init_avx,\@abi-omnipotent
1013 .align  32
1014 gcm_init_avx:
1015 ___
1016 if ($avx) {
1017 my ($Htbl,$Xip)=@_4args;
1018 my $HK="%xmm6";
1019
1020 $code.=<<___ if ($win64);
1021 .LSEH_begin_gcm_init_avx:
1022         # I can't trust assembler to use specific encoding:-(
1023         .byte   0x48,0x83,0xec,0x18             #sub    $0x18,%rsp
1024         .byte   0x0f,0x29,0x34,0x24             #movaps %xmm6,(%rsp)
1025 ___
1026 $code.=<<___;
1027         vzeroupper
1028
1029         vmovdqu         ($Xip),$Hkey
1030         vpshufd         \$0b01001110,$Hkey,$Hkey        # dword swap
1031
1032         # <<1 twist
1033         vpshufd         \$0b11111111,$Hkey,$T2  # broadcast uppermost dword
1034         vpsrlq          \$63,$Hkey,$T1
1035         vpsllq          \$1,$Hkey,$Hkey
1036         vpxor           $T3,$T3,$T3             #
1037         vpcmpgtd        $T2,$T3,$T3             # broadcast carry bit
1038         vpslldq         \$8,$T1,$T1
1039         vpor            $T1,$Hkey,$Hkey         # H<<=1
1040
1041         # magic reduction
1042         vpand           .L0x1c2_polynomial(%rip),$T3,$T3
1043         vpxor           $T3,$Hkey,$Hkey         # if(carry) H^=0x1c2_polynomial
1044
1045         vpunpckhqdq     $Hkey,$Hkey,$HK
1046         vmovdqa         $Hkey,$Xi
1047         vpxor           $Hkey,$HK,$HK
1048         mov             \$4,%r10                # up to H^8
1049         jmp             .Linit_start_avx
1050 ___
1051
1052 sub clmul64x64_avx {
1053 my ($Xhi,$Xi,$Hkey,$HK)=@_;
1054
1055 if (!defined($HK)) {    $HK = $T2;
1056 $code.=<<___;
1057         vpunpckhqdq     $Xi,$Xi,$T1
1058         vpunpckhqdq     $Hkey,$Hkey,$T2
1059         vpxor           $Xi,$T1,$T1             #
1060         vpxor           $Hkey,$T2,$T2
1061 ___
1062 } else {
1063 $code.=<<___;
1064         vpunpckhqdq     $Xi,$Xi,$T1
1065         vpxor           $Xi,$T1,$T1             #
1066 ___
1067 }
1068 $code.=<<___;
1069         vpclmulqdq      \$0x11,$Hkey,$Xi,$Xhi   #######
1070         vpclmulqdq      \$0x00,$Hkey,$Xi,$Xi    #######
1071         vpclmulqdq      \$0x00,$HK,$T1,$T1      #######
1072         vpxor           $Xi,$Xhi,$T2            #
1073         vpxor           $T2,$T1,$T1             #
1074
1075         vpslldq         \$8,$T1,$T2             #
1076         vpsrldq         \$8,$T1,$T1
1077         vpxor           $T2,$Xi,$Xi             #
1078         vpxor           $T1,$Xhi,$Xhi
1079 ___
1080 }
1081
1082 sub reduction_avx {
1083 my ($Xhi,$Xi) = @_;
1084
1085 $code.=<<___;
1086         vpsllq          \$57,$Xi,$T1            # 1st phase
1087         vpsllq          \$62,$Xi,$T2
1088         vpxor           $T1,$T2,$T2             #
1089         vpsllq          \$63,$Xi,$T1
1090         vpxor           $T1,$T2,$T2             #
1091         vpslldq         \$8,$T2,$T1             #
1092         vpsrldq         \$8,$T2,$T2
1093         vpxor           $T1,$Xi,$Xi             #
1094         vpxor           $T2,$Xhi,$Xhi
1095
1096         vpsrlq          \$1,$Xi,$T2             # 2nd phase
1097         vpxor           $Xi,$Xhi,$Xhi
1098         vpxor           $T2,$Xi,$Xi             #
1099         vpsrlq          \$5,$T2,$T2
1100         vpxor           $T2,$Xi,$Xi             #
1101         vpsrlq          \$1,$Xi,$Xi             #
1102         vpxor           $Xhi,$Xi,$Xi            #
1103 ___
1104 }
1105
1106 $code.=<<___;
1107 .align  32
1108 .Linit_loop_avx:
1109         vpalignr        \$8,$T1,$T2,$T3         # low part is H.lo^H.hi...
1110         vmovdqu         $T3,-0x10($Htbl)        # save Karatsuba "salt"
1111 ___
1112         &clmul64x64_avx ($Xhi,$Xi,$Hkey,$HK);   # calculate H^3,5,7
1113         &reduction_avx  ($Xhi,$Xi);
1114 $code.=<<___;
1115 .Linit_start_avx:
1116         vmovdqa         $Xi,$T3
1117 ___
1118         &clmul64x64_avx ($Xhi,$Xi,$Hkey,$HK);   # calculate H^2,4,6,8
1119         &reduction_avx  ($Xhi,$Xi);
1120 $code.=<<___;
1121         vpshufd         \$0b01001110,$T3,$T1
1122         vpshufd         \$0b01001110,$Xi,$T2
1123         vpxor           $T3,$T1,$T1             # Karatsuba pre-processing
1124         vmovdqu         $T3,0x00($Htbl)         # save H^1,3,5,7
1125         vpxor           $Xi,$T2,$T2             # Karatsuba pre-processing
1126         vmovdqu         $Xi,0x10($Htbl)         # save H^2,4,6,8
1127         lea             0x30($Htbl),$Htbl
1128         sub             \$1,%r10
1129         jnz             .Linit_loop_avx
1130
1131         vpalignr        \$8,$T2,$T1,$T3         # last "salt" is flipped
1132         vmovdqu         $T3,-0x10($Htbl)
1133
1134         vzeroupper
1135 ___
1136 $code.=<<___ if ($win64);
1137         movaps  (%rsp),%xmm6
1138         lea     0x18(%rsp),%rsp
1139 .LSEH_end_gcm_init_avx:
1140 ___
1141 $code.=<<___;
1142         ret
1143 .size   gcm_init_avx,.-gcm_init_avx
1144 ___
1145 } else {
1146 $code.=<<___;
1147         jmp     .L_init_clmul
1148 .size   gcm_init_avx,.-gcm_init_avx
1149 ___
1150 }
1151
1152 $code.=<<___;
1153 .globl  gcm_gmult_avx
1154 .type   gcm_gmult_avx,\@abi-omnipotent
1155 .align  32
1156 gcm_gmult_avx:
1157         jmp     .L_gmult_clmul
1158 .size   gcm_gmult_avx,.-gcm_gmult_avx
1159 ___
1160 \f
1161 $code.=<<___;
1162 .globl  gcm_ghash_avx
1163 .type   gcm_ghash_avx,\@abi-omnipotent
1164 .align  32
1165 gcm_ghash_avx:
1166 ___
1167 if ($avx) {
1168 my ($Xip,$Htbl,$inp,$len)=@_4args;
1169 my ($Xlo,$Xhi,$Xmi,
1170     $Zlo,$Zhi,$Zmi,
1171     $Hkey,$HK,$T1,$T2,
1172     $Xi,$Xo,$Tred,$bswap,$Ii,$Ij) = map("%xmm$_",(0..15));
1173
1174 $code.=<<___ if ($win64);
1175         lea     -0x88(%rsp),%rax
1176 .LSEH_begin_gcm_ghash_avx:
1177         # I can't trust assembler to use specific encoding:-(
1178         .byte   0x48,0x8d,0x60,0xe0             #lea    -0x20(%rax),%rsp
1179         .byte   0x0f,0x29,0x70,0xe0             #movaps %xmm6,-0x20(%rax)
1180         .byte   0x0f,0x29,0x78,0xf0             #movaps %xmm7,-0x10(%rax)
1181         .byte   0x44,0x0f,0x29,0x00             #movaps %xmm8,0(%rax)
1182         .byte   0x44,0x0f,0x29,0x48,0x10        #movaps %xmm9,0x10(%rax)
1183         .byte   0x44,0x0f,0x29,0x50,0x20        #movaps %xmm10,0x20(%rax)
1184         .byte   0x44,0x0f,0x29,0x58,0x30        #movaps %xmm11,0x30(%rax)
1185         .byte   0x44,0x0f,0x29,0x60,0x40        #movaps %xmm12,0x40(%rax)
1186         .byte   0x44,0x0f,0x29,0x68,0x50        #movaps %xmm13,0x50(%rax)
1187         .byte   0x44,0x0f,0x29,0x70,0x60        #movaps %xmm14,0x60(%rax)
1188         .byte   0x44,0x0f,0x29,0x78,0x70        #movaps %xmm15,0x70(%rax)
1189 ___
1190 $code.=<<___;
1191         vzeroupper
1192
1193         vmovdqu         ($Xip),$Xi              # load $Xi
1194         lea             .L0x1c2_polynomial(%rip),%r10
1195         lea             0x40($Htbl),$Htbl       # size optimization
1196         vmovdqu         .Lbswap_mask(%rip),$bswap
1197         vpshufb         $bswap,$Xi,$Xi
1198         cmp             \$0x80,$len
1199         jb              .Lshort_avx
1200         sub             \$0x80,$len
1201
1202         vmovdqu         0x70($inp),$Ii          # I[7]
1203         vmovdqu         0x00-0x40($Htbl),$Hkey  # $Hkey^1
1204         vpshufb         $bswap,$Ii,$Ii
1205         vmovdqu         0x20-0x40($Htbl),$HK
1206
1207         vpunpckhqdq     $Ii,$Ii,$T2
1208          vmovdqu        0x60($inp),$Ij          # I[6]
1209         vpclmulqdq      \$0x00,$Hkey,$Ii,$Xlo
1210         vpxor           $Ii,$T2,$T2
1211          vpshufb        $bswap,$Ij,$Ij
1212         vpclmulqdq      \$0x11,$Hkey,$Ii,$Xhi
1213          vmovdqu        0x10-0x40($Htbl),$Hkey  # $Hkey^2
1214          vpunpckhqdq    $Ij,$Ij,$T1
1215          vmovdqu        0x50($inp),$Ii          # I[5]
1216         vpclmulqdq      \$0x00,$HK,$T2,$Xmi
1217          vpxor          $Ij,$T1,$T1
1218
1219          vpshufb        $bswap,$Ii,$Ii
1220         vpclmulqdq      \$0x00,$Hkey,$Ij,$Zlo
1221          vpunpckhqdq    $Ii,$Ii,$T2
1222         vpclmulqdq      \$0x11,$Hkey,$Ij,$Zhi
1223          vmovdqu        0x30-0x40($Htbl),$Hkey  # $Hkey^3
1224          vpxor          $Ii,$T2,$T2
1225          vmovdqu        0x40($inp),$Ij          # I[4]
1226         vpclmulqdq      \$0x10,$HK,$T1,$Zmi
1227          vmovdqu        0x50-0x40($Htbl),$HK
1228
1229          vpshufb        $bswap,$Ij,$Ij
1230         vpxor           $Xlo,$Zlo,$Zlo
1231         vpclmulqdq      \$0x00,$Hkey,$Ii,$Xlo
1232         vpxor           $Xhi,$Zhi,$Zhi
1233          vpunpckhqdq    $Ij,$Ij,$T1
1234         vpclmulqdq      \$0x11,$Hkey,$Ii,$Xhi
1235          vmovdqu        0x40-0x40($Htbl),$Hkey  # $Hkey^4
1236         vpxor           $Xmi,$Zmi,$Zmi
1237         vpclmulqdq      \$0x00,$HK,$T2,$Xmi
1238          vpxor          $Ij,$T1,$T1
1239
1240          vmovdqu        0x30($inp),$Ii          # I[3]
1241         vpxor           $Zlo,$Xlo,$Xlo
1242         vpclmulqdq      \$0x00,$Hkey,$Ij,$Zlo
1243         vpxor           $Zhi,$Xhi,$Xhi
1244          vpshufb        $bswap,$Ii,$Ii
1245         vpclmulqdq      \$0x11,$Hkey,$Ij,$Zhi
1246          vmovdqu        0x60-0x40($Htbl),$Hkey  # $Hkey^5
1247         vpxor           $Zmi,$Xmi,$Xmi
1248          vpunpckhqdq    $Ii,$Ii,$T2
1249         vpclmulqdq      \$0x10,$HK,$T1,$Zmi
1250          vmovdqu        0x80-0x40($Htbl),$HK
1251          vpxor          $Ii,$T2,$T2
1252
1253          vmovdqu        0x20($inp),$Ij          # I[2]
1254         vpxor           $Xlo,$Zlo,$Zlo
1255         vpclmulqdq      \$0x00,$Hkey,$Ii,$Xlo
1256         vpxor           $Xhi,$Zhi,$Zhi
1257          vpshufb        $bswap,$Ij,$Ij
1258         vpclmulqdq      \$0x11,$Hkey,$Ii,$Xhi
1259          vmovdqu        0x70-0x40($Htbl),$Hkey  # $Hkey^6
1260         vpxor           $Xmi,$Zmi,$Zmi
1261          vpunpckhqdq    $Ij,$Ij,$T1
1262         vpclmulqdq      \$0x00,$HK,$T2,$Xmi
1263          vpxor          $Ij,$T1,$T1
1264
1265          vmovdqu        0x10($inp),$Ii          # I[1]
1266         vpxor           $Zlo,$Xlo,$Xlo
1267         vpclmulqdq      \$0x00,$Hkey,$Ij,$Zlo
1268         vpxor           $Zhi,$Xhi,$Xhi
1269          vpshufb        $bswap,$Ii,$Ii
1270         vpclmulqdq      \$0x11,$Hkey,$Ij,$Zhi
1271          vmovdqu        0x90-0x40($Htbl),$Hkey  # $Hkey^7
1272         vpxor           $Zmi,$Xmi,$Xmi
1273          vpunpckhqdq    $Ii,$Ii,$T2
1274         vpclmulqdq      \$0x10,$HK,$T1,$Zmi
1275          vmovdqu        0xb0-0x40($Htbl),$HK
1276          vpxor          $Ii,$T2,$T2
1277
1278          vmovdqu        ($inp),$Ij              # I[0]
1279         vpxor           $Xlo,$Zlo,$Zlo
1280         vpclmulqdq      \$0x00,$Hkey,$Ii,$Xlo
1281         vpxor           $Xhi,$Zhi,$Zhi
1282          vpshufb        $bswap,$Ij,$Ij
1283         vpclmulqdq      \$0x11,$Hkey,$Ii,$Xhi
1284          vmovdqu        0xa0-0x40($Htbl),$Hkey  # $Hkey^8
1285         vpxor           $Xmi,$Zmi,$Zmi
1286         vpclmulqdq      \$0x10,$HK,$T2,$Xmi
1287
1288         lea             0x80($inp),$inp
1289         cmp             \$0x80,$len
1290         jb              .Ltail_avx
1291
1292         vpxor           $Xi,$Ij,$Ij             # accumulate $Xi
1293         sub             \$0x80,$len
1294         jmp             .Loop8x_avx
1295
1296 .align  32
1297 .Loop8x_avx:
1298         vpunpckhqdq     $Ij,$Ij,$T1
1299          vmovdqu        0x70($inp),$Ii          # I[7]
1300         vpxor           $Xlo,$Zlo,$Zlo
1301         vpxor           $Ij,$T1,$T1
1302         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xi
1303          vpshufb        $bswap,$Ii,$Ii
1304         vpxor           $Xhi,$Zhi,$Zhi
1305         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xo
1306          vmovdqu        0x00-0x40($Htbl),$Hkey  # $Hkey^1
1307          vpunpckhqdq    $Ii,$Ii,$T2
1308         vpxor           $Xmi,$Zmi,$Zmi
1309         vpclmulqdq      \$0x00,$HK,$T1,$Tred
1310          vmovdqu        0x20-0x40($Htbl),$HK
1311          vpxor          $Ii,$T2,$T2
1312
1313           vmovdqu       0x60($inp),$Ij          # I[6]
1314          vpclmulqdq     \$0x00,$Hkey,$Ii,$Xlo
1315         vpxor           $Zlo,$Xi,$Xi            # collect result
1316           vpshufb       $bswap,$Ij,$Ij
1317          vpclmulqdq     \$0x11,$Hkey,$Ii,$Xhi
1318         vxorps          $Zhi,$Xo,$Xo
1319           vmovdqu       0x10-0x40($Htbl),$Hkey  # $Hkey^2
1320          vpunpckhqdq    $Ij,$Ij,$T1
1321          vpclmulqdq     \$0x00,$HK,  $T2,$Xmi
1322         vpxor           $Zmi,$Tred,$Tred
1323          vxorps         $Ij,$T1,$T1
1324
1325           vmovdqu       0x50($inp),$Ii          # I[5]
1326         vpxor           $Xi,$Tred,$Tred         # aggregated Karatsuba post-processing
1327          vpclmulqdq     \$0x00,$Hkey,$Ij,$Zlo
1328         vpxor           $Xo,$Tred,$Tred
1329         vpslldq         \$8,$Tred,$T2
1330          vpxor          $Xlo,$Zlo,$Zlo
1331          vpclmulqdq     \$0x11,$Hkey,$Ij,$Zhi
1332         vpsrldq         \$8,$Tred,$Tred
1333         vpxor           $T2, $Xi, $Xi
1334           vmovdqu       0x30-0x40($Htbl),$Hkey  # $Hkey^3
1335           vpshufb       $bswap,$Ii,$Ii
1336         vxorps          $Tred,$Xo, $Xo
1337          vpxor          $Xhi,$Zhi,$Zhi
1338          vpunpckhqdq    $Ii,$Ii,$T2
1339          vpclmulqdq     \$0x10,$HK,  $T1,$Zmi
1340           vmovdqu       0x50-0x40($Htbl),$HK
1341          vpxor          $Ii,$T2,$T2
1342          vpxor          $Xmi,$Zmi,$Zmi
1343
1344           vmovdqu       0x40($inp),$Ij          # I[4]
1345         vpalignr        \$8,$Xi,$Xi,$Tred       # 1st phase
1346          vpclmulqdq     \$0x00,$Hkey,$Ii,$Xlo
1347           vpshufb       $bswap,$Ij,$Ij
1348          vpxor          $Zlo,$Xlo,$Xlo
1349          vpclmulqdq     \$0x11,$Hkey,$Ii,$Xhi
1350           vmovdqu       0x40-0x40($Htbl),$Hkey  # $Hkey^4
1351          vpunpckhqdq    $Ij,$Ij,$T1
1352          vpxor          $Zhi,$Xhi,$Xhi
1353          vpclmulqdq     \$0x00,$HK,  $T2,$Xmi
1354          vxorps         $Ij,$T1,$T1
1355          vpxor          $Zmi,$Xmi,$Xmi
1356
1357           vmovdqu       0x30($inp),$Ii          # I[3]
1358         vpclmulqdq      \$0x10,(%r10),$Xi,$Xi
1359          vpclmulqdq     \$0x00,$Hkey,$Ij,$Zlo
1360           vpshufb       $bswap,$Ii,$Ii
1361          vpxor          $Xlo,$Zlo,$Zlo
1362          vpclmulqdq     \$0x11,$Hkey,$Ij,$Zhi
1363           vmovdqu       0x60-0x40($Htbl),$Hkey  # $Hkey^5
1364          vpunpckhqdq    $Ii,$Ii,$T2
1365          vpxor          $Xhi,$Zhi,$Zhi
1366          vpclmulqdq     \$0x10,$HK,  $T1,$Zmi
1367           vmovdqu       0x80-0x40($Htbl),$HK
1368          vpxor          $Ii,$T2,$T2
1369          vpxor          $Xmi,$Zmi,$Zmi
1370
1371           vmovdqu       0x20($inp),$Ij          # I[2]
1372          vpclmulqdq     \$0x00,$Hkey,$Ii,$Xlo
1373           vpshufb       $bswap,$Ij,$Ij
1374          vpxor          $Zlo,$Xlo,$Xlo
1375          vpclmulqdq     \$0x11,$Hkey,$Ii,$Xhi
1376           vmovdqu       0x70-0x40($Htbl),$Hkey  # $Hkey^6
1377          vpunpckhqdq    $Ij,$Ij,$T1
1378          vpxor          $Zhi,$Xhi,$Xhi
1379          vpclmulqdq     \$0x00,$HK,  $T2,$Xmi
1380          vpxor          $Ij,$T1,$T1
1381          vpxor          $Zmi,$Xmi,$Xmi
1382         vxorps          $Tred,$Xi,$Xi
1383
1384           vmovdqu       0x10($inp),$Ii          # I[1]
1385         vpalignr        \$8,$Xi,$Xi,$Tred       # 2nd phase
1386          vpclmulqdq     \$0x00,$Hkey,$Ij,$Zlo
1387           vpshufb       $bswap,$Ii,$Ii
1388          vpxor          $Xlo,$Zlo,$Zlo
1389          vpclmulqdq     \$0x11,$Hkey,$Ij,$Zhi
1390           vmovdqu       0x90-0x40($Htbl),$Hkey  # $Hkey^7
1391         vpclmulqdq      \$0x10,(%r10),$Xi,$Xi
1392         vxorps          $Xo,$Tred,$Tred
1393          vpunpckhqdq    $Ii,$Ii,$T2
1394          vpxor          $Xhi,$Zhi,$Zhi
1395          vpclmulqdq     \$0x10,$HK,  $T1,$Zmi
1396           vmovdqu       0xb0-0x40($Htbl),$HK
1397          vpxor          $Ii,$T2,$T2
1398          vpxor          $Xmi,$Zmi,$Zmi
1399
1400           vmovdqu       ($inp),$Ij              # I[0]
1401          vpclmulqdq     \$0x00,$Hkey,$Ii,$Xlo
1402           vpshufb       $bswap,$Ij,$Ij
1403          vpclmulqdq     \$0x11,$Hkey,$Ii,$Xhi
1404           vmovdqu       0xa0-0x40($Htbl),$Hkey  # $Hkey^8
1405         vpxor           $Tred,$Ij,$Ij
1406          vpclmulqdq     \$0x10,$HK,  $T2,$Xmi
1407         vpxor           $Xi,$Ij,$Ij             # accumulate $Xi
1408
1409         lea             0x80($inp),$inp
1410         sub             \$0x80,$len
1411         jnc             .Loop8x_avx
1412
1413         add             \$0x80,$len
1414         jmp             .Ltail_no_xor_avx
1415
1416 .align  32
1417 .Lshort_avx:
1418         vmovdqu         -0x10($inp,$len),$Ii    # very last word
1419         lea             ($inp,$len),$inp
1420         vmovdqu         0x00-0x40($Htbl),$Hkey  # $Hkey^1
1421         vmovdqu         0x20-0x40($Htbl),$HK
1422         vpshufb         $bswap,$Ii,$Ij
1423
1424         vmovdqa         $Xlo,$Zlo               # subtle way to zero $Zlo,
1425         vmovdqa         $Xhi,$Zhi               # $Zhi and
1426         vmovdqa         $Xmi,$Zmi               # $Zmi
1427         sub             \$0x10,$len
1428         jz              .Ltail_avx
1429
1430         vpunpckhqdq     $Ij,$Ij,$T1
1431         vpxor           $Xlo,$Zlo,$Zlo
1432         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1433         vpxor           $Ij,$T1,$T1
1434          vmovdqu        -0x20($inp),$Ii
1435         vpxor           $Xhi,$Zhi,$Zhi
1436         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1437         vmovdqu         0x10-0x40($Htbl),$Hkey  # $Hkey^2
1438          vpshufb        $bswap,$Ii,$Ij
1439         vpxor           $Xmi,$Zmi,$Zmi
1440         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1441         vpsrldq         \$8,$HK,$HK
1442         sub             \$0x10,$len
1443         jz              .Ltail_avx
1444
1445         vpunpckhqdq     $Ij,$Ij,$T1
1446         vpxor           $Xlo,$Zlo,$Zlo
1447         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1448         vpxor           $Ij,$T1,$T1
1449          vmovdqu        -0x30($inp),$Ii
1450         vpxor           $Xhi,$Zhi,$Zhi
1451         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1452         vmovdqu         0x30-0x40($Htbl),$Hkey  # $Hkey^3
1453          vpshufb        $bswap,$Ii,$Ij
1454         vpxor           $Xmi,$Zmi,$Zmi
1455         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1456         vmovdqu         0x50-0x40($Htbl),$HK
1457         sub             \$0x10,$len
1458         jz              .Ltail_avx
1459
1460         vpunpckhqdq     $Ij,$Ij,$T1
1461         vpxor           $Xlo,$Zlo,$Zlo
1462         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1463         vpxor           $Ij,$T1,$T1
1464          vmovdqu        -0x40($inp),$Ii
1465         vpxor           $Xhi,$Zhi,$Zhi
1466         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1467         vmovdqu         0x40-0x40($Htbl),$Hkey  # $Hkey^4
1468          vpshufb        $bswap,$Ii,$Ij
1469         vpxor           $Xmi,$Zmi,$Zmi
1470         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1471         vpsrldq         \$8,$HK,$HK
1472         sub             \$0x10,$len
1473         jz              .Ltail_avx
1474
1475         vpunpckhqdq     $Ij,$Ij,$T1
1476         vpxor           $Xlo,$Zlo,$Zlo
1477         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1478         vpxor           $Ij,$T1,$T1
1479          vmovdqu        -0x50($inp),$Ii
1480         vpxor           $Xhi,$Zhi,$Zhi
1481         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1482         vmovdqu         0x60-0x40($Htbl),$Hkey  # $Hkey^5
1483          vpshufb        $bswap,$Ii,$Ij
1484         vpxor           $Xmi,$Zmi,$Zmi
1485         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1486         vmovdqu         0x80-0x40($Htbl),$HK
1487         sub             \$0x10,$len
1488         jz              .Ltail_avx
1489
1490         vpunpckhqdq     $Ij,$Ij,$T1
1491         vpxor           $Xlo,$Zlo,$Zlo
1492         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1493         vpxor           $Ij,$T1,$T1
1494          vmovdqu        -0x60($inp),$Ii
1495         vpxor           $Xhi,$Zhi,$Zhi
1496         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1497         vmovdqu         0x70-0x40($Htbl),$Hkey  # $Hkey^6
1498          vpshufb        $bswap,$Ii,$Ij
1499         vpxor           $Xmi,$Zmi,$Zmi
1500         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1501         vpsrldq         \$8,$HK,$HK
1502         sub             \$0x10,$len
1503         jz              .Ltail_avx
1504
1505         vpunpckhqdq     $Ij,$Ij,$T1
1506         vpxor           $Xlo,$Zlo,$Zlo
1507         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1508         vpxor           $Ij,$T1,$T1
1509          vmovdqu        -0x70($inp),$Ii
1510         vpxor           $Xhi,$Zhi,$Zhi
1511         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1512         vmovdqu         0x90-0x40($Htbl),$Hkey  # $Hkey^7
1513          vpshufb        $bswap,$Ii,$Ij
1514         vpxor           $Xmi,$Zmi,$Zmi
1515         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1516         vmovq           0xb8-0x40($Htbl),$HK
1517         sub             \$0x10,$len
1518         jmp             .Ltail_avx
1519
1520 .align  32
1521 .Ltail_avx:
1522         vpxor           $Xi,$Ij,$Ij             # accumulate $Xi
1523 .Ltail_no_xor_avx:
1524         vpunpckhqdq     $Ij,$Ij,$T1
1525         vpxor           $Xlo,$Zlo,$Zlo
1526         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1527         vpxor           $Ij,$T1,$T1
1528         vpxor           $Xhi,$Zhi,$Zhi
1529         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1530         vpxor           $Xmi,$Zmi,$Zmi
1531         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1532
1533         vmovdqu         (%r10),$Tred
1534
1535         vpxor           $Xlo,$Zlo,$Xi
1536         vpxor           $Xhi,$Zhi,$Xo
1537         vpxor           $Xmi,$Zmi,$Zmi
1538
1539         vpxor           $Xi, $Zmi,$Zmi          # aggregated Karatsuba post-processing
1540         vpxor           $Xo, $Zmi,$Zmi
1541         vpslldq         \$8, $Zmi,$T2
1542         vpsrldq         \$8, $Zmi,$Zmi
1543         vpxor           $T2, $Xi, $Xi
1544         vpxor           $Zmi,$Xo, $Xo
1545
1546         vpclmulqdq      \$0x10,$Tred,$Xi,$T2    # 1st phase
1547         vpalignr        \$8,$Xi,$Xi,$Xi
1548         vpxor           $T2,$Xi,$Xi
1549
1550         vpclmulqdq      \$0x10,$Tred,$Xi,$T2    # 2nd phase
1551         vpalignr        \$8,$Xi,$Xi,$Xi
1552         vpxor           $Xo,$Xi,$Xi
1553         vpxor           $T2,$Xi,$Xi
1554
1555         cmp             \$0,$len
1556         jne             .Lshort_avx
1557
1558         vpshufb         $bswap,$Xi,$Xi
1559         vmovdqu         $Xi,($Xip)
1560         vzeroupper
1561 ___
1562 $code.=<<___ if ($win64);
1563         movaps  (%rsp),%xmm6
1564         movaps  0x10(%rsp),%xmm7
1565         movaps  0x20(%rsp),%xmm8
1566         movaps  0x30(%rsp),%xmm9
1567         movaps  0x40(%rsp),%xmm10
1568         movaps  0x50(%rsp),%xmm11
1569         movaps  0x60(%rsp),%xmm12
1570         movaps  0x70(%rsp),%xmm13
1571         movaps  0x80(%rsp),%xmm14
1572         movaps  0x90(%rsp),%xmm15
1573         lea     0xa8(%rsp),%rsp
1574 .LSEH_end_gcm_ghash_avx:
1575 ___
1576 $code.=<<___;
1577         ret
1578 .size   gcm_ghash_avx,.-gcm_ghash_avx
1579 ___
1580 } else {
1581 $code.=<<___;
1582         jmp     .L_ghash_clmul
1583 .size   gcm_ghash_avx,.-gcm_ghash_avx
1584 ___
1585 }
1586 \f
1587 $code.=<<___;
1588 .align  64
1589 .Lbswap_mask:
1590         .byte   15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0
1591 .L0x1c2_polynomial:
1592         .byte   1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0xc2
1593 .L7_mask:
1594         .long   7,0,7,0
1595 .L7_mask_poly:
1596         .long   7,0,`0xE1<<1`,0
1597 .align  64
1598 .type   .Lrem_4bit,\@object
1599 .Lrem_4bit:
1600         .long   0,`0x0000<<16`,0,`0x1C20<<16`,0,`0x3840<<16`,0,`0x2460<<16`
1601         .long   0,`0x7080<<16`,0,`0x6CA0<<16`,0,`0x48C0<<16`,0,`0x54E0<<16`
1602         .long   0,`0xE100<<16`,0,`0xFD20<<16`,0,`0xD940<<16`,0,`0xC560<<16`
1603         .long   0,`0x9180<<16`,0,`0x8DA0<<16`,0,`0xA9C0<<16`,0,`0xB5E0<<16`
1604 .type   .Lrem_8bit,\@object
1605 .Lrem_8bit:
1606         .value  0x0000,0x01C2,0x0384,0x0246,0x0708,0x06CA,0x048C,0x054E
1607         .value  0x0E10,0x0FD2,0x0D94,0x0C56,0x0918,0x08DA,0x0A9C,0x0B5E
1608         .value  0x1C20,0x1DE2,0x1FA4,0x1E66,0x1B28,0x1AEA,0x18AC,0x196E
1609         .value  0x1230,0x13F2,0x11B4,0x1076,0x1538,0x14FA,0x16BC,0x177E
1610         .value  0x3840,0x3982,0x3BC4,0x3A06,0x3F48,0x3E8A,0x3CCC,0x3D0E
1611         .value  0x3650,0x3792,0x35D4,0x3416,0x3158,0x309A,0x32DC,0x331E
1612         .value  0x2460,0x25A2,0x27E4,0x2626,0x2368,0x22AA,0x20EC,0x212E
1613         .value  0x2A70,0x2BB2,0x29F4,0x2836,0x2D78,0x2CBA,0x2EFC,0x2F3E
1614         .value  0x7080,0x7142,0x7304,0x72C6,0x7788,0x764A,0x740C,0x75CE
1615         .value  0x7E90,0x7F52,0x7D14,0x7CD6,0x7998,0x785A,0x7A1C,0x7BDE
1616         .value  0x6CA0,0x6D62,0x6F24,0x6EE6,0x6BA8,0x6A6A,0x682C,0x69EE
1617         .value  0x62B0,0x6372,0x6134,0x60F6,0x65B8,0x647A,0x663C,0x67FE
1618         .value  0x48C0,0x4902,0x4B44,0x4A86,0x4FC8,0x4E0A,0x4C4C,0x4D8E
1619         .value  0x46D0,0x4712,0x4554,0x4496,0x41D8,0x401A,0x425C,0x439E
1620         .value  0x54E0,0x5522,0x5764,0x56A6,0x53E8,0x522A,0x506C,0x51AE
1621         .value  0x5AF0,0x5B32,0x5974,0x58B6,0x5DF8,0x5C3A,0x5E7C,0x5FBE
1622         .value  0xE100,0xE0C2,0xE284,0xE346,0xE608,0xE7CA,0xE58C,0xE44E
1623         .value  0xEF10,0xEED2,0xEC94,0xED56,0xE818,0xE9DA,0xEB9C,0xEA5E
1624         .value  0xFD20,0xFCE2,0xFEA4,0xFF66,0xFA28,0xFBEA,0xF9AC,0xF86E
1625         .value  0xF330,0xF2F2,0xF0B4,0xF176,0xF438,0xF5FA,0xF7BC,0xF67E
1626         .value  0xD940,0xD882,0xDAC4,0xDB06,0xDE48,0xDF8A,0xDDCC,0xDC0E
1627         .value  0xD750,0xD692,0xD4D4,0xD516,0xD058,0xD19A,0xD3DC,0xD21E
1628         .value  0xC560,0xC4A2,0xC6E4,0xC726,0xC268,0xC3AA,0xC1EC,0xC02E
1629         .value  0xCB70,0xCAB2,0xC8F4,0xC936,0xCC78,0xCDBA,0xCFFC,0xCE3E
1630         .value  0x9180,0x9042,0x9204,0x93C6,0x9688,0x974A,0x950C,0x94CE
1631         .value  0x9F90,0x9E52,0x9C14,0x9DD6,0x9898,0x995A,0x9B1C,0x9ADE
1632         .value  0x8DA0,0x8C62,0x8E24,0x8FE6,0x8AA8,0x8B6A,0x892C,0x88EE
1633         .value  0x83B0,0x8272,0x8034,0x81F6,0x84B8,0x857A,0x873C,0x86FE
1634         .value  0xA9C0,0xA802,0xAA44,0xAB86,0xAEC8,0xAF0A,0xAD4C,0xAC8E
1635         .value  0xA7D0,0xA612,0xA454,0xA596,0xA0D8,0xA11A,0xA35C,0xA29E
1636         .value  0xB5E0,0xB422,0xB664,0xB7A6,0xB2E8,0xB32A,0xB16C,0xB0AE
1637         .value  0xBBF0,0xBA32,0xB874,0xB9B6,0xBCF8,0xBD3A,0xBF7C,0xBEBE
1638
1639 .asciz  "GHASH for x86_64, CRYPTOGAMS by <appro\@openssl.org>"
1640 .align  64
1641 ___
1642 \f
1643 # EXCEPTION_DISPOSITION handler (EXCEPTION_RECORD *rec,ULONG64 frame,
1644 #               CONTEXT *context,DISPATCHER_CONTEXT *disp)
1645 if ($win64) {
1646 $rec="%rcx";
1647 $frame="%rdx";
1648 $context="%r8";
1649 $disp="%r9";
1650
1651 $code.=<<___;
1652 .extern __imp_RtlVirtualUnwind
1653 .type   se_handler,\@abi-omnipotent
1654 .align  16
1655 se_handler:
1656         push    %rsi
1657         push    %rdi
1658         push    %rbx
1659         push    %rbp
1660         push    %r12
1661         push    %r13
1662         push    %r14
1663         push    %r15
1664         pushfq
1665         sub     \$64,%rsp
1666
1667         mov     120($context),%rax      # pull context->Rax
1668         mov     248($context),%rbx      # pull context->Rip
1669
1670         mov     8($disp),%rsi           # disp->ImageBase
1671         mov     56($disp),%r11          # disp->HandlerData
1672
1673         mov     0(%r11),%r10d           # HandlerData[0]
1674         lea     (%rsi,%r10),%r10        # prologue label
1675         cmp     %r10,%rbx               # context->Rip<prologue label
1676         jb      .Lin_prologue
1677
1678         mov     152($context),%rax      # pull context->Rsp
1679
1680         mov     4(%r11),%r10d           # HandlerData[1]
1681         lea     (%rsi,%r10),%r10        # epilogue label
1682         cmp     %r10,%rbx               # context->Rip>=epilogue label
1683         jae     .Lin_prologue
1684
1685         lea     48+280(%rax),%rax       # adjust "rsp"
1686
1687         mov     -8(%rax),%rbx
1688         mov     -16(%rax),%rbp
1689         mov     -24(%rax),%r12
1690         mov     -32(%rax),%r13
1691         mov     -40(%rax),%r14
1692         mov     -48(%rax),%r15
1693         mov     %rbx,144($context)      # restore context->Rbx
1694         mov     %rbp,160($context)      # restore context->Rbp
1695         mov     %r12,216($context)      # restore context->R12
1696         mov     %r13,224($context)      # restore context->R13
1697         mov     %r14,232($context)      # restore context->R14
1698         mov     %r15,240($context)      # restore context->R15
1699
1700 .Lin_prologue:
1701         mov     8(%rax),%rdi
1702         mov     16(%rax),%rsi
1703         mov     %rax,152($context)      # restore context->Rsp
1704         mov     %rsi,168($context)      # restore context->Rsi
1705         mov     %rdi,176($context)      # restore context->Rdi
1706
1707         mov     40($disp),%rdi          # disp->ContextRecord
1708         mov     $context,%rsi           # context
1709         mov     \$`1232/8`,%ecx         # sizeof(CONTEXT)
1710         .long   0xa548f3fc              # cld; rep movsq
1711
1712         mov     $disp,%rsi
1713         xor     %rcx,%rcx               # arg1, UNW_FLAG_NHANDLER
1714         mov     8(%rsi),%rdx            # arg2, disp->ImageBase
1715         mov     0(%rsi),%r8             # arg3, disp->ControlPc
1716         mov     16(%rsi),%r9            # arg4, disp->FunctionEntry
1717         mov     40(%rsi),%r10           # disp->ContextRecord
1718         lea     56(%rsi),%r11           # &disp->HandlerData
1719         lea     24(%rsi),%r12           # &disp->EstablisherFrame
1720         mov     %r10,32(%rsp)           # arg5
1721         mov     %r11,40(%rsp)           # arg6
1722         mov     %r12,48(%rsp)           # arg7
1723         mov     %rcx,56(%rsp)           # arg8, (NULL)
1724         call    *__imp_RtlVirtualUnwind(%rip)
1725
1726         mov     \$1,%eax                # ExceptionContinueSearch
1727         add     \$64,%rsp
1728         popfq
1729         pop     %r15
1730         pop     %r14
1731         pop     %r13
1732         pop     %r12
1733         pop     %rbp
1734         pop     %rbx
1735         pop     %rdi
1736         pop     %rsi
1737         ret
1738 .size   se_handler,.-se_handler
1739
1740 .section        .pdata
1741 .align  4
1742         .rva    .LSEH_begin_gcm_gmult_4bit
1743         .rva    .LSEH_end_gcm_gmult_4bit
1744         .rva    .LSEH_info_gcm_gmult_4bit
1745
1746         .rva    .LSEH_begin_gcm_ghash_4bit
1747         .rva    .LSEH_end_gcm_ghash_4bit
1748         .rva    .LSEH_info_gcm_ghash_4bit
1749
1750         .rva    .LSEH_begin_gcm_init_clmul
1751         .rva    .LSEH_end_gcm_init_clmul
1752         .rva    .LSEH_info_gcm_init_clmul
1753
1754         .rva    .LSEH_begin_gcm_ghash_clmul
1755         .rva    .LSEH_end_gcm_ghash_clmul
1756         .rva    .LSEH_info_gcm_ghash_clmul
1757 ___
1758 $code.=<<___    if ($avx);
1759         .rva    .LSEH_begin_gcm_init_avx
1760         .rva    .LSEH_end_gcm_init_avx
1761         .rva    .LSEH_info_gcm_init_clmul
1762
1763         .rva    .LSEH_begin_gcm_ghash_avx
1764         .rva    .LSEH_end_gcm_ghash_avx
1765         .rva    .LSEH_info_gcm_ghash_clmul
1766 ___
1767 $code.=<<___;
1768 .section        .xdata
1769 .align  8
1770 .LSEH_info_gcm_gmult_4bit:
1771         .byte   9,0,0,0
1772         .rva    se_handler
1773         .rva    .Lgmult_prologue,.Lgmult_epilogue       # HandlerData
1774 .LSEH_info_gcm_ghash_4bit:
1775         .byte   9,0,0,0
1776         .rva    se_handler
1777         .rva    .Lghash_prologue,.Lghash_epilogue       # HandlerData
1778 .LSEH_info_gcm_init_clmul:
1779         .byte   0x01,0x08,0x03,0x00
1780         .byte   0x08,0x68,0x00,0x00     #movaps 0x00(rsp),xmm6
1781         .byte   0x04,0x22,0x00,0x00     #sub    rsp,0x18
1782 .LSEH_info_gcm_ghash_clmul:
1783         .byte   0x01,0x33,0x16,0x00
1784         .byte   0x33,0xf8,0x09,0x00     #movaps 0x90(rsp),xmm15
1785         .byte   0x2e,0xe8,0x08,0x00     #movaps 0x80(rsp),xmm14
1786         .byte   0x29,0xd8,0x07,0x00     #movaps 0x70(rsp),xmm13
1787         .byte   0x24,0xc8,0x06,0x00     #movaps 0x60(rsp),xmm12
1788         .byte   0x1f,0xb8,0x05,0x00     #movaps 0x50(rsp),xmm11
1789         .byte   0x1a,0xa8,0x04,0x00     #movaps 0x40(rsp),xmm10
1790         .byte   0x15,0x98,0x03,0x00     #movaps 0x30(rsp),xmm9
1791         .byte   0x10,0x88,0x02,0x00     #movaps 0x20(rsp),xmm8
1792         .byte   0x0c,0x78,0x01,0x00     #movaps 0x10(rsp),xmm7
1793         .byte   0x08,0x68,0x00,0x00     #movaps 0x00(rsp),xmm6
1794         .byte   0x04,0x01,0x15,0x00     #sub    rsp,0xa8
1795 ___
1796 }
1797 \f
1798 $code =~ s/\`([^\`]*)\`/eval($1)/gem;
1799
1800 print $code;
1801
1802 close STDOUT;