GCM "jumbo" update:
[openssl.git] / crypto / modes / asm / ghash-x86.pl
1 #!/usr/bin/env perl
2 #
3 # ====================================================================
4 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
5 # project. The module is, however, dual licensed under OpenSSL and
6 # CRYPTOGAMS licenses depending on where you obtain it. For further
7 # details see http://www.openssl.org/~appro/cryptogams/.
8 # ====================================================================
9 #
10 # March 2010
11 #
12 # The module implements "4-bit" GCM GHASH function and underlying
13 # single multiplication operation in GF(2^128). "4-bit" means that it
14 # uses 256 bytes per-key table [+64/128 bytes fixed table]. It has two
15 # code paths: vanilla x86 and vanilla MMX. Former will be executed on
16 # 486 and Pentium, latter on all others. Performance results are for
17 # streamed GHASH subroutine and are expressed in cycles per processed
18 # byte, less is better:
19 #
20 #               gcc 2.95.3(*)   MMX assembler   x86 assembler
21 #
22 # Pentium       100/112(**)     -               50
23 # PIII          63 /77          16              24
24 # P4            96 /122         30              84(***)
25 # Opteron       50 /71          21              30
26 # Core2         54 /68          12.5            18
27 #
28 # (*)   gcc 3.4.x was observed to generate few percent slower code,
29 #       which is one of reasons why 2.95.3 results were chosen,
30 #       another reason is lack of 3.4.x results for older CPUs;
31 # (**)  second number is result for code compiled with -fPIC flag,
32 #       which is actually more relevant, because assembler code is
33 #       position-independent;
34 # (***) see comment in non-MMX routine for further details;
35 #
36 # To summarize, it's >2-3 times faster than gcc-generated code. To
37 # anchor it to something else SHA1 assembler processes one byte in
38 # 11-13 cycles on contemporary x86 cores.
39
40 # May 2010
41 #
42 # Add PCLMULQDQ version performing at 2.13 cycles per processed byte.
43 # The question is how close is it to theoretical limit? The pclmulqdq
44 # instruction latency appears to be 14 cycles and there can't be more
45 # than 2 of them executing at any given time. This means that single
46 # Karatsuba multiplication would take 28 cycles *plus* few cycles for
47 # pre- and post-processing. Then multiplication has to be followed by
48 # modulo-reduction. Given that aggregated reduction method [see
49 # "Carry-less Multiplication and Its Usage for Computing the GCM Mode"
50 # white paper by Intel] allows you to perform reduction only once in
51 # a while we can assume that asymptotic performance can be estimated
52 # as (28+Tmod/Naggr)/16, where Tmod is time to perform reduction
53 # and Naggr is the aggregation factor.
54 #
55 # Before we proceed to this implementation let's have closer look at
56 # the best-performing code suggested by Intel in their white paper.
57 # By tracing inter-register dependencies Tmod is estimated as ~19
58 # cycles and Naggr is 4, resulting in 2.05 cycles per processed byte.
59 # As implied, this is quite optimistic estimate, because it does not
60 # account for Karatsuba pre- and post-processing, which for a single
61 # multiplication is ~5 cycles. Unfortunately Intel does not provide
62 # performance data for GHASH alone, only for fused GCM mode. But
63 # we can estimate it by subtracting CTR performance result provided
64 # in "AES Instruction Set" white paper: 3.54-1.38=2.16 cycles per
65 # processed byte or 5% off the estimate. It should be noted though
66 # that 3.54 is GCM result for 16KB block size, while 1.38 is CTR for
67 # 1KB block size, meaning that real number is likely to be a bit
68 # further from estimate.
69 #
70 # Moving on to the implementation in question. Tmod is estimated as
71 # ~13 cycles and Naggr is 2, giving asymptotic performance of ...
72 # 2.16. How is it possible that measured performance is better than
73 # optimistic theoretical estimate? There is one thing Intel failed
74 # to recognize. By fusing GHASH with CTR former's performance is
75 # really limited to above (Tmul + Tmod/Naggr) equation. But if GHASH
76 # procedure is detached, the modulo-reduction can be interleaved with
77 # Naggr-1 multiplications and under ideal conditions even disappear
78 # from the equation. So that optimistic theoretical estimate for this
79 # implementation is ... 28/16=1.75, and not 2.16. Well, it's probably
80 # way too optimistic, at least for such small Naggr. I'd argue that
81 # (28+Tproc/Naggr), where Tproc is time required for Karatsuba pre-
82 # and post-processing, is more realistic estimate. In this case it
83 # gives ... 1.91 cycles per processed byte. Or in other words,
84 # depending on how well we can interleave reduction and one of the
85 # two multiplications the performance should be betwen 1.91 and 2.16.
86 # As already mentioned, this implementation processes one byte [out
87 # of 1KB buffer] in 2.13 cycles, while x86_64 counterpart - in 2.07.
88 # x86_64 performance is better, because larger register bank allows
89 # to interleave reduction and multiplication better.
90 #
91 # Does it make sense to increase Naggr? To start with it's virtually
92 # impossible in 32-bit mode, because of limited register bank
93 # capacity. Otherwise improvement has to be weighed agiainst slower
94 # setup, as well as code size and complexity increase. As even
95 # optimistic estimate doesn't promise 30% performance improvement,
96 # there are currently no plans to increase Naggr.
97
98 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
99 push(@INC,"${dir}","${dir}../../perlasm");
100 require "x86asm.pl";
101
102 &asm_init($ARGV[0],"ghash-x86.pl",$x86only = $ARGV[$#ARGV] eq "386");
103
104 $sse2=0;
105 for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
106
107 ($Zhh,$Zhl,$Zlh,$Zll) = ("ebp","edx","ecx","ebx");
108 $inp  = "edi";
109 $Htbl = "esi";
110 \f
111 $unroll = 0;    # Affects x86 loop. Folded loop performs ~7% worse
112                 # than unrolled, which has to be weighted against
113                 # 2.5x x86-specific code size reduction.
114
115 sub x86_loop {
116     my $off = shift;
117     my $rem = "eax";
118
119         &mov    ($Zhh,&DWP(4,$Htbl,$Zll));
120         &mov    ($Zhl,&DWP(0,$Htbl,$Zll));
121         &mov    ($Zlh,&DWP(12,$Htbl,$Zll));
122         &mov    ($Zll,&DWP(8,$Htbl,$Zll));
123         &xor    ($rem,$rem);    # avoid partial register stalls on PIII
124
125         # shrd practically kills P4, 2.5x deterioration, but P4 has
126         # MMX code-path to execute. shrd runs tad faster [than twice
127         # the shifts, move's and or's] on pre-MMX Pentium (as well as
128         # PIII and Core2), *but* minimizes code size, spares register
129         # and thus allows to fold the loop...
130         if (!$unroll) {
131         my $cnt = $inp;
132         &mov    ($cnt,15);
133         &jmp    (&label("x86_loop"));
134         &set_label("x86_loop",16);
135             for($i=1;$i<=2;$i++) {
136                 &mov    (&LB($rem),&LB($Zll));
137                 &shrd   ($Zll,$Zlh,4);
138                 &and    (&LB($rem),0xf);
139                 &shrd   ($Zlh,$Zhl,4);
140                 &shrd   ($Zhl,$Zhh,4);
141                 &shr    ($Zhh,4);
142                 &xor    ($Zhh,&DWP($off+16,"esp",$rem,4));
143
144                 &mov    (&LB($rem),&BP($off,"esp",$cnt));
145                 if ($i&1) {
146                         &and    (&LB($rem),0xf0);
147                 } else {
148                         &shl    (&LB($rem),4);
149                 }
150
151                 &xor    ($Zll,&DWP(8,$Htbl,$rem));
152                 &xor    ($Zlh,&DWP(12,$Htbl,$rem));
153                 &xor    ($Zhl,&DWP(0,$Htbl,$rem));
154                 &xor    ($Zhh,&DWP(4,$Htbl,$rem));
155
156                 if ($i&1) {
157                         &dec    ($cnt);
158                         &js     (&label("x86_break"));
159                 } else {
160                         &jmp    (&label("x86_loop"));
161                 }
162             }
163         &set_label("x86_break",16);
164         } else {
165             for($i=1;$i<32;$i++) {
166                 &comment($i);
167                 &mov    (&LB($rem),&LB($Zll));
168                 &shrd   ($Zll,$Zlh,4);
169                 &and    (&LB($rem),0xf);
170                 &shrd   ($Zlh,$Zhl,4);
171                 &shrd   ($Zhl,$Zhh,4);
172                 &shr    ($Zhh,4);
173                 &xor    ($Zhh,&DWP($off+16,"esp",$rem,4));
174
175                 if ($i&1) {
176                         &mov    (&LB($rem),&BP($off+15-($i>>1),"esp"));
177                         &and    (&LB($rem),0xf0);
178                 } else {
179                         &mov    (&LB($rem),&BP($off+15-($i>>1),"esp"));
180                         &shl    (&LB($rem),4);
181                 }
182
183                 &xor    ($Zll,&DWP(8,$Htbl,$rem));
184                 &xor    ($Zlh,&DWP(12,$Htbl,$rem));
185                 &xor    ($Zhl,&DWP(0,$Htbl,$rem));
186                 &xor    ($Zhh,&DWP(4,$Htbl,$rem));
187             }
188         }
189         &bswap  ($Zll);
190         &bswap  ($Zlh);
191         &bswap  ($Zhl);
192         if (!$x86only) {
193                 &bswap  ($Zhh);
194         } else {
195                 &mov    ("eax",$Zhh);
196                 &bswap  ("eax");
197                 &mov    ($Zhh,"eax");
198         }
199 }
200
201 if ($unroll) {
202     &function_begin_B("_x86_gmult_4bit_inner");
203         &x86_loop(4);
204         &ret    ();
205     &function_end_B("_x86_gmult_4bit_inner");
206 }
207
208 sub deposit_rem_4bit {
209     my $bias = shift;
210
211         &mov    (&DWP($bias+0, "esp"),0x0000<<16);
212         &mov    (&DWP($bias+4, "esp"),0x1C20<<16);
213         &mov    (&DWP($bias+8, "esp"),0x3840<<16);
214         &mov    (&DWP($bias+12,"esp"),0x2460<<16);
215         &mov    (&DWP($bias+16,"esp"),0x7080<<16);
216         &mov    (&DWP($bias+20,"esp"),0x6CA0<<16);
217         &mov    (&DWP($bias+24,"esp"),0x48C0<<16);
218         &mov    (&DWP($bias+28,"esp"),0x54E0<<16);
219         &mov    (&DWP($bias+32,"esp"),0xE100<<16);
220         &mov    (&DWP($bias+36,"esp"),0xFD20<<16);
221         &mov    (&DWP($bias+40,"esp"),0xD940<<16);
222         &mov    (&DWP($bias+44,"esp"),0xC560<<16);
223         &mov    (&DWP($bias+48,"esp"),0x9180<<16);
224         &mov    (&DWP($bias+52,"esp"),0x8DA0<<16);
225         &mov    (&DWP($bias+56,"esp"),0xA9C0<<16);
226         &mov    (&DWP($bias+60,"esp"),0xB5E0<<16);
227 }
228 \f
229 $suffix = $x86only ? "" : "_x86";
230
231 &function_begin("gcm_gmult_4bit".$suffix);
232         &stack_push(16+4+1);                    # +1 for stack alignment
233         &mov    ($inp,&wparam(0));              # load Xi
234         &mov    ($Htbl,&wparam(1));             # load Htable
235
236         &mov    ($Zhh,&DWP(0,$inp));            # load Xi[16]
237         &mov    ($Zhl,&DWP(4,$inp));
238         &mov    ($Zlh,&DWP(8,$inp));
239         &mov    ($Zll,&DWP(12,$inp));
240
241         &deposit_rem_4bit(16);
242
243         &mov    (&DWP(0,"esp"),$Zhh);           # copy Xi[16] on stack
244         &mov    (&DWP(4,"esp"),$Zhl);
245         &mov    (&DWP(8,"esp"),$Zlh);
246         &mov    (&DWP(12,"esp"),$Zll);
247         &shr    ($Zll,20);
248         &and    ($Zll,0xf0);
249
250         if ($unroll) {
251                 &call   ("_x86_gmult_4bit_inner");
252         } else {
253                 &x86_loop(0);
254                 &mov    ($inp,&wparam(0));
255         }
256
257         &mov    (&DWP(12,$inp),$Zll);
258         &mov    (&DWP(8,$inp),$Zlh);
259         &mov    (&DWP(4,$inp),$Zhl);
260         &mov    (&DWP(0,$inp),$Zhh);
261         &stack_pop(16+4+1);
262 &function_end("gcm_gmult_4bit".$suffix);
263
264 &function_begin("gcm_ghash_4bit".$suffix);
265         &stack_push(16+4+1);                    # +1 for 64-bit alignment
266         &mov    ($Zll,&wparam(0));              # load Xi
267         &mov    ($Htbl,&wparam(1));             # load Htable
268         &mov    ($inp,&wparam(2));              # load in
269         &mov    ("ecx",&wparam(3));             # load len
270         &add    ("ecx",$inp);
271         &mov    (&wparam(3),"ecx");
272
273         &mov    ($Zhh,&DWP(0,$Zll));            # load Xi[16]
274         &mov    ($Zhl,&DWP(4,$Zll));
275         &mov    ($Zlh,&DWP(8,$Zll));
276         &mov    ($Zll,&DWP(12,$Zll));
277
278         &deposit_rem_4bit(16);
279
280     &set_label("x86_outer_loop",16);
281         &xor    ($Zll,&DWP(12,$inp));           # xor with input
282         &xor    ($Zlh,&DWP(8,$inp));
283         &xor    ($Zhl,&DWP(4,$inp));
284         &xor    ($Zhh,&DWP(0,$inp));
285         &mov    (&DWP(12,"esp"),$Zll);          # dump it on stack
286         &mov    (&DWP(8,"esp"),$Zlh);
287         &mov    (&DWP(4,"esp"),$Zhl);
288         &mov    (&DWP(0,"esp"),$Zhh);
289
290         &shr    ($Zll,20);
291         &and    ($Zll,0xf0);
292
293         if ($unroll) {
294                 &call   ("_x86_gmult_4bit_inner");
295         } else {
296                 &x86_loop(0);
297                 &mov    ($inp,&wparam(2));
298         }
299         &lea    ($inp,&DWP(16,$inp));
300         &cmp    ($inp,&wparam(3));
301         &mov    (&wparam(2),$inp)       if (!$unroll);
302         &jb     (&label("x86_outer_loop"));
303
304         &mov    ($inp,&wparam(0));      # load Xi
305         &mov    (&DWP(12,$inp),$Zll);
306         &mov    (&DWP(8,$inp),$Zlh);
307         &mov    (&DWP(4,$inp),$Zhl);
308         &mov    (&DWP(0,$inp),$Zhh);
309         &stack_pop(16+4+1);
310 &function_end("gcm_ghash_4bit".$suffix);
311 \f
312 if (!$x86only) {{{
313
314 &static_label("rem_4bit");
315
316 sub mmx_loop() {
317 # MMX version performs 2.8 times better on P4 (see comment in non-MMX
318 # routine for further details), 40% better on Opteron and Core2, 50%
319 # better on PIII... In other words effort is considered to be well
320 # spent...
321     my $inp = shift;
322     my $rem_4bit = shift;
323     my $cnt = $Zhh;
324     my $nhi = $Zhl;
325     my $nlo = $Zlh;
326     my $rem = $Zll;
327
328     my ($Zlo,$Zhi) = ("mm0","mm1");
329     my $tmp = "mm2";
330
331         &xor    ($nlo,$nlo);    # avoid partial register stalls on PIII
332         &mov    ($nhi,$Zll);
333         &mov    (&LB($nlo),&LB($nhi));
334         &mov    ($cnt,14);
335         &shl    (&LB($nlo),4);
336         &and    ($nhi,0xf0);
337         &movq   ($Zlo,&QWP(8,$Htbl,$nlo));
338         &movq   ($Zhi,&QWP(0,$Htbl,$nlo));
339         &movd   ($rem,$Zlo);
340         &jmp    (&label("mmx_loop"));
341
342     &set_label("mmx_loop",16);
343         &psrlq  ($Zlo,4);
344         &and    ($rem,0xf);
345         &movq   ($tmp,$Zhi);
346         &psrlq  ($Zhi,4);
347         &pxor   ($Zlo,&QWP(8,$Htbl,$nhi));
348         &mov    (&LB($nlo),&BP(0,$inp,$cnt));
349         &psllq  ($tmp,60);
350         &pxor   ($Zhi,&QWP(0,$rem_4bit,$rem,8));
351         &dec    ($cnt);
352         &movd   ($rem,$Zlo);
353         &pxor   ($Zhi,&QWP(0,$Htbl,$nhi));
354         &mov    ($nhi,$nlo);
355         &pxor   ($Zlo,$tmp);
356         &js     (&label("mmx_break"));
357
358         &shl    (&LB($nlo),4);
359         &and    ($rem,0xf);
360         &psrlq  ($Zlo,4);
361         &and    ($nhi,0xf0);
362         &movq   ($tmp,$Zhi);
363         &psrlq  ($Zhi,4);
364         &pxor   ($Zlo,&QWP(8,$Htbl,$nlo));
365         &psllq  ($tmp,60);
366         &pxor   ($Zhi,&QWP(0,$rem_4bit,$rem,8));
367         &movd   ($rem,$Zlo);
368         &pxor   ($Zhi,&QWP(0,$Htbl,$nlo));
369         &pxor   ($Zlo,$tmp);
370         &jmp    (&label("mmx_loop"));
371
372     &set_label("mmx_break",16);
373         &shl    (&LB($nlo),4);
374         &and    ($rem,0xf);
375         &psrlq  ($Zlo,4);
376         &and    ($nhi,0xf0);
377         &movq   ($tmp,$Zhi);
378         &psrlq  ($Zhi,4);
379         &pxor   ($Zlo,&QWP(8,$Htbl,$nlo));
380         &psllq  ($tmp,60);
381         &pxor   ($Zhi,&QWP(0,$rem_4bit,$rem,8));
382         &movd   ($rem,$Zlo);
383         &pxor   ($Zhi,&QWP(0,$Htbl,$nlo));
384         &pxor   ($Zlo,$tmp);
385
386         &psrlq  ($Zlo,4);
387         &and    ($rem,0xf);
388         &movq   ($tmp,$Zhi);
389         &psrlq  ($Zhi,4);
390         &pxor   ($Zlo,&QWP(8,$Htbl,$nhi));
391         &psllq  ($tmp,60);
392         &pxor   ($Zhi,&QWP(0,$rem_4bit,$rem,8));
393         &movd   ($rem,$Zlo);
394         &pxor   ($Zhi,&QWP(0,$Htbl,$nhi));
395         &pxor   ($Zlo,$tmp);
396
397         &psrlq  ($Zlo,32);      # lower part of Zlo is already there
398         &movd   ($Zhl,$Zhi);
399         &psrlq  ($Zhi,32);
400         &movd   ($Zlh,$Zlo);
401         &movd   ($Zhh,$Zhi);
402
403         &bswap  ($Zll);
404         &bswap  ($Zhl);
405         &bswap  ($Zlh);
406         &bswap  ($Zhh);
407 }
408
409 &function_begin("gcm_gmult_4bit_mmx");
410         &mov    ($inp,&wparam(0));      # load Xi
411         &mov    ($Htbl,&wparam(1));     # load Htable
412
413         &call   (&label("pic_point"));
414         &set_label("pic_point");
415         &blindpop("eax");
416         &lea    ("eax",&DWP(&label("rem_4bit")."-".&label("pic_point"),"eax"));
417
418         &movz   ($Zll,&BP(15,$inp));
419
420         &mmx_loop($inp,"eax");
421
422         &emms   ();
423         &mov    (&DWP(12,$inp),$Zll);
424         &mov    (&DWP(4,$inp),$Zhl);
425         &mov    (&DWP(8,$inp),$Zlh);
426         &mov    (&DWP(0,$inp),$Zhh);
427 &function_end("gcm_gmult_4bit_mmx");
428 \f
429 # Streamed version performs 20% better on P4, 7% on Opteron,
430 # 10% on Core2 and PIII...
431 &function_begin("gcm_ghash_4bit_mmx");
432         &mov    ($Zhh,&wparam(0));      # load Xi
433         &mov    ($Htbl,&wparam(1));     # load Htable
434         &mov    ($inp,&wparam(2));      # load in
435         &mov    ($Zlh,&wparam(3));      # load len
436
437         &call   (&label("pic_point"));
438         &set_label("pic_point");
439         &blindpop("eax");
440         &lea    ("eax",&DWP(&label("rem_4bit")."-".&label("pic_point"),"eax"));
441
442         &add    ($Zlh,$inp);
443         &mov    (&wparam(3),$Zlh);      # len to point at the end of input
444         &stack_push(4+1);               # +1 for stack alignment
445
446         &mov    ($Zll,&DWP(12,$Zhh));   # load Xi[16]
447         &mov    ($Zhl,&DWP(4,$Zhh));
448         &mov    ($Zlh,&DWP(8,$Zhh));
449         &mov    ($Zhh,&DWP(0,$Zhh));
450         &jmp    (&label("mmx_outer_loop"));
451
452     &set_label("mmx_outer_loop",16);
453         &xor    ($Zll,&DWP(12,$inp));
454         &xor    ($Zhl,&DWP(4,$inp));
455         &xor    ($Zlh,&DWP(8,$inp));
456         &xor    ($Zhh,&DWP(0,$inp));
457         &mov    (&DWP(12,"esp"),$Zll);
458         &mov    (&DWP(4,"esp"),$Zhl);
459         &mov    (&DWP(8,"esp"),$Zlh);
460         &mov    (&DWP(0,"esp"),$Zhh);
461
462         &shr    ($Zll,24);
463
464         &mmx_loop("esp","eax");
465
466         &lea    ($inp,&DWP(16,$inp));
467         &cmp    ($inp,&wparam(3));
468         &jb     (&label("mmx_outer_loop"));
469
470         &mov    ($inp,&wparam(0));      # load Xi
471         &emms   ();
472         &mov    (&DWP(12,$inp),$Zll);
473         &mov    (&DWP(4,$inp),$Zhl);
474         &mov    (&DWP(8,$inp),$Zlh);
475         &mov    (&DWP(0,$inp),$Zhh);
476
477         &stack_pop(4+1);
478 &function_end("gcm_ghash_4bit_mmx");
479 \f
480 if ($sse2) {{
481 ######################################################################
482 # PCLMULQDQ version.
483
484 $Xip="eax";
485 $Htbl="edx";
486 $const="ecx";
487 $inp="esi";
488 $len="ebx";
489
490 ($Xi,$Xhi)=("xmm0","xmm1");     $Hkey="xmm2";
491 ($T1,$T2,$T3)=("xmm3","xmm4","xmm5");
492 ($Xn,$Xhn)=("xmm6","xmm7");
493
494 &static_label("bswap");
495
496 sub clmul64x64_T2 {     # minimal "register" pressure
497 my ($Xhi,$Xi,$Hkey)=@_;
498
499         &movdqa         ($Xhi,$Xi);             #
500         &pshufd         ($T1,$Xi,0b01001110);
501         &pshufd         ($T2,$Hkey,0b01001110);
502         &pxor           ($T1,$Xi);              #
503         &pxor           ($T2,$Hkey);
504
505         &pclmulqdq      ($Xi,$Hkey,0x00);       #######
506         &pclmulqdq      ($Xhi,$Hkey,0x11);      #######
507         &pclmulqdq      ($T1,$T2,0x00);         #######
508         &pxor           ($T1,$Xi);              #
509         &pxor           ($T1,$Xhi);             #
510
511         &movdqa         ($T2,$T1);              #
512         &psrldq         ($T1,8);
513         &pslldq         ($T2,8);                #
514         &pxor           ($Xhi,$T1);
515         &pxor           ($Xi,$T2);              #
516 }
517
518 sub clmul64x64_T3 {
519 # Even though this subroutine offers visually better ILP, it
520 # was empirically found to be a tad slower than above version.
521 # At least in gcm_ghash_clmul context. But it's just as well,
522 # because loop modulo-scheduling is possible only thanks to
523 # minimized "register" pressure...
524 my ($Xhi,$Xi,$Hkey)=@_;
525
526         &movdqa         ($T1,$Xi);              #
527         &movdqa         ($Xhi,$Xi);
528         &pclmulqdq      ($Xi,$Hkey,0x00);       #######
529         &pclmulqdq      ($Xhi,$Hkey,0x11);      #######
530         &pshufd         ($T2,$T1,0b01001110);   #
531         &pshufd         ($T3,$Hkey,0b01001110);
532         &pxor           ($T2,$T1);              #
533         &pxor           ($T3,$Hkey);
534         &pclmulqdq      ($T2,$T3,0x00);         #######
535         &pxor           ($T2,$Xi);              #
536         &pxor           ($T2,$Xhi);             #
537
538         &movdqa         ($T3,$T2);              #
539         &psrldq         ($T2,8);
540         &pslldq         ($T3,8);                #
541         &pxor           ($Xhi,$T2);
542         &pxor           ($Xi,$T3);              #
543 }
544 \f
545 if (1) {                # Algorithm 9 with <<1 twist.
546                         # Reduction is shorter and uses only two
547                         # temporary registers, which makes it better
548                         # candidate for interleaving with 64x64
549                         # multiplication. Pre-modulo-scheduled loop
550                         # was found to be ~20% faster than Algorithm 5
551                         # below. Algorithm 9 was then chosen and
552                         # optimized further...
553
554 sub reduction_alg9 {    # 17/13 times faster than Intel version
555 my ($Xhi,$Xi) = @_;
556
557         # 1st phase
558         &movdqa         ($T1,$Xi)               #
559         &psllq          ($Xi,1);
560         &pxor           ($Xi,$T1);              #
561         &psllq          ($Xi,5);                #
562         &pxor           ($Xi,$T1);              #
563         &psllq          ($Xi,57);               #
564         &movdqa         ($T2,$Xi);              #
565         &pslldq         ($Xi,8);
566         &psrldq         ($T2,8);                #       
567         &pxor           ($Xi,$T1);
568         &pxor           ($Xhi,$T2);             #
569
570         # 2nd phase
571         &movdqa         ($T2,$Xi);
572         &psrlq          ($Xi,5);
573         &pxor           ($Xi,$T2);              #
574         &psrlq          ($Xi,1);                #
575         &pxor           ($Xi,$T2);              #
576         &pxor           ($T2,$Xhi);
577         &psrlq          ($Xi,1);                #
578         &pxor           ($Xi,$T2);              #
579 }
580
581 &function_begin_B("gcm_init_clmul");
582         &mov            ($Htbl,&wparam(0));
583         &mov            ($Xip,&wparam(1));
584
585         &call           (&label("pic"));
586 &set_label("pic");
587         &blindpop       ($const);
588         &lea            ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
589
590         &movdqu         ($Hkey,&QWP(0,$Xip));
591         &pshufd         ($Hkey,$Hkey,0b01001110);# dword swap
592
593         # <<1 twist
594         &pshufd         ($T2,$Hkey,0b11111111); # broadcast uppermost dword
595         &movdqa         ($T1,$Hkey);
596         &psllq          ($Hkey,1);
597         &pxor           ($T3,$T3);              #
598         &psrlq          ($T1,63);
599         &pcmpgtd        ($T3,$T2);              # broadcast carry bit
600         &pslldq         ($T1,8);
601         &por            ($Hkey,$T1);            # H<<=1
602
603         # magic reduction
604         &pand           ($T3,&QWP(16,$const));  # 0x1c2_polynomial
605         &pxor           ($Hkey,$T3);            # if(carry) H^=0x1c2_polynomial
606
607         # calculate H^2
608         &movdqa         ($Xi,$Hkey);
609         &clmul64x64_T2  ($Xhi,$Xi,$Hkey);
610         &reduction_alg9 ($Xhi,$Xi);
611
612         &movdqu         (&QWP(0,$Htbl),$Hkey);  # save H
613         &movdqu         (&QWP(16,$Htbl),$Xi);   # save H^2
614
615         &ret            ();
616 &function_end_B("gcm_init_clmul");
617
618 &function_begin_B("gcm_gmult_clmul");
619         &mov            ($Xip,&wparam(0));
620         &mov            ($Htbl,&wparam(1));
621
622         &call           (&label("pic"));
623 &set_label("pic");
624         &blindpop       ($const);
625         &lea            ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
626
627         &movdqu         ($Xi,&QWP(0,$Xip));
628         &movdqa         ($T3,&QWP(0,$const));
629         &movdqu         ($Hkey,&QWP(0,$Htbl));
630         &pshufb         ($Xi,$T3);
631
632         &clmul64x64_T2  ($Xhi,$Xi,$Hkey);
633         &reduction_alg9 ($Xhi,$Xi);
634
635         &pshufb         ($Xi,$T3);
636         &movdqu         (&QWP(0,$Xip),$Xi);
637
638         &ret    ();
639 &function_end_B("gcm_gmult_clmul");
640
641 &function_begin("gcm_ghash_clmul");
642         &mov            ($Xip,&wparam(0));
643         &mov            ($Htbl,&wparam(1));
644         &mov            ($inp,&wparam(2));
645         &mov            ($len,&wparam(3));
646
647         &call           (&label("pic"));
648 &set_label("pic");
649         &blindpop       ($const);
650         &lea            ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
651
652         &movdqu         ($Xi,&QWP(0,$Xip));
653         &movdqa         ($T3,&QWP(0,$const));
654         &movdqu         ($Hkey,&QWP(0,$Htbl));
655         &pshufb         ($Xi,$T3);
656
657         &sub            ($len,0x10);
658         &jz             (&label("odd_tail"));
659
660         #######
661         # Xi+2 =[H*(Ii+1 + Xi+1)] mod P =
662         #       [(H*Ii+1) + (H*Xi+1)] mod P =
663         #       [(H*Ii+1) + H^2*(Ii+Xi)] mod P
664         #
665         &movdqu         ($T1,&QWP(0,$inp));     # Ii
666         &movdqu         ($Xn,&QWP(16,$inp));    # Ii+1
667         &pshufb         ($T1,$T3);
668         &pshufb         ($Xn,$T3);
669         &pxor           ($Xi,$T1);              # Ii+Xi
670
671         &clmul64x64_T2  ($Xhn,$Xn,$Hkey);       # H*Ii+1
672         &movdqu         ($Hkey,&QWP(16,$Htbl)); # load H^2
673
674         &lea            ($inp,&DWP(32,$inp));   # i+=2
675         &sub            ($len,0x20);
676         &jbe            (&label("even_tail"));
677
678 &set_label("mod_loop");
679         &clmul64x64_T2  ($Xhi,$Xi,$Hkey);       # H^2*(Ii+Xi)
680         &movdqu         ($T1,&QWP(0,$inp));     # Ii
681         &movdqu         ($Hkey,&QWP(0,$Htbl));  # load H
682
683         &pxor           ($Xi,$Xn);              # (H*Ii+1) + H^2*(Ii+Xi)
684         &pxor           ($Xhi,$Xhn);
685
686         &movdqu         ($Xn,&QWP(16,$inp));    # Ii+1
687         &pshufb         ($T1,$T3);
688         &pshufb         ($Xn,$T3);
689
690         &movdqa         ($T3,$Xn);              #&clmul64x64_TX ($Xhn,$Xn,$Hkey); H*Ii+1
691         &movdqa         ($Xhn,$Xn);
692          &pxor          ($Xhi,$T1);             # "Ii+Xi", consume early
693
694           &movdqa       ($T1,$Xi)               #&reduction_alg9($Xhi,$Xi); 1st phase
695           &psllq        ($Xi,1);
696           &pxor         ($Xi,$T1);              #
697           &psllq        ($Xi,5);                #
698           &pxor         ($Xi,$T1);              #
699         &pclmulqdq      ($Xn,$Hkey,0x00);       #######
700           &psllq        ($Xi,57);               #
701           &movdqa       ($T2,$Xi);              #
702           &pslldq       ($Xi,8);
703           &psrldq       ($T2,8);                #       
704           &pxor         ($Xi,$T1);
705         &pshufd         ($T1,$T3,0b01001110);
706           &pxor         ($Xhi,$T2);             #
707         &pxor           ($T1,$T3);
708         &pshufd         ($T3,$Hkey,0b01001110);
709         &pxor           ($T3,$Hkey);            #
710
711         &pclmulqdq      ($Xhn,$Hkey,0x11);      #######
712           &movdqa       ($T2,$Xi);              # 2nd phase
713           &psrlq        ($Xi,5);
714           &pxor         ($Xi,$T2);              #
715           &psrlq        ($Xi,1);                #
716           &pxor         ($Xi,$T2);              #
717           &pxor         ($T2,$Xhi);
718           &psrlq        ($Xi,1);                #
719           &pxor         ($Xi,$T2);              #
720
721         &pclmulqdq      ($T1,$T3,0x00);         #######
722         &movdqu         ($Hkey,&QWP(16,$Htbl)); # load H^2
723         &pxor           ($T1,$Xn);              #
724         &pxor           ($T1,$Xhn);             #
725
726         &movdqa         ($T3,$T1);              #
727         &psrldq         ($T1,8);
728         &pslldq         ($T3,8);                #
729         &pxor           ($Xhn,$T1);
730         &pxor           ($Xn,$T3);              #
731         &movdqa         ($T3,&QWP(0,$const));
732
733         &lea            ($inp,&DWP(32,$inp));
734         &sub            ($len,0x20);
735         &ja             (&label("mod_loop"));
736
737 &set_label("even_tail");
738         &clmul64x64_T2  ($Xhi,$Xi,$Hkey);       # H^2*(Ii+Xi)
739
740         &pxor           ($Xi,$Xn);              # (H*Ii+1) + H^2*(Ii+Xi)
741         &pxor           ($Xhi,$Xhn);
742
743         &reduction_alg9 ($Xhi,$Xi);
744
745         &test           ($len,$len);
746         &jnz            (&label("done"));
747
748         &movdqu         ($Hkey,&QWP(0,$Htbl));  # load H
749 &set_label("odd_tail");
750         &movdqu         ($T1,&QWP(0,$inp));     # Ii
751         &pshufb         ($T1,$T3);
752         &pxor           ($Xi,$T1);              # Ii+Xi
753
754         &clmul64x64_T2  ($Xhi,$Xi,$Hkey);       # H*(Ii+Xi)
755         &reduction_alg9 ($Xhi,$Xi);
756
757 &set_label("done");
758         &pshufb         ($Xi,$T3);
759         &movdqu         (&QWP(0,$Xip),$Xi);
760 &function_end("gcm_ghash_clmul");
761 \f
762 } else {                # Algorith 5. Kept for reference purposes.
763
764 sub reduction_alg5 {    # 19/16 times faster than Intel version
765 my ($Xhi,$Xi)=@_;
766
767         # <<1
768         &movdqa         ($T1,$Xi);              #
769         &movdqa         ($T2,$Xhi);
770         &pslld          ($Xi,1);
771         &pslld          ($Xhi,1);               #
772         &psrld          ($T1,31);
773         &psrld          ($T2,31);               #
774         &movdqa         ($T3,$T1);
775         &pslldq         ($T1,4);
776         &psrldq         ($T3,12);               #
777         &pslldq         ($T2,4);
778         &por            ($Xhi,$T3);             #
779         &por            ($Xi,$T1);
780         &por            ($Xhi,$T2);             #
781
782         # 1st phase
783         &movdqa         ($T1,$Xi);
784         &movdqa         ($T2,$Xi);
785         &movdqa         ($T3,$Xi);              #
786         &pslld          ($T1,31);
787         &pslld          ($T2,30);
788         &pslld          ($Xi,25);               #
789         &pxor           ($T1,$T2);
790         &pxor           ($T1,$Xi);              #
791         &movdqa         ($T2,$T1);              #
792         &pslldq         ($T1,12);
793         &psrldq         ($T2,4);                #
794         &pxor           ($T3,$T1);
795
796         # 2nd phase
797         &pxor           ($Xhi,$T3);             #
798         &movdqa         ($Xi,$T3);
799         &movdqa         ($T1,$T3);
800         &psrld          ($Xi,1);                #
801         &psrld          ($T1,2);
802         &psrld          ($T3,7);                #
803         &pxor           ($Xi,$T1);
804         &pxor           ($Xhi,$T2);
805         &pxor           ($Xi,$T3);              #
806         &pxor           ($Xi,$Xhi);             #
807 }
808
809 &function_begin_B("gcm_init_clmul");
810         &mov            ($Htbl,&wparam(0));
811         &mov            ($Xip,&wparam(1));
812
813         &call           (&label("pic"));
814 &set_label("pic");
815         &blindpop       ($const);
816         &lea            ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
817
818         &movdqu         ($Hkey,&QWP(0,$Xip));
819         &pshufd         ($Hkey,$Hkey,0b01001110);# dword swap
820
821         # calculate H^2
822         &movdqa         ($Xi,$Hkey);
823         &clmul64x64_T3  ($Xhi,$Xi,$Hkey);
824         &reduction_alg5 ($Xhi,$Xi);
825
826         &movdqu         (&QWP(0,$Htbl),$Hkey);  # save H
827         &movdqu         (&QWP(16,$Htbl),$Xi);   # save H^2
828
829         &ret            ();
830 &function_end_B("gcm_init_clmul");
831
832 &function_begin_B("gcm_gmult_clmul");
833         &mov            ($Xip,&wparam(0));
834         &mov            ($Htbl,&wparam(1));
835
836         &call           (&label("pic"));
837 &set_label("pic");
838         &blindpop       ($const);
839         &lea            ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
840
841         &movdqu         ($Xi,&QWP(0,$Xip));
842         &movdqa         ($Xn,&QWP(0,$const));
843         &movdqu         ($Hkey,&QWP(0,$Htbl));
844         &pshufb         ($Xi,$Xn);
845
846         &clmul64x64_T3  ($Xhi,$Xi,$Hkey);
847         &reduction_alg5 ($Xhi,$Xi);
848
849         &pshufb         ($Xi,$Xn);
850         &movdqu         (&QWP(0,$Xip),$Xi);
851
852         &ret    ();
853 &function_end_B("gcm_gmult_clmul");
854
855 &function_begin("gcm_ghash_clmul");
856         &mov            ($Xip,&wparam(0));
857         &mov            ($Htbl,&wparam(1));
858         &mov            ($inp,&wparam(2));
859         &mov            ($len,&wparam(3));
860
861         &call           (&label("pic"));
862 &set_label("pic");
863         &blindpop       ($const);
864         &lea            ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
865
866         &movdqu         ($Xi,&QWP(0,$Xip));
867         &movdqa         ($T3,&QWP(0,$const));
868         &movdqu         ($Hkey,&QWP(0,$Htbl));
869         &pshufb         ($Xi,$T3);
870
871         &sub            ($len,0x10);
872         &jz             (&label("odd_tail"));
873
874         #######
875         # Xi+2 =[H*(Ii+1 + Xi+1)] mod P =
876         #       [(H*Ii+1) + (H*Xi+1)] mod P =
877         #       [(H*Ii+1) + H^2*(Ii+Xi)] mod P
878         #
879         &movdqu         ($T1,&QWP(0,$inp));     # Ii
880         &movdqu         ($Xn,&QWP(16,$inp));    # Ii+1
881         &pshufb         ($T1,$T3);
882         &pshufb         ($Xn,$T3);
883         &pxor           ($Xi,$T1);              # Ii+Xi
884
885         &clmul64x64_T3  ($Xhn,$Xn,$Hkey);       # H*Ii+1
886         &movdqu         ($Hkey,&QWP(16,$Htbl)); # load H^2
887
888         &sub            ($len,0x20);
889         &lea            ($inp,&DWP(32,$inp));   # i+=2
890         &jbe            (&label("even_tail"));
891
892 &set_label("mod_loop");
893         &clmul64x64_T3  ($Xhi,$Xi,$Hkey);       # H^2*(Ii+Xi)
894         &movdqu         ($Hkey,&QWP(0,$Htbl));  # load H
895
896         &pxor           ($Xi,$Xn);              # (H*Ii+1) + H^2*(Ii+Xi)
897         &pxor           ($Xhi,$Xhn);
898
899         &reduction_alg5 ($Xhi,$Xi);
900
901         #######
902         &movdqa         ($T3,&QWP(0,$const));
903         &movdqu         ($T1,&QWP(0,$inp));     # Ii
904         &movdqu         ($Xn,&QWP(16,$inp));    # Ii+1
905         &pshufb         ($T1,$T3);
906         &pshufb         ($Xn,$T3);
907         &pxor           ($Xi,$T1);              # Ii+Xi
908
909         &clmul64x64_T3  ($Xhn,$Xn,$Hkey);       # H*Ii+1
910         &movdqu         ($Hkey,&QWP(16,$Htbl)); # load H^2
911
912         &sub            ($len,0x20);
913         &lea            ($inp,&DWP(32,$inp));
914         &ja             (&label("mod_loop"));
915
916 &set_label("even_tail");
917         &clmul64x64_T3  ($Xhi,$Xi,$Hkey);       # H^2*(Ii+Xi)
918
919         &pxor           ($Xi,$Xn);              # (H*Ii+1) + H^2*(Ii+Xi)
920         &pxor           ($Xhi,$Xhn);
921
922         &reduction_alg5 ($Xhi,$Xi);
923
924         &movdqa         ($T3,&QWP(0,$const));
925         &test           ($len,$len);
926         &jnz            (&label("done"));
927
928         &movdqu         ($Hkey,&QWP(0,$Htbl));  # load H
929 &set_label("odd_tail");
930         &movdqu         ($T1,&QWP(0,$inp));     # Ii
931         &pshufb         ($T1,$T3);
932         &pxor           ($Xi,$T1);              # Ii+Xi
933
934         &clmul64x64_T3  ($Xhi,$Xi,$Hkey);       # H*(Ii+Xi)
935         &reduction_alg5 ($Xhi,$Xi);
936
937         &movdqa         ($T3,&QWP(0,$const));
938 &set_label("done");
939         &pshufb         ($Xi,$T3);
940         &movdqu         (&QWP(0,$Xip),$Xi);
941 &function_end("gcm_ghash_clmul");
942
943 }
944 \f
945 &set_label("bswap",64);
946         &data_byte(15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0);
947         &data_byte(1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0xc2); # 0x1c2_polynomial
948 }}      # $sse2
949
950 &set_label("rem_4bit",64);
951         &data_word(0,0x0000<<16,0,0x1C20<<16,0,0x3840<<16,0,0x2460<<16);
952         &data_word(0,0x7080<<16,0,0x6CA0<<16,0,0x48C0<<16,0,0x54E0<<16);
953         &data_word(0,0xE100<<16,0,0xFD20<<16,0,0xD940<<16,0,0xC560<<16);
954         &data_word(0,0x9180<<16,0,0x8DA0<<16,0,0xA9C0<<16,0,0xB5E0<<16);
955 }}}     # !$x86only
956
957 &asciz("GHASH for x86, CRYPTOGAMS by <appro\@openssl.org>");
958 &asm_finish();