Ensure configured module specific and application specific defines are used
[openssl.git] / crypto / armv4cpuid.pl
1 #! /usr/bin/env perl
2 # Copyright 2015-2018 The OpenSSL Project Authors. All Rights Reserved.
3 #
4 # Licensed under the Apache License 2.0 (the "License").  You may not use
5 # this file except in compliance with the License.  You can obtain a copy
6 # in the file LICENSE in the source distribution or at
7 # https://www.openssl.org/source/license.html
8
9
10 $flavour = shift;
11 $output  = shift;
12
13 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
14 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
15 ( $xlate="${dir}perlasm/arm-xlate.pl" and -f $xlate) or
16 die "can't locate arm-xlate.pl";
17
18 open OUT,"| \"$^X\" $xlate $flavour $output";
19 *STDOUT=*OUT;
20
21 $code.=<<___;
22 #include "arm_arch.h"
23
24 #if defined(__thumb2__) && !defined(__APPLE__)
25 .syntax unified
26 .thumb
27 #else
28 .code   32
29 #undef  __thumb2__
30 #endif
31
32 .text
33
34 .align  5
35 .global OPENSSL_atomic_add
36 .type   OPENSSL_atomic_add,%function
37 OPENSSL_atomic_add:
38 #if __ARM_ARCH__>=6
39 .Ladd:  ldrex   r2,[r0]
40         add     r3,r2,r1
41         strex   r2,r3,[r0]
42         cmp     r2,#0
43         bne     .Ladd
44         mov     r0,r3
45         bx      lr
46 #else
47         stmdb   sp!,{r4-r6,lr}
48         ldr     r2,.Lspinlock
49         adr     r3,.Lspinlock
50         mov     r4,r0
51         mov     r5,r1
52         add     r6,r3,r2        @ &spinlock
53         b       .+8
54 .Lspin: bl      sched_yield
55         mov     r0,#-1
56         swp     r0,r0,[r6]
57         cmp     r0,#0
58         bne     .Lspin
59
60         ldr     r2,[r4]
61         add     r2,r2,r5
62         str     r2,[r4]
63         str     r0,[r6]         @ release spinlock
64         ldmia   sp!,{r4-r6,lr}
65         tst     lr,#1
66         moveq   pc,lr
67         .word   0xe12fff1e      @ bx    lr
68 #endif
69 .size   OPENSSL_atomic_add,.-OPENSSL_atomic_add
70
71 .global OPENSSL_cleanse
72 .type   OPENSSL_cleanse,%function
73 OPENSSL_cleanse:
74         eor     ip,ip,ip
75         cmp     r1,#7
76 #ifdef  __thumb2__
77         itt     hs
78 #endif
79         subhs   r1,r1,#4
80         bhs     .Lot
81         cmp     r1,#0
82         beq     .Lcleanse_done
83 .Little:
84         strb    ip,[r0],#1
85         subs    r1,r1,#1
86         bhi     .Little
87         b       .Lcleanse_done
88
89 .Lot:   tst     r0,#3
90         beq     .Laligned
91         strb    ip,[r0],#1
92         sub     r1,r1,#1
93         b       .Lot
94 .Laligned:
95         str     ip,[r0],#4
96         subs    r1,r1,#4
97         bhs     .Laligned
98         adds    r1,r1,#4
99         bne     .Little
100 .Lcleanse_done:
101 #if __ARM_ARCH__>=5
102         bx      lr
103 #else
104         tst     lr,#1
105         moveq   pc,lr
106         .word   0xe12fff1e      @ bx    lr
107 #endif
108 .size   OPENSSL_cleanse,.-OPENSSL_cleanse
109
110 .global CRYPTO_memcmp
111 .type   CRYPTO_memcmp,%function
112 .align  4
113 CRYPTO_memcmp:
114         eor     ip,ip,ip
115         cmp     r2,#0
116         beq     .Lno_data
117         stmdb   sp!,{r4,r5}
118
119 .Loop_cmp:
120         ldrb    r4,[r0],#1
121         ldrb    r5,[r1],#1
122         eor     r4,r4,r5
123         orr     ip,ip,r4
124         subs    r2,r2,#1
125         bne     .Loop_cmp
126
127         ldmia   sp!,{r4,r5}
128 .Lno_data:
129         rsb     r0,ip,#0
130         mov     r0,r0,lsr#31
131 #if __ARM_ARCH__>=5
132         bx      lr
133 #else
134         tst     lr,#1
135         moveq   pc,lr
136         .word   0xe12fff1e      @ bx    lr
137 #endif
138 .size   CRYPTO_memcmp,.-CRYPTO_memcmp
139
140 #if __ARM_MAX_ARCH__>=7
141 .arch   armv7-a
142 .fpu    neon
143
144 .align  5
145 .global _armv7_neon_probe
146 .type   _armv7_neon_probe,%function
147 _armv7_neon_probe:
148         vorr    q0,q0,q0
149         bx      lr
150 .size   _armv7_neon_probe,.-_armv7_neon_probe
151
152 .global _armv7_tick
153 .type   _armv7_tick,%function
154 _armv7_tick:
155 #ifdef  __APPLE__
156         mrrc    p15,0,r0,r1,c14         @ CNTPCT
157 #else
158         mrrc    p15,1,r0,r1,c14         @ CNTVCT
159 #endif
160         bx      lr
161 .size   _armv7_tick,.-_armv7_tick
162
163 .global _armv8_aes_probe
164 .type   _armv8_aes_probe,%function
165 _armv8_aes_probe:
166 #if defined(__thumb2__) && !defined(__APPLE__)
167         .byte   0xb0,0xff,0x00,0x03     @ aese.8        q0,q0
168 #else
169         .byte   0x00,0x03,0xb0,0xf3     @ aese.8        q0,q0
170 #endif
171         bx      lr
172 .size   _armv8_aes_probe,.-_armv8_aes_probe
173
174 .global _armv8_sha1_probe
175 .type   _armv8_sha1_probe,%function
176 _armv8_sha1_probe:
177 #if defined(__thumb2__) && !defined(__APPLE__)
178         .byte   0x00,0xef,0x40,0x0c     @ sha1c.32      q0,q0,q0
179 #else
180         .byte   0x40,0x0c,0x00,0xf2     @ sha1c.32      q0,q0,q0
181 #endif
182         bx      lr
183 .size   _armv8_sha1_probe,.-_armv8_sha1_probe
184
185 .global _armv8_sha256_probe
186 .type   _armv8_sha256_probe,%function
187 _armv8_sha256_probe:
188 #if defined(__thumb2__) && !defined(__APPLE__)
189         .byte   0x00,0xff,0x40,0x0c     @ sha256h.32    q0,q0,q0
190 #else
191         .byte   0x40,0x0c,0x00,0xf3     @ sha256h.32    q0,q0,q0
192 #endif
193         bx      lr
194 .size   _armv8_sha256_probe,.-_armv8_sha256_probe
195 .global _armv8_pmull_probe
196 .type   _armv8_pmull_probe,%function
197 _armv8_pmull_probe:
198 #if defined(__thumb2__) && !defined(__APPLE__)
199         .byte   0xa0,0xef,0x00,0x0e     @ vmull.p64     q0,d0,d0
200 #else
201         .byte   0x00,0x0e,0xa0,0xf2     @ vmull.p64     q0,d0,d0
202 #endif
203         bx      lr
204 .size   _armv8_pmull_probe,.-_armv8_pmull_probe
205 #endif
206
207 .global OPENSSL_wipe_cpu
208 .type   OPENSSL_wipe_cpu,%function
209 OPENSSL_wipe_cpu:
210 #if __ARM_MAX_ARCH__>=7
211         ldr     r0,.LOPENSSL_armcap
212         adr     r1,.LOPENSSL_armcap
213         ldr     r0,[r1,r0]
214 #ifdef  __APPLE__
215         ldr     r0,[r0]
216 #endif
217 #endif
218         eor     r2,r2,r2
219         eor     r3,r3,r3
220         eor     ip,ip,ip
221 #if __ARM_MAX_ARCH__>=7
222         tst     r0,#1
223         beq     .Lwipe_done
224         veor    q0, q0, q0
225         veor    q1, q1, q1
226         veor    q2, q2, q2
227         veor    q3, q3, q3
228         veor    q8, q8, q8
229         veor    q9, q9, q9
230         veor    q10, q10, q10
231         veor    q11, q11, q11
232         veor    q12, q12, q12
233         veor    q13, q13, q13
234         veor    q14, q14, q14
235         veor    q15, q15, q15
236 .Lwipe_done:
237 #endif
238         mov     r0,sp
239 #if __ARM_ARCH__>=5
240         bx      lr
241 #else
242         tst     lr,#1
243         moveq   pc,lr
244         .word   0xe12fff1e      @ bx    lr
245 #endif
246 .size   OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu
247
248 .global OPENSSL_instrument_bus
249 .type   OPENSSL_instrument_bus,%function
250 OPENSSL_instrument_bus:
251         eor     r0,r0,r0
252 #if __ARM_ARCH__>=5
253         bx      lr
254 #else
255         tst     lr,#1
256         moveq   pc,lr
257         .word   0xe12fff1e      @ bx    lr
258 #endif
259 .size   OPENSSL_instrument_bus,.-OPENSSL_instrument_bus
260
261 .global OPENSSL_instrument_bus2
262 .type   OPENSSL_instrument_bus2,%function
263 OPENSSL_instrument_bus2:
264         eor     r0,r0,r0
265 #if __ARM_ARCH__>=5
266         bx      lr
267 #else
268         tst     lr,#1
269         moveq   pc,lr
270         .word   0xe12fff1e      @ bx    lr
271 #endif
272 .size   OPENSSL_instrument_bus2,.-OPENSSL_instrument_bus2
273
274 .align  5
275 #if __ARM_MAX_ARCH__>=7
276 .LOPENSSL_armcap:
277 .word   OPENSSL_armcap_P-.
278 #endif
279 #if __ARM_ARCH__>=6
280 .align  5
281 #else
282 .Lspinlock:
283 .word   atomic_add_spinlock-.Lspinlock
284 .align  5
285
286 .data
287 .align  2
288 atomic_add_spinlock:
289 .word   0
290 #endif
291
292 .comm   OPENSSL_armcap_P,4,4
293 .hidden OPENSSL_armcap_P
294 ___
295
296 print $code;
297 close STDOUT;