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sparcv9cap.c: update from master.
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Andy Polyakov committed May 19, 2013
1 parent 747b7a6 commit 48b7b96
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Showing 3 changed files with 316 additions and 23 deletions.
101 changes: 101 additions & 0 deletions crypto/sparc_arch.h
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Original file line number Diff line number Diff line change
@@ -0,0 +1,101 @@
#ifndef __SPARC_ARCH_H__
#define __SPARC_ARCH_H__

#define SPARCV9_TICK_PRIVILEGED (1<<0)
#define SPARCV9_PREFER_FPU (1<<1)
#define SPARCV9_VIS1 (1<<2)
#define SPARCV9_VIS2 (1<<3) /* reserved */
#define SPARCV9_FMADD (1<<4) /* reserved for SPARC64 V */
#define SPARCV9_BLK (1<<5) /* VIS1 block copy */
#define SPARCV9_VIS3 (1<<6)
#define SPARCV9_RANDOM (1<<7)
#define SPARCV9_64BIT_STACK (1<<8)

/*
* OPENSSL_sparcv9cap_P[1] is copy of Compatibility Feature Register,
* %asr26, SPARC-T4 and later. There is no SPARCV9_CFR bit in
* OPENSSL_sparcv9cap_P[0], as %cfr copy is sufficient...
*/
#define CFR_AES 0x00000001 /* Supports AES opcodes */
#define CFR_DES 0x00000002 /* Supports DES opcodes */
#define CFR_KASUMI 0x00000004 /* Supports KASUMI opcodes */
#define CFR_CAMELLIA 0x00000008 /* Supports CAMELLIA opcodes*/
#define CFR_MD5 0x00000010 /* Supports MD5 opcodes */
#define CFR_SHA1 0x00000020 /* Supports SHA1 opcodes */
#define CFR_SHA256 0x00000040 /* Supports SHA256 opcodes */
#define CFR_SHA512 0x00000080 /* Supports SHA512 opcodes */
#define CFR_MPMUL 0x00000100 /* Supports MPMUL opcodes */
#define CFR_MONTMUL 0x00000200 /* Supports MONTMUL opcodes */
#define CFR_MONTSQR 0x00000400 /* Supports MONTSQR opcodes */
#define CFR_CRC32C 0x00000800 /* Supports CRC32C opcodes */

#if defined(OPENSSL_PIC) && !defined(__PIC__)
# define __PIC__
#endif

#if defined(__SUNPRO_C) && defined(__sparcv9) && !defined(__arch64__)
# define __arch64__
#endif

#define SPARC_PIC_THUNK(reg) \
.align 32; \
.Lpic_thunk: \
jmp %o7 + 8; \
add %o7, reg, reg;

#define SPARC_PIC_THUNK_CALL(reg) \
sethi %hi(_GLOBAL_OFFSET_TABLE_-4), reg; \
call .Lpic_thunk; \
or reg, %lo(_GLOBAL_OFFSET_TABLE_+4), reg;

#if 1
# define SPARC_SETUP_GOT_REG(reg) SPARC_PIC_THUNK_CALL(reg)
#else
# define SPARC_SETUP_GOT_REG(reg) \
sethi %hi(_GLOBAL_OFFSET_TABLE_-4), reg; \
call .+8; \
or reg,%lo(_GLOBAL_OFFSET_TABLE_+4), reg; \
add %o7, reg, reg
#endif

#if defined(__arch64__)

# define SPARC_LOAD_ADDRESS(SYM, reg) \
setx SYM, %o7, reg;
# define LDPTR ldx
# define SIZE_T_CC %xcc
# define STACK_FRAME 192
# define STACK_BIAS 2047
# define STACK_7thARG (STACK_BIAS+176)

#else

# define SPARC_LOAD_ADDRESS(SYM, reg) \
set SYM, reg;
# define LDPTR ld
# define SIZE_T_CC %icc
# define STACK_FRAME 112
# define STACK_BIAS 0
# define STACK_7thARG 92
# define SPARC_LOAD_ADDRESS_LEAF(SYM,reg,tmp) SPARC_LOAD_ADDRESS(SYM,reg)

#endif

#ifdef __PIC__
# undef SPARC_LOAD_ADDRESS
# undef SPARC_LOAD_ADDRESS_LEAF
# define SPARC_LOAD_ADDRESS(SYM, reg) \
SPARC_SETUP_GOT_REG(reg); \
sethi %hi(SYM), %o7; \
or %o7, %lo(SYM), %o7; \
LDPTR [reg + %o7], reg;
#endif

#ifndef SPARC_LOAD_ADDRESS_LEAF
# define SPARC_LOAD_ADDRESS_LEAF(SYM, reg, tmp) \
mov %o7, tmp; \
SPARC_LOAD_ADDRESS(SYM, reg) \
mov tmp, %o7;
#endif

#endif /* __SPARC_ARCH_H__ */
127 changes: 127 additions & 0 deletions crypto/sparccpuid.S
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Original file line number Diff line number Diff line change
Expand Up @@ -251,6 +251,11 @@ _sparcv9_vis1_probe:
! UltraSPARC IIe 7
! UltraSPARC III 7
! UltraSPARC T1 24
! SPARC T4 65(*)
!
! (*) result has lesser to do with VIS instruction latencies, rdtick
! appears that slow, but it does the trick in sense that FP and
! VIS code paths are still slower than integer-only ones.
!
! Numbers for T2 and SPARC64 V-VII are more than welcomed.
!
Expand All @@ -260,6 +265,8 @@ _sparcv9_vis1_probe:
.global _sparcv9_vis1_instrument
.align 8
_sparcv9_vis1_instrument:
.word 0x81b00d80 !fxor %f0,%f0,%f0
.word 0x85b08d82 !fxor %f2,%f2,%f2
.word 0x91410000 !rd %tick,%o0
.word 0x81b00d80 !fxor %f0,%f0,%f0
.word 0x85b08d82 !fxor %f2,%f2,%f2
Expand Down Expand Up @@ -314,6 +321,30 @@ _sparcv9_fmadd_probe:
.type _sparcv9_fmadd_probe,#function
.size _sparcv9_fmadd_probe,.-_sparcv9_fmadd_probe

.global _sparcv9_rdcfr
.align 8
_sparcv9_rdcfr:
retl
.word 0x91468000 !rd %asr26,%o0
.type _sparcv9_rdcfr,#function
.size _sparcv9_rdcfr,.-_sparcv9_rdcfr

.global _sparcv9_vis3_probe
.align 8
_sparcv9_vis3_probe:
retl
.word 0x81b022a0 !xmulx %g0,%g0,%g0
.type _sparcv9_vis3_probe,#function
.size _sparcv9_vis3_probe,.-_sparcv9_vis3_probe

.global _sparcv9_random
.align 8
_sparcv9_random:
retl
.word 0x91b002a0 !random %o0
.type _sparcv9_random,#function
.size _sparcv9_random,.-_sparcv9_vis3_probe

.global OPENSSL_cleanse
.align 32
OPENSSL_cleanse:
Expand Down Expand Up @@ -397,6 +428,102 @@ OPENSSL_cleanse:
.type OPENSSL_cleanse,#function
.size OPENSSL_cleanse,.-OPENSSL_cleanse

.global _sparcv9_vis1_instrument_bus
.align 8
_sparcv9_vis1_instrument_bus:
mov %o1,%o3 ! save cnt
.word 0x99410000 !rd %tick,%o4 ! tick
mov %o4,%o5 ! lasttick = tick
set 0,%g4 ! diff

andn %o0,63,%g1
.word 0xc1985e00 !ldda [%g1]0xf0,%f0 ! block load
.word 0x8143e040 !membar #Sync
.word 0xc1b85c00 !stda %f0,[%g1]0xe0 ! block store and commit
.word 0x8143e040 !membar #Sync
ld [%o0],%o4
add %o4,%g4,%g4
.word 0xc9e2100c !cas [%o0],%o4,%g4

.Loop: .word 0x99410000 !rd %tick,%o4
sub %o4,%o5,%g4 ! diff=tick-lasttick
mov %o4,%o5 ! lasttick=tick

andn %o0,63,%g1
.word 0xc1985e00 !ldda [%g1]0xf0,%f0 ! block load
.word 0x8143e040 !membar #Sync
.word 0xc1b85c00 !stda %f0,[%g1]0xe0 ! block store and commit
.word 0x8143e040 !membar #Sync
ld [%o0],%o4
add %o4,%g4,%g4
.word 0xc9e2100c !cas [%o0],%o4,%g4
subcc %o1,1,%o1 ! --$cnt
bnz .Loop
add %o0,4,%o0 ! ++$out

retl
mov %o3,%o0
.type _sparcv9_vis1_instrument_bus,#function
.size _sparcv9_vis1_instrument_bus,.-_sparcv9_vis1_instrument_bus

.global _sparcv9_vis1_instrument_bus2
.align 8
_sparcv9_vis1_instrument_bus2:
mov %o1,%o3 ! save cnt
sll %o1,2,%o1 ! cnt*=4

.word 0x99410000 !rd %tick,%o4 ! tick
mov %o4,%o5 ! lasttick = tick
set 0,%g4 ! diff

andn %o0,63,%g1
.word 0xc1985e00 !ldda [%g1]0xf0,%f0 ! block load
.word 0x8143e040 !membar #Sync
.word 0xc1b85c00 !stda %f0,[%g1]0xe0 ! block store and commit
.word 0x8143e040 !membar #Sync
ld [%o0],%o4
add %o4,%g4,%g4
.word 0xc9e2100c !cas [%o0],%o4,%g4

.word 0x99410000 !rd %tick,%o4 ! tick
sub %o4,%o5,%g4 ! diff=tick-lasttick
mov %o4,%o5 ! lasttick=tick
mov %g4,%g5 ! lastdiff=diff
.Loop2:
andn %o0,63,%g1
.word 0xc1985e00 !ldda [%g1]0xf0,%f0 ! block load
.word 0x8143e040 !membar #Sync
.word 0xc1b85c00 !stda %f0,[%g1]0xe0 ! block store and commit
.word 0x8143e040 !membar #Sync
ld [%o0],%o4
add %o4,%g4,%g4
.word 0xc9e2100c !cas [%o0],%o4,%g4

subcc %o2,1,%o2 ! --max
bz .Ldone2
nop

.word 0x99410000 !rd %tick,%o4 ! tick
sub %o4,%o5,%g4 ! diff=tick-lasttick
mov %o4,%o5 ! lasttick=tick
cmp %g4,%g5
mov %g4,%g5 ! lastdiff=diff

.word 0x83408000 !rd %ccr,%g1
and %g1,4,%g1 ! isolate zero flag
xor %g1,4,%g1 ! flip zero flag

subcc %o1,%g1,%o1 ! conditional --$cnt
bnz .Loop2
add %o0,%g1,%o0 ! conditional ++$out

.Ldone2:
srl %o1,2,%o1
retl
sub %o3,%o1,%o0
.type _sparcv9_vis1_instrument_bus2,#function
.size _sparcv9_vis1_instrument_bus2,.-_sparcv9_vis1_instrument_bus2

.section ".init",#alloc,#execinstr
call OPENSSL_cpuid_setup
nop

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